rfc194.txt

著名的RFC文档,其中有一些文档是已经翻译成中文的的.

                                      Vint Cerf - UCLA

                                      Eric Harslem - Rand

RFC 194                               John Heafner - Rand
NIC 7139
Category: D.4                         Bob Metcalfe - MIT
Updates: None
Obsoletes: None                       Jim White - UCSB


                  THE DATA RECONFIGURATION SERVICE --

               COMPILER/INTERPRETER IMPLEMENTATION NOTES


                    I.  NEW FEATURES OF THE LANGUAGE

1.   The meaning of S(#,E,,l) is only find an arbitrary
     number  (<=256) of EBCDIC characters and store them in
     identifier S.  This descriptor is terminated only by
     an invalid EBCDIC or by exceeding maximum permissible
     character count (256).
2.   The assignment (S .<=. T) causes all attributes of
     identifier T to be given to S, i.e., length, type,
     and contents.
3.   (S .<=. T || X) concatenates X onto the right-hand
     side of T and stores the result in S.  If T and X
     are binary the resulting value has a length equal
     to the sum L(T) + L(X).
4.   T(X) joins L(X) and V(X) as a built-in identifier
     function.
     T(X) = type of identifier X.
     L(X) = length of contents of X.
     V(X) = contents of X converted to binary
            (decimal - binary is presently the only
            transformation).
5.   New types ED and AD are EBCDIC and ASCII encoded
     decimal, respectively.  These have been added to
     complement the V(X) function.
6.   New type SB has been added as signed binary.  Type B
     is a logical binary string.
7.   The syntactic notation for return-from-a-form has
     been changed.  See new syntax.







                                                                [Page 1]

Data Reconfiguration Service                                     RFC 194


II.  NEW SYNTAX

form              :: = rule | form
rule              :: = label  inputstream outputstream;
label             :: = INTEGER | NULL
inputstream       :: = terms | NULL
terms             :: = term | terms, term
outputstream      :: = :terms | NULL
term              :: = identifier | identifier descriptor |
                       descriptor | comparator
identifier        :: = <alpha followed by 0-3 alphanumerics>
descriptor        :: = (replicationexpr, datatype, valueexpr,
                       lengthexpr control)
comparator        :: = (concatexpr connective concatexpr control) |
                       (identifier .<=. concatexpr control)
replicationexpr   :: = # | arithmetricexpr | NULL
datatype          :: = B | O | X | E | A | ED | AD | SB | T (identifier)
valueexpr         :: = concatexpr | NULL
lengthexpr        :: = arithmeticexpr | NULL
connective        :: = .LE. | .LT. | .GT. | .GE. | .EQ. | .NE.
concatexpr        :: = value | concatexpr    value
value             :: = literal | arithmeticexpr
arithmeticexpr    :: = primary | arithmeticexpr operator primary
primary           :: = identifier | L(identifier) | V(identifier) |
                         INTEGER
operator          :: = + | - | * | /
literal           :: = literaltype "string"

literaltype       :: = B | 0 | X | E | A | ED | AD | SB
string            :: = <from 0 to 256 chars>
control           :: = :options | NULL
options           :: = SFUR (arithmeticexpr) | SFUR (arithmeticexpr),
                       SFUR (arithmeticexpr)
SFUR              :: = S | F | U | SR | FR | UR

















                                                                [Page 2]

Data Reconfiguration Service                                     RFC 194


III.  THE FORM INTERPRETER

Interpreter Overview

     The interpreter is a simple minded machine having the virtue of
helping the compiler writer by providing a rather powerful instruction
set for hard-to-compile operations.  Figure 1 shows the machine
configuration:


  +-------------+                        +--------------+
  | inputstream |                        | outputstream |
  +-------------+                        +--------------+
             /\                           /
              \                          /
               \                        /
                \                     \/
                +-----------------------+
                |         CPU           |
                +-----------------------+
                       |        /\
                       |         |
                       |         |
                       \/        |
                +-----------------------+
    Storage:    | Instruction           |
                | Sequence              |
                +-----------------------+
                | Label Table           |
                +-----------------------+
                | Literal/Identifier    |
                | Pool                  |
                +-----------------------+
                | Variable length       |
                | string area           |
                +-----------------------+


                Fig. 1. Form Interpreter












                                                                [Page 3]

Data Reconfiguration Service                                     RFC 194


    The CPU is a box full of miscellaneous parts, the most important
being the Arithmetic Logic Unit and the instruction decoding unit.  The
CPU also maintains a collection of state registers to keep track of what
it is doing.  Figure 2 shows the rough layout.


   +-----------------+                +---------------+
   | Instruction     |                | Instruction   |
   | Counter         |                | Register      |
   +-----------------+                +---------------+
                                           |
                                           |
                                           V
                                    +----------------+
                                    | Operation Code |
                                    | Decoding       |
     Run Time Stack                 +----------------+
   +------------------+                 /     |    \
   |   Operands       |                /      |     \
   +------------------+              \/       V     \/
   |                  |               +-----------------+
   +------------------+              /   Instruction     \
   |                  |              |   Interpreter     |
   +------------------+              |   Routines        |
   |                  |               \                 /
   +------------------+                +---------------+
   |                  |                    |      /\
   +------------------+                    |       |
   |                  |                    |       |
   +------------------+                    V       |
   |                  |                +---------------+
   +------------------+ <------------- | Arithmetic    |
   |                  | -------------> | Logic Unit    |
   +------------------+                +---------------+
   |                  |
   +------------------+
   |                  |
   +------------------+


   +------------------+                +------------------+
   |Initial Input Ptr.|                | Output pointer   |
   +------------------+                +------------------+

   +------------------+                +------------------+
   |Current Input Ptr.|                | True/False Flag  |
   +------------------+                +------------------+




                                                                [Page 4]

Data Reconfiguration Service                                     RFC 194


Fig.  2.  The Central Processor

     The CPU is a stack machine driven by a Polish postfix instruction
sequence.  Operands placed on the Run Time Stack are used for arithmetic
expression evaluation and for parameter passing between the interpreter
and the built-in functions.
     The Current Input Pointer and the Output Pointer keep track of the
two data streams.  Two input pointers are needed because of the backup
requirement in the event of rule failure.  All of these pointers are bit
pointers into the two streams.
     Various implementations of the Run Time Stack are independent of
the interpretation of the DRS machine's instruction set.  It is
suggested that the stack will contain instruction operands from the
instruction stream.
     The format of a compiled instruction sequence for a form is shown
in Fig. 3.

                        16 bits
                 +--------/\---------+
                /                     \

                +---------------------+
                |  length n in bytes  |
           +--  +---------------------+
           |    |                     |
           |    |     compiled        |
           |    |     16-bit          |
        n <     |     instructions    |
           |    |                     |
           |    |                     |
           |    |                     |
           +--  +---------------------+


       Fig. 3.  Compiled Instruction Sequence Format
















                                                                [Page 5]

Data Reconfiguration Service                                     RFC 194


   The format of the compiled Label Table is shown in Fig. 4.

                                       16 bits
                                  +-----/\-------+
                                 /                \

                                 +-----------------+
                                 |  length n       |
                                 |  in bytes       |
        +--   +------------------+-----------------+
        |     | numeric value of |  byte offset    |
        |     | statement number |  in inst. seq.  |
        |     +------------------+-----------------+
        |     |        :                :          |
     n <      |        :                :          |
        |     |        :                :          |
        |     |                                    |
        |     |                                    |
        |     |                                    |
        +--   +------------------------------------+

              \_________________ _________________/
                                V
                              32 bits


                    Fig. 4.  Compiled Label Table
























                                                                [Page 6]