song.sym

来自「实现音乐播放的FPGA的实验源码（Verilog语言）」· SYM 代码 · 共 43 行

VERSION 5
BEGIN SYMBOL 
SYMBOLTYPE BLOCK
TIMESTAMP 2006 5 27 2 2 3
SYMATTR VeriModel "song"
SYMPIN 0 -160 Input clk
SYMPIN 0 -32 Input index(2:0)
SYMPIN 384 -160 Output speaker
SYMPIN 384 -96 Output seg(6:0)
SYMPIN 384 -32 Output seg_scan(2:0)
RECTANGLE N 64 -192 320 0 
BEGIN DISPLAY 192 -200 ATTR SymbolName
    ALIGNMENT BCENTER
    FONT 56 "Arial"
END DISPLAY
LINE N 64 -160 0 -160 
BEGIN DISPLAY 72 -160 PIN clk ATTR PinName
    FONT 24 "Arial"
END DISPLAY
LINE N 64 -32 0 -32 
BEGIN DISPLAY 72 -32 PIN index(2:0) ATTR PinName
    FONT 24 "Arial"
END DISPLAY
RECTANGLE N 0 -44 64 -20 
LINE N 320 -160 384 -160 
BEGIN DISPLAY 312 -160 PIN speaker ATTR PinName
    ALIGNMENT RIGHT
    FONT 24 "Arial"
END DISPLAY
LINE N 320 -96 384 -96 
BEGIN DISPLAY 312 -96 PIN seg(6:0) ATTR PinName
    ALIGNMENT RIGHT
    FONT 24 "Arial"
END DISPLAY
RECTANGLE N 320 -108 384 -84 
LINE N 320 -32 384 -32 
BEGIN DISPLAY 312 -32 PIN seg_scan(2:0) ATTR PinName
    ALIGNMENT RIGHT
    FONT 24 "Arial"
END DISPLAY
RECTANGLE N 320 -44 384 -20 
END SYMBOL