issue.c

计算机系统结构的讲义,浓缩了一本一千多页的书.真的是好东西.

            wait = readBegin2 + 1;
        }
        opPtr->rdReady = wait;
        
      }

      if (machPtr->opsList == NULL || 
          opPtr->rdReady < machPtr->opsList->rdReady) {
        opPtr->nextPtr = machPtr->opsList;
        machPtr->opsList = opPtr;
      } else {
        for (opPtr2 = machPtr->opsList; opPtr2->nextPtr != NULL; 
    	    opPtr2 = opPtr2->nextPtr) 
          if (opPtr->rdReady < opPtr2->nextPtr->rdReady) break;
        opPtr->nextPtr = opPtr2->nextPtr;
        opPtr2->nextPtr = opPtr;
      }
      machPtr->func_units[unitType][i] = opPtr->rdReady; 

      if (load_store)  {
        opPtr->address = opPtr->source1[0] + wordPtr->extra;
      }
      sprintf(w, ".sco.c.%s%d ", functionTypes[unitType], i);
      GenUpdateStruct(machPtr, w, machPtr->cycleDisplayMode, INSERT_HIGHLIGHT,
	  machPtr->cycleCount, opPtr->rdReady, msg, "", "", "", "");
      GenUpdateStruct(machPtr, w, 1, HIGHLIGHT_WRITE, opPtr->rdReady, opPtr->rdReady,
          "", "", "", "", "");
      GenUpdateStruct(machPtr, "", 1, SHOW_LINE, opPtr->rdReady, opPtr->rdReady, 
          "r", w, "", "", ""); 

      sprintf (msg, "%-20.20s %8d %8d %8d",
        Asm_Disassemble(machPtr, machPtr->memPtr[machPtr->regs[PC_REG]].value, 
              Sim_GetPC(machPtr) & ~0x3),   
        machPtr->cycleCount, readBegin, readBegin + 1); 
      if (opPtr->rdReady == (readBegin + 2))
         sprintf(part1, "          %-8d", opPtr->rdReady);
      else 
         sprintf(part1, "-%-8d %-8d", opPtr->rdReady - 1, opPtr->rdReady);
      strcat(msg, part1);
      GenUpdateStruct(machPtr, ".sco.c.frame.table  ", machPtr->cycleDisplayMode,
          ADD_END, machPtr->cycleCount, machPtr->cycleCount, msg, "", "", "", "");


      
      if (machPtr->cycleCount < opPtr->rs1Ready - 1 && 
          opPtr->rs1Ready < opPtr->rs2Ready) {
        GenUpdateStruct(machPtr, w, 1, DELETE_INSERT,
            machPtr->waiting_regs[wordPtr->rs1], 
            opPtr->rdReady, OpCode, Qblank, Qk, "Yes No  ", "");
      } else if (machPtr->cycleCount < opPtr->rs2Ready - 1 && 
          opPtr->rs2Ready < opPtr->rs1Ready) {
        GenUpdateStruct(machPtr, w, 1, DELETE_INSERT, 
            machPtr->waiting_regs[wordPtr->rs2],
            opPtr->rdReady, OpCode, Qj, Qblank, "No  Yes ", "");
      } else if (machPtr->cycleCount < opPtr->rs1Ready - 1 && 
          opPtr->rs1Ready == opPtr->rs2Ready) {
        GenUpdateStruct(machPtr, w, 1, DELETE_INSERT, 
            machPtr->waiting_regs[wordPtr->rs1],
            opPtr->rdReady, OpCode, Qblank, Qblank, "Yes Yes ", "");
      } else if (machPtr->cycleCount < opPtr->rs1Ready - 1 && 
          opPtr->rs2 == -1) {
        GenUpdateStruct(machPtr, w, 1, DELETE_INSERT, 
            machPtr->waiting_regs[wordPtr->rs1],
            opPtr->rdReady, OpCode, Qblank, Qblank, "Yes Yes  ", "");
      } else if (machPtr->cycleCount < opPtr->rs2Ready  - 1 && 
          opPtr->rs1 == -1) {
        GenUpdateStruct(machPtr, w, 1, DELETE_INSERT, 
            machPtr->waiting_regs[wordPtr->rs2],
            opPtr->rdReady, OpCode, Qblank, Qblank, "Yes  Yes ", "");
      }
      GenUpdateStruct(machPtr, w, 1, DELETE_INSERT, 
          readBegin, opPtr->rdReady, OpCode, Qblank, Qblank, "No  No  ", "");
      

      if (rdType && wordPtr->rd) {
        machPtr->waiting_regs[wordPtr->rd] = opPtr->rdReady;
        machPtr->Qi_regs[wordPtr->rd] = opPtr->unit;
        machPtr->sameCycle_regs[wordPtr->rd] = 0;
        sprintf(w, ".sco.c.reg%d ", wordPtr->rd);
        GenUpdateStruct(machPtr, w, machPtr->cycleDisplayMode, INSERT_HIGHLIGHT,
	    machPtr->cycleCount, opPtr->rdReady, Units[opPtr->unit], 
            "", "", "", "");
        if (rdType  == DFP_OP) {
          machPtr->waiting_regs[wordPtr->rd + 1] = opPtr->rdReady;
          machPtr->Qi_regs[wordPtr->rd + 1] = opPtr->unit;
          sprintf(w, ".sco.c.reg%d ", wordPtr->rd + 1);
          GenUpdateStruct(machPtr, w, machPtr->cycleDisplayMode, INSERT_HIGHLIGHT,
	      machPtr->cycleCount, opPtr->rdReady, Units[opPtr->unit], 
              "", "", "", "");

        }
      }
      break;

    }
  }

  return opPtr;
}


void
Isu_CleanFinished (machPtr, window, cycleCount)
     DLX *machPtr;              /* Machine of interest. */
     char *window;
     int cycleCount;
{
  Op *opPtr;
  int unitType, unitNumber;
  char w[20];


  while (machPtr->finishList != NULL) {
    opPtr = machPtr->finishList;
    machPtr->finishList = opPtr->nextPtr;
    unitType = opPtr->unit / MAX_FUNC_UNITS;
    unitNumber = opPtr->unit % MAX_FUNC_UNITS;
    sprintf(w, "%s.c.%s%d ", window, functionTypes[unitType], unitNumber);
    Tcl_VarEval(machPtr->interp, "lindex [", w, " tag configure gray -background] 4", 
        (char *)NULL);
    if (!strcmp(machPtr->interp->result, "gray")) {
      Tcl_VarEval(machPtr->interp, w, "delete 1.0 end", (char *)NULL);
    }

    if (opPtr->resultType != NON_OP &&
       machPtr->waiting_regs[opPtr->rd] == 0) {
      sprintf(w, "%s.c.reg%d ", window, opPtr->rd);
      Tcl_VarEval(machPtr->interp, w, "delete 1.0 end", (char *)NULL);
      if (opPtr->resultType == DFP_OP) {
        sprintf(w, "%s.c.reg%d ", window, opPtr->rd + 1);
        Tcl_VarEval(machPtr->interp, w, "delete 1.0 end", (char *)NULL);
      }
    } 
    
    Isu_FreeOp (machPtr, opPtr);
  }

  while (machPtr->opsList != NULL && 
	 machPtr->opsList->rdReady <= cycleCount) {

    opPtr = machPtr->opsList;
    machPtr->opsList = opPtr->nextPtr;
    unitType = opPtr->unit / MAX_FUNC_UNITS;
    unitNumber = opPtr->unit % MAX_FUNC_UNITS;
    if (opPtr->rdReady < cycleCount) {
      sprintf(w, "%s.c.%s%d ", window, functionTypes[unitType], unitNumber);
      Tcl_VarEval(machPtr->interp, w, "delete 1.0 end", (char *)NULL);
      if (opPtr->resultType != NON_OP &&
          machPtr->waiting_regs[opPtr->rd] == 0) {
        sprintf(w, "%s.c.reg%d ", window, opPtr->rd);
        Tcl_VarEval(machPtr->interp, w, "delete 1.0 end", (char *)NULL);
        if (opPtr->resultType == DFP_OP) {
          sprintf(w, "%s.c.reg%d ", window, opPtr->rd + 1);
          Tcl_VarEval(machPtr->interp, w, "delete 1.0 end", (char *)NULL);
        }
      }
      Isu_FreeOp(machPtr, opPtr);
    } else {
      opPtr->nextPtr = machPtr->finishList;
      machPtr->finishList = opPtr;
    } 
    
  }

}


void
Isu_WriteBack (machPtr)
     DLX *machPtr;              /* Machine of interest. */
{
  Op *opPtr; 
  int unitType, unitNumber;

  opPtr = machPtr->opsList;
  while (opPtr != NULL && opPtr->rdReady <= machPtr->cycleCount) {
    unitType = opPtr->unit / MAX_FUNC_UNITS;
    unitNumber = opPtr->unit % MAX_FUNC_UNITS;
    if (machPtr->config == BASICPIPE || 
        machPtr->func_units[unitType][unitNumber] == opPtr->rdReady) {
      machPtr->func_units[unitType][unitNumber] = 0;

      if (opPtr->resultType != NON_OP &&
          opPtr->rdReady == machPtr->waiting_regs[opPtr->rd]) {
        switch (opPtr->resultType) {
          case INT_OP:  
            *((int *)&(machPtr->regs[opPtr->rd])) = *((int *)&(opPtr->result[0]));
            break;    
          case SFP_OP: 
            *((float *)&(machPtr->regs[opPtr->rd])) = *((float *)&(opPtr->result[0]));
            break;
          case DFP_OP: 
            *((double *)&(machPtr->regs[opPtr->rd])) = *((double *)&(opPtr->result[0]));
            machPtr->waiting_regs[opPtr->rd + 1] = 0;
            break;
        } 
        machPtr->waiting_regs[opPtr->rd] = 0;
      }
    }
    if (machPtr->config == BASICPIPE) {
        machPtr->opsList = opPtr->nextPtr;
        Isu_FreeOp(machPtr, opPtr);
        opPtr = machPtr->opsList;
    } else {
      opPtr = opPtr->nextPtr;
    }
  }



  if (machPtr->config != BASICPIPE && !machPtr->cycleDisplayMode) {
    if (machPtr->config == TOMASULO)
      Isu_CleanFinished (machPtr, ".tom", machPtr->cycleCount);
    else 
      Isu_CleanFinished (machPtr, ".sco", machPtr->cycleCount);  
  }
  
}
 


/*
 *----------------------------------------------------------------------
 *
 * WhichOp --
 *
 *	Return a pointer to Op for which a givn FP register is waiting.
 *
 * Results:
 *	See above
 *
 * Side effects:
 *
 *----------------------------------------------------------------------
 */

static Op *
WhichOp(machPtr, number)
    DLX *machPtr;			/* Machine description. */
    int number;			        /* FP register number . */
{
    Op *opPtr;
    int unit = machPtr->Qi_regs[number];

    for (opPtr = machPtr->opsList; opPtr != NULL; opPtr = opPtr->nextPtr) 
	if (opPtr->unit == unit) 
            return opPtr;

    /* should not reach here */
    return NULL;

}


/*
 *----------------------------------------------------------------------
 *
 * mallocOp --
 *
 *	Return a pointer to an unused Op structure.
 *
 * Results:
 *	See above
 *
 * Side effects:
 *
 *----------------------------------------------------------------------
 */

static Op *
mallocOp(machPtr)
    DLX *machPtr;			/* Machine description. */
{
    Op *p;

    if (!machPtr->opFree) 
	p = (Op *)malloc(sizeof(Op));
    else {
	p = machPtr->opFree;
        machPtr->opFree = machPtr->opFree->nextPtr; 
    }
    return p;
}


/*
 *----------------------------------------------------------------------
 *
 * Isu_FreeOp --
 *
 *	Free what is pointed to
 *
 * Results:
 *	See above
 *
 * Side effects:
 *
 *----------------------------------------------------------------------
 */

void
Isu_FreeOp(machPtr, p)
    DLX *machPtr;			/* Machine description. */
    Op *p;
{
    p->nextPtr = machPtr->opFree;
    machPtr->opFree = p;
}


/*
 *----------------------------------------------------------------------
 *
 * mallocUpdate --
 *
 *	Return a pointer to an unused Update structure.
 *
 * Results:
 *	See above
 *
 * Side effects:
 *
 *----------------------------------------------------------------------
 */

static Update *
mallocUpdate(machPtr)
    DLX *machPtr;			/* Machine description. */
{
    Update *p;

    if (!machPtr->updateFree) 
	p = (Update *)malloc(sizeof(Update));
    else {
	p = machPtr->updateFree;
        machPtr->updateFree = machPtr->updateFree->nextPtr; 
    }
    return p;
}


/*
 *----------------------------------------------------------------------
 *
 * Isu_FreeUpdate --
 *
 *	Free what is pointed to
 *
 * Results:
 *	See above
 *
 * Side effects:
 *
 *----------------------------------------------------------------------
 */

void
Isu_FreeUpdate(machPtr, p)
    DLX *machPtr;			/* Machine description. */
    Update *p;
{
    p->nextPtr = machPtr->updateFree;
    machPtr->updateFree = p;
}


/*
 *----------------------------------------------------------------------
 *
 * mallocBypass --
 *
 *	Return a pointer to an unused Bypass structure.
 *
 * Results:
 *	See above
 *
 * Side effects:
 *
 *----------------------------------------------------------------------
 */

static Bypass *
mallocBypass(machPtr)
    DLX *machPtr;			/* Machine description. */
{
    Bypass *p;

    if (!machPtr->bypassFree) 
	p = (Bypass *)malloc(sizeof(Bypass));
    else {
	p = machPtr->bypassFree;
        machPtr->bypassFree = machPtr->bypassFree->nextPtr; 
    }
    return p;
}

/*
 *----------------------------------------------------------------------
 *
 * Isu_FreeBypass --
 *
 *	Free what is pointed to
 *
 * Results:
 *	See above
 *
 * Side effects:
 *
 *----------------------------------------------------------------------
 */

void
Isu_FreeBypass(machPtr, p)
    Bypass *p;
    DLX *machPtr;			/* Machine description. */
{
    p->nextPtr = machPtr->bypassFree;
    machPtr->bypassFree = p;
}


/*
 *----------------------------------------------------------------------
 *
 * BypassInsert --
 *
 *	Insert a bypass buffer element into the bypass list in basic pipeline.
 *
 * Results:
 *	See above
 *
 * Side effects:
 *
 *----------------------------------------------------------------------
 */

static void
BypassInsert(machPtr, buffer, displayCycle, reg)
    DLX *machPtr;			/* Machine description. */
    int buffer;
    int displayCycle;
    int reg;
{
    Bypass *bPtr;
    Bypass *bypassPtr;

    bypassPtr = mallocBypass(machPtr);
    bypassPtr->buffer = buffer;
    bypassPtr->displayCycle = displayCycle;
    bypassPtr->reg = reg;

    if (machPtr->bypassList == NULL || 
        displayCycle < machPtr->bypassList->displayCycle) {
      bypassPtr->nextPtr = machPtr->bypassList;
      machPtr->bypassList = bypassPtr;
    } else {
      for (bPtr = machPtr->bypassList; bPtr->nextPtr != NULL; 
          bPtr = bPtr->nextPtr) 
        if (displayCycle < bPtr->nextPtr->displayCycle) break;
      bypassPtr->nextPtr = bPtr->nextPtr;
      bPtr->nextPtr = bypassPtr;
    }

}