issue.c

计算机系统结构的讲义,浓缩了一本一千多页的书.真的是好东西.

        if (load_store) {
          BypassInsert(machPtr, MEM_BUF0, opPtr->rdReady, opPtr->rd);
          BypassInsert(machPtr, MEM_BUF1, opPtr->rdReady + 1, opPtr->rd);
        } else if (unitType == INT) {
          BypassInsert(machPtr, RESULT_BUF1, opPtr->rdReady + 1, opPtr->rd);
          BypassInsert(machPtr, RESULT_BUF2, opPtr->rdReady + 2, opPtr->rd);
          BypassInsert(machPtr, RESULT_BUF3, opPtr->rdReady + 3, opPtr->rd);
        } else {
          BypassInsert(machPtr, RESULT_BUF1_FP, opPtr->rdReady + 1, opPtr->rd);
          BypassInsert(machPtr, RESULT_BUF2_FP, opPtr->rdReady + 2, opPtr->rd);
        }

        machPtr->waiting_regs[wordPtr->rd] = opPtr->rdReady; 
        if (rdType  == DFP_OP) {
          machPtr->waiting_regs[wordPtr->rd + 1] = opPtr->rdReady;
        }
      }

      /* The following codes deal with visulization. */

      sprintf(part1, "%s",       
        Asm_Disassemble(machPtr, machPtr->memPtr[machPtr->regs[PC_REG]].value, 
              Sim_GetPC(machPtr) & ~0x3)); 


      /* Generate clock cycle table for the 5 most recent instructions. */
      if (machPtr->insCount >= 5) {
        k = 0;
        while (!strncmp(machPtr->cycleTable[1] + k, "nonop ", 6) || 
	    !strncmp(machPtr->cycleTable[1] + k, "stall ", 6)) 
          k += 6;
        
	for (j = 0; j < 4; j++) {
          strcpy(machPtr->cycleTable[j],  machPtr->cycleTable[j + 1] + k);
        }

        machPtr->cycleHead += k/6;
        cycleTemp = machPtr->cycleTable[4];
      } else {
	cycleTemp = machPtr->cycleTable[machPtr->insCount];
      }

      k = machPtr->lastIF + 1 - machPtr->cycleHead;
      cycleTemp[0] ='\0';
      while (k > 0) {
	strcat(cycleTemp, "nonop ");
        k--;
      }

      k = IF -  machPtr->lastIF;
      while (k > 1) {
	strcat(cycleTemp, "stall ");
        k--;
      }

      strcat(cycleTemp, "IF ");
      k = ID - IF;
      while (k > 1) {
	strcat(cycleTemp, "stall ");
        k--;
      }

      strcat(cycleTemp, "ID ");
      k = EX - ID;
      while (k > 1) {
	strcat(cycleTemp, "stall ");
        k--;
      }
      strcat(cycleTemp, "EX ");

      k = MEM - EX;
      while (k > 1) {
	strcat(cycleTemp, "EX ");
        k--;
      }
      strcat(cycleTemp, "MEM WB ");
      sprintf(cycleTemp, "%s {%s %s}", cycleTemp, instrcolor, part1);
      
      sprintf(msg, "BasGenTable %d %d %d ", machPtr->cycleHead, WB, IF);
      Tcl_VarEval(machPtr->interp, msg, "{", machPtr->cycleTable[0], "} ",
          "{", machPtr->cycleTable[1], "} ",      
          "{", machPtr->cycleTable[2], "} ",      
          "{", machPtr->cycleTable[3], "} ",      
          "{", machPtr->cycleTable[4], "} ", (char *)NULL);


      /* visulization in datapath */
      GenUpdateStruct(machPtr, "InstrIF ", 1, BAS_HIGHLIGHT_TEXT, IF, IF, 
	  instrcolor, part1, "", "", ""); 
      GenUpdateStruct(machPtr, "InstrID ", 1, BAS_HIGHLIGHT_TEXT, ID, ID, 
	  instrcolor, part1, "", "", ""); 
      if (unitType == INT && !branch) {
        GenUpdateStruct(machPtr, "InstrEX ", 1, BAS_HIGHLIGHT_TEXT, EX, EX, 
	    instrcolor, part1, "", "", ""); 
        GenUpdateStruct(machPtr, "InstrMEM ", 1, BAS_HIGHLIGHT_TEXT, MEM, MEM, 
	    instrcolor, part1, "", "", ""); 
        GenUpdateStruct(machPtr, "InstrWB ", 1, BAS_HIGHLIGHT_TEXT, WB, WB, 
	    instrcolor, part1, "", "", ""); 
      }

      if (rs1Type != NON_OP && rs1Type != IMM_OP) {
	if (wordPtr->rs1 < 32) {
	  sprintf(part1, "R%d ", wordPtr->rs1); 
          GenUpdateStruct(machPtr, "RegA ", 1, BAS_HIGHLIGHT_TEXT, ID, ID, 
	      instrcolor, part1, "", "", ""); 
        } else if (wordPtr->rs1 < 64) {
	  sprintf(part1, "F%d ", wordPtr->rs1 - 32); 
          GenUpdateStruct(machPtr, "RegA ", 1, BAS_HIGHLIGHT_TEXT, ID, ID, 
	      instrcolor, part1, "", "", ""); 
        }
      }

      if (rs2Type != NON_OP && rs2Type != IMM_OP && !load_store) {
	if (wordPtr->rs2 < 32) {
	  sprintf(part1, "R%d ", wordPtr->rs2); 
          GenUpdateStruct(machPtr, "RegB ", 1, BAS_HIGHLIGHT_TEXT, ID, ID, 
	      instrcolor, part1, "", "", ""); 
        } else if (wordPtr->rs2 < 64) {
	  sprintf(part1, "F%d ", wordPtr->rs2 - 32); 
          GenUpdateStruct(machPtr, "RegB ", 1, BAS_HIGHLIGHT_TEXT, ID, ID, 
	      instrcolor, part1, "", "", ""); 
        }
      }

      GenUpdateStruct(machPtr, "StageIF ", 1, BAS_HIGHLIGHT_LINE, 
	  IF, IF, instrcolor, "", "", "", ""); 
      GenUpdateStruct(machPtr, "StageID ", 1, BAS_HIGHLIGHT_LINE, 
	  ID, ID, instrcolor, "", "", "", "");
      
      if (unitType == INT) {
        if (rdType != NON_OP && wordPtr->rd) {
	  if (wordPtr->rd < 32) {
	    sprintf(part1, "R%d ", wordPtr->rd); 
            GenUpdateStruct(machPtr, "RegDest ", 1, BAS_HIGHLIGHT_TEXT, WB, WB, 
	        instrcolor, part1, "", "", ""); 
          } else if (wordPtr->rd < 64) {
	    sprintf(part1, "F%d ", wordPtr->rd - 32); 
            GenUpdateStruct(machPtr, "RegDest ", 1, BAS_HIGHLIGHT_TEXT, WB, WB, 
	        instrcolor, part1, "", "", ""); 
          }
          if (load_store)      /* a load instr */
            GenUpdateStruct(machPtr, "RegMemDest ", 1, BAS_HIGHLIGHT_LINE, 
	        WB, WB, instrcolor, "", "", "", "");
          else 
            GenUpdateStruct(machPtr, "RegAluDest ", 1, BAS_HIGHLIGHT_LINE, 
	        WB, WB, instrcolor, "", "", "", "");
        }

        if (branch) {
          /* when the branch condition needs to be forwarded,
	     up to 2 previous ALU instructions and up to 3 previous
	     load instructions need to be considered. 
             Suppose the branch is instruction (i), then
	     (i-1) ALU -> (i) branch :   result_buf1 (cause a stall first)
             (i-2) ALU -> (i) branch :   result_buf1 
             (i-3) ALU -> (i) branch :   result_buf2
	     (i-1) load -> (i) branch:   mem_buf1 (cause 2 stalls first) 
             (i-2) load -> (i) branch:   mem_buf1 (cause a stall first)
             (i-3) load -> (i) branch:   mem_buf1 
          */
          GenUpdateStruct(machPtr, "StageIDBranch ", 1, BAS_HIGHLIGHT_LINE,  
	      ID, ID, instrcolor, "", "", "", "");
          if (wordPtr->rs1 == result_buf1) {
            sprintf(part1, "BranchRes1 ");
          } else if (wordPtr->rs1 == result_buf2) {
            sprintf(part1, "BranchRes2 ");
          } else if (wordPtr->rs1 == result_buf3) {
            sprintf(part1, "BranchRes3 ");
          } else if (wordPtr->rs1 == mem_buf1) { 
            sprintf(part1, "BranchMem1 ");
          } else {
            sprintf(part1, "BranchReg ");
          }
          GenUpdateStruct(machPtr, part1, 1, BAS_HIGHLIGHT_LINE, 
	      ID, ID, instrcolor, "", "", "", "");
        } else {
          GenUpdateStruct(machPtr, "StageEX ", 1, BAS_HIGHLIGHT_LINE,  
	      EX, EX, instrcolor, "", "", "", "");
          GenUpdateStruct(machPtr, "StageMEM ", 1, BAS_HIGHLIGHT_LINE,   
	      MEM, MEM, instrcolor, "", "", "", "");
          GenUpdateStruct(machPtr, "StageWB ", 1, BAS_HIGHLIGHT_LINE, 
	      WB, WB, instrcolor, "", "", "", "");
          if (rs1Type) {
            if (wordPtr->rs1 == result_buf1) {
              sprintf(part1, "AluARes1 ");
            } else if (wordPtr->rs1 == result_buf2) {
              sprintf(part1, "AluARes2 ");
            } else if (wordPtr->rs1 == mem_buf1) { 
              sprintf(part1, "AluAMem1 ");
            } else {
              sprintf(part1, "AluAReg ");
            }
            GenUpdateStruct(machPtr, part1, 1, BAS_HIGHLIGHT_LINE, 
	        EX, EX, instrcolor, "", "", "", "");
          }
          if (rs2Type && !load_store) {
            if (rs2Type == IMM_OP) {
              sprintf(part1, "AluBImme ");
            } else if (wordPtr->rs2 == result_buf1) {
              sprintf(part1, "AluBRes1 ");
            } else if (wordPtr->rs2 == result_buf2) {
              sprintf(part1, "AluBRes2 ");
            } else if (wordPtr->rs2 == mem_buf1) { 
              sprintf(part1, "AluBMem1 ");
            } else {
              sprintf(part1, "AluBReg ");
            }
            GenUpdateStruct(machPtr, part1, 1, BAS_HIGHLIGHT_LINE, 
	        EX, EX, instrcolor, "", "", "", "");
          }
          if (load_store) {  
            /* when the value to be stored needs to be forwarded,
	       up to 3 previous ALU instructions and up to 2 previous
	       load instructions need to be considered. Since fp
	       datapath is not shown here, the bypassing from an fp
	       instruction to a store is ignored.
               Suppose the store is instruction (i), then
	       (i-1) ALU -> (i) store :   result_buf1 (actually from MEM/WB reg)
               (i-2) ALU -> (i) store :   result_bif2 (should from WB/EXTRA reg)
	       (i-1) load -> (i) store:   mem_buf0 (actually form MEM/WB reg)
               (i-2) load -> (i) store:   mem_buf1 (should from WB/EXTRA reg)
            */
            GenUpdateStruct(machPtr, "AluBImme ", 1, BAS_HIGHLIGHT_LINE, 
	        EX, EX, instrcolor, "", "", "", "");
	    if (rs2Type) {      /* store instruction */
              if (wordPtr->rs2 == mem_buf0) { 
                GenUpdateStruct(machPtr, "MemMem0 ", 1, BAS_HIGHLIGHT_LINE, 
	            MEM, MEM, instrcolor, "", "", "", "");
              } else if (wordPtr->rs2 == mem_buf1) { 
                GenUpdateStruct(machPtr, "MemMem1 ", 1, BAS_HIGHLIGHT_LINE, 
	            MEM, MEM, instrcolor, "", "", "", "");
	      } else if (wordPtr->rs2 == result_buf1) {
                GenUpdateStruct(machPtr, "MemRes1 ", 1, BAS_HIGHLIGHT_LINE, 
	            MEM, MEM, instrcolor, "", "", "", "");
              } else if (wordPtr->rs2 == result_buf2) {
                GenUpdateStruct(machPtr, "MemRes2 ", 1, BAS_HIGHLIGHT_LINE, 
	            MEM, MEM, instrcolor, "", "", "", "");
              } else {
                bypassPtr = machPtr->bypassList;
                while (bypassPtr != NULL && bypassPtr->displayCycle == MEM) {
		  if (bypassPtr->reg == wordPtr->rs2 && 
		      (bypassPtr->buffer == RESULT_BUF1_FP ||
		       bypassPtr->buffer == RESULT_BUF2_FP))
                    fpbypass_to_store = 1;
                  bypassPtr = bypassPtr->nextPtr;
                }
                if (!fpbypass_to_store)
                  GenUpdateStruct(machPtr, "MemReg ", 1, BAS_HIGHLIGHT_LINE, 
	              MEM, MEM, instrcolor, "", "", "", "");
              }
	    }
	  }
        }
      }

      /* visualization in block diagram */
      GenUpdateStruct(machPtr, "RectIF ", 1, BAS_HIGHLIGHT_RECT, 
	  IF, IF, instrcolor, "", "", "", ""); 
      GenUpdateStruct(machPtr, "RectID ", 1, BAS_HIGHLIGHT_RECT, 
	  ID, ID, instrcolor, "", "", "", "");
      for (j = EX; j < MEM; j++) {
        switch (unitType) {
	  case INT:
            sprintf(part1, "RectEXInt ");
            break;
	  case FP_ADD:
            sprintf(part1, "RectEXAdd%d.%d ", i, j-EX+1);
            break;
	  case FP_MUL:
            sprintf(part1, "RectEXMul%d.%d ", i, j-EX+1);
            break;
	  case FP_DIV:
            sprintf(part1, "RectEXDiv%d.%d ", i, j-EX+1);
            break;
	}
        GenUpdateStruct(machPtr, part1, 1, BAS_HIGHLIGHT_RECT, 
	    j, j, instrcolor, "", "", "", "");
      }
      GenUpdateStruct(machPtr, "RectMEM ", 1, BAS_HIGHLIGHT_RECT, 
	  MEM, MEM, instrcolor, "", "", "", "");
      GenUpdateStruct(machPtr, "RectWB ", 1, BAS_HIGHLIGHT_RECT, 
	  WB, WB, instrcolor, "", "", "", "");


      while (machPtr->updateList != NULL && 
          machPtr->updateList->displayCycle < IF) {
	updatePtr = machPtr->updateList;
        machPtr->updateList = updatePtr->nextPtr;
        Isu_FreeUpdate(machPtr, updatePtr);
      }

      machPtr->lastIF = IF;
      if (machPtr->cycleDisplayMode)
        return opPtr;

      strcpy(linelist, "{");
      strcpy(linecolorlist, "{");
      strcpy(textlist, "{");
      strcpy(textcolorlist, "{");
      strcpy(rectlist, "{");
      strcpy(rectcolorlist, "{");
      while (machPtr->updateList != NULL && 
          machPtr->updateList->displayCycle == IF) {
	updatePtr = machPtr->updateList;
        machPtr->updateList = updatePtr->nextPtr;
        switch (updatePtr->actionType) {
	  case BAS_HIGHLIGHT_LINE:
            strcat(linelist, updatePtr->w);
	    strcat(linecolorlist, updatePtr->msg);
	    break;
	  case BAS_HIGHLIGHT_TEXT:
            strcat(textlist, updatePtr->w);
	    strcat(textcolorlist, "{");
	    strcat(textcolorlist, updatePtr->msg);
	    strcat(textcolorlist, "} ");
	    break;
	  case BAS_HIGHLIGHT_RECT:
            strcat(rectlist, updatePtr->w);
	    strcat(rectcolorlist, updatePtr->msg);
	    break;
        }
        Isu_FreeUpdate(machPtr, updatePtr);
      }
      strcat(linelist, "} ");
      strcat(linecolorlist, "} ");
      strcat(textlist, "} ");
      strcat(textcolorlist, "} ");
      strcat(rectlist, "} ");
      strcat(rectcolorlist, "} ");
      Tcl_VarEval(machPtr->interp, "BasVisual ", linelist, linecolorlist,
          textlist, textcolorlist, rectlist, rectcolorlist, (char *)NULL); 

      break;
    }

    case TOMASULO: {
      char OpCode[7],  Vj[20], Qj[20], Vk[20], Qk[20], w[20];
      char *Vblank = "         ";
      char *Qblank = "        ";
      int execBegin;
      Update *updateLinePtr = NULL;

      machPtr->cycleDisplayCount = machPtr->cycleCount;
      switch (unitType) {
        case BRANCH:
	  unitType = INT;
        case INT:
          num_units = machPtr->num_int_units;
          latency = machPtr->int_latency;
          break;
        case FP_ADD:
          num_units = machPtr->num_add_units;
          latency = machPtr->fp_add_latency;
          break;
        case FP_MUL:
          num_units = machPtr->num_mul_units;
          latency = machPtr->fp_mul_latency;
          break;
        case FP_DIV:
          latency = machPtr->fp_div_latency;
          if (machPtr->fp_div_exist) {
            num_units = machPtr->num_div_units;
          } else {
    	    unitType = FP_MUL;
            num_units = machPtr->num_mul_units;
          }
          break; 
        case LOAD_BUF:  
          load_store = 1;   
          if (machPtr->ld_st_exist) {
            num_units = machPtr->num_load_bufs;
            latency = machPtr->load_buf_latency;
          } else {
            unitType = INT;
            num_units = machPtr->num_int_units;
            latency = machPtr->int_latency;
          }
          break;
        case STORE_BUF:
          load_store = 1;
          if (machPtr->ld_st_exist) {
            num_units = machPtr->num_store_bufs;
            latency = machPtr->store_buf_latency;
          } else {
            unitType = INT;
            num_units = machPtr->num_int_units;
            latency = machPtr->int_latency;
          }
          break;
      } 
    
    
      issueCheck1:
      for (i = 0, soonest = 0x7fffffff; i < num_units; i++) {
        if (!(j = machPtr->func_units[unitType][i])) 
          break;
        else 
          if (j < soonest) 
            soonest = j;
      }
      if (i == num_units) {
        machPtr->stalls = soonest - machPtr->cycleCount;
        machPtr->cycleCount = soonest;
        Isu_WriteBack(machPtr);
        machPtr->cycleCount++;
        goto issueCheck1;
      }

      Tcl_VarEval(machPtr->interp, ".tom.c delete thickLine", (char *)NULL);

      opPtr = mallocOp(machPtr);
      opPtr->rs1 = -1;
      opPtr->rs2 = -1;
      opPtr->rs1Ready = 0;
      opPtr->rs2Ready = 0;

      while (!machPtr->cycleDisplayMode && machPtr->updateList != NULL && 
          machPtr->updateList->displayCycle <= machPtr->cycleCount) {
	updatePtr = machPtr->updateList;
        machPtr->updateList = updatePtr->nextPtr;
        if (updatePtr->readyCycle >= machPtr->cycleCount) {
          Tcl_SetVar(machPtr->interp, "msg", updatePtr->msg, TCL_GLOBAL_ONLY);
          if (updatePtr->actionType == DELETE_INSERT) {
            Tcl_VarEval(machPtr->interp, "DeleteAndInsert ", updatePtr->w, "$msg", 
                (char *)NULL);
          } else if (updatePtr->actionType == SHOW_CDB_LINE) {
            updateLinePtr = updatePtr;
            continue;
          }
        }
        Isu_FreeUpdate(machPtr, updatePtr);
        
      }
      if (updateLinePtr != NULL) {
        updateLinePtr->nextPtr = machPtr->updateList;
        machPtr->updateList = updateLinePtr;
      }
        
    
      sprintf(w, "%d", wordPtr->line);
      GenUpdateStruct(machPtr, "", machPtr->cycleDisplayMode, 
          HIGHLIGHT_CODE, machPtr->cycleCount, machPtr->cycleCount, w, 
          "", "", "", "");

      sprintf(OpCode, "%-6.6s", operationNames[wordPtr->opCode]);
      strcpy(msg, OpCode);

      if (!machPtr->cycleDisplayMode)
        Tcl_VarEval(machPtr->interp, 
       	    ".tom.c.counter configure -text $cycleCount; UnHighLight", (char *)NULL);
                          
      execBegin = machPtr->cycleCount + 1;
      opPtr->unit = unitType * MAX_FUNC_UNITS + i;
      opPtr->resultType = rdType;
    


      if (rs1Type != NON_OP && rs1Type != IMM_OP) {
        opPtr->rs1 = wordPtr->rs1;
        if (machPtr->waiting_regs[wordPtr->rs1]) {
          opPtr->rs1Ready = machPtr->waiting_regs[wordPtr->rs1] + 1;
          execBegin = opPtr->rs1Ready;
          opPtr2 = WhichOp(machPtr, wordPtr->rs1);
          strcat(msg, Vblank);
          sprintf(Qj, "%s ", Units[opPtr2->unit]);
          strcat(msg, Qj);
          switch (rs1Type) {