dlx.h

计算机系统结构的讲义,浓缩了一本一千多页的书.真的是好东西.

#define OP_CVTD2I 	 83
#define OP_CVTF2D 	 84
#define OP_CVTF2I 	 85
#define OP_CVTI2D 	 86
#define OP_CVTI2F 	 87
#define OP_DIV 		 88
#define OP_DIVD 	 89
#define OP_DIVF 	 90
#define OP_DIVU 	 91
#define OP_EQD 		 92
#define OP_EQF 		 93
#define OP_GED 		 94
#define OP_GEF 		 95
#define OP_GTD 		 96
#define OP_GTF 		 97
#define OP_LED 		 98
#define OP_LEF 		 99
#define OP_LTD 		 100
#define OP_LTF 		 101
#define OP_MULT 	 102
#define OP_MULTD 	 103
#define OP_MULTF 	 104
#define OP_MULTU 	 105
#define OP_NED 		 106
#define OP_NEF 		 107
#define OP_SUBD 	 108
#define OP_SUBF 	 109

/* special "opcodes", give these values after the above op values */

#define OP_NOT_COMPILED  111
#define OP_UNIMP 	 112
#define OP_RES 		 113
#define OP_LAST 	 114

typedef struct {
    Tcl_Interp *interp;		/* Interpreter associated with machine (used
				 * for interpreting commands, returning
				 * errors, etc.) */
    int numWords;		/* Number of words of memory simulated for
				 * this machine. */
    int numChars;               /* Number of characters of memory */
    MemWord *memPtr;		/* Array of MemWords, sufficient to provide
				 * memSize bytes of storage. */
    char *memScratch;           /* Scratchpad for use by trap handlers */
    char *endScratch;           /* Pointer to the end of the scratch pad */
    int fd_map[FD_SIZE];        /* maps simulated fd's to actual fd's.
				 * mainly protects the real standard
				 * input, output, and error from the
				 * program.  A value of -1 means that
				 * fd is not currently in use.  */
    int regs[TOTAL_REGS];	/* General-purpose registers, followed by
				 * hi and lo multiply-divide registers,
				 * followed by program counter and next
				 * program counter.  Both pc's are stored
				 * as indexes into the memPtr array. */
    unsigned int badPC;		/* If an addressing error occurs during
				 * instruction fetch, this value records
				 * the bad address.  0 means no addressing
				 * error is pending. */
    int addrErrNum;		/* If badPC is non-zero, this gives the
				 * serial number (insCount value) of the
				 * instruction after which the addressing
				 * error is to be registered. */
    int loadReg1, loadReg2;	/* For loads, register loaded by last instruction.
				 * used to watch for stalls (0 means last
				 * instruction was not a load).  loadReg2 is
				 * used when a load double is done.  */
    int nextIF, nextID;         /* the clock cycle for  IF and ID stage of next
                                   instruction in basic pipeline configuration. */
    int lastIF;                 /* the clock cycle for  IF stage of the last
                                   instruction in basic pipeline configuration. */
    int cycleHead;              /* the clock cycle for  IF stage of the first
                                   instr when instr cycle table is displayed. */
    Bypass *bypassList;         /* the buffer list used for bypassing in
                                 * basic pipeline configuration. */
    Update *updateList;         /* the list of funcional units or reservation
				 * stations which should have their contents
				 * updated after an instruction finishes. */
    int insCount;		/* Count of total # of instructions executed
				 * in this machine (i.e. serial number of
				 * current instruction). */
    int backInsCount;		/* Count number of the second most recently excuted
                                   instruction, only used in "step back" command */
    int firstIns;		/* Serial number corresponding to first
				 * instruction executed in particular run;
				 * used to ignore stops on first ins. */
    int branchSerial;		/* Serial number of most recent branch/jump
				 * instruction;  used to set BD bit during
				 * exceptions. */
    int branchPC;		/* PC of instruction given by "branchSerial":
				 * also used during exceptions. */
    int flags;			/* Used to indicate special conditions during
				 * simulation (for greatest speed, should
				 * normally be zero).  See below for
				 * definitions. */
    int stopNum;		/* Used to assign increasing reference
				 * numbers to stops. */
    Stop *stopList;		/* First in chain of all spies and stops
				 * associated with this machine (NULL means
				 * none). */
    CallBack *callBackList;	/* First in linked list of all callbacks
				 * currently registered for this machine,
				 * sorted in increasing order of serialNum. */
    Tcl_HashTable symbols;	/* Records addresses of all symbols read in
				 * by assembler for machine. */
    IoState ioState;		/* I/O-related information for machine (see
				 * io.h and io.c for details). */
    Cop0 cop0;			/* State of coprocessor 0 (see cop0.h and
				 * cop0.c for details). */

    /* statistics */

    int	stalls;                 /* Counts load stalls, structural hazard, RAW, 
				   WAR, WAW stalls, etc. */

    int branchYes;              /* Count taken branches. */
    int branchNo;               /* Count not taken branches. */
    int	operationCount
      [OP_LAST+1];              /* Dynamic instruction counts */

    /* hardware configuration */
    int config;                 /* basic pipeline, tomasulo,  or scoreboarding */

    /* function unit stuff */

    int num_int_units;         /* Number integer units for this machine */
    int num_add_units;         /* Number FP add units for this machine. */
    int num_div_units;         /* Number FP divide units for this machine. */
    int num_mul_units;         /* Number FP multiply units for this machine. */
    int num_load_bufs;         /* Number load buffers for this machine. */
    int num_store_bufs;        /* Number store buffers for this machine. */
    int int_latency;           /* Integer unit latency for this machine */
    int fp_add_latency;        /* FP add/subtract latency for this machine. */
    int fp_div_latency;        /* FP divide latency for this machine. */
    int fp_mul_latency;        /* FP multiply latency for this machine. */
    int load_buf_latency;      /* Load buffer latency for this machine. */
    int store_buf_latency;     /* Store buffer latency for this machine. */
    int add_ful_pipe;          /* FP add unit is fully piped or not. */
    int mul_ful_pipe;          /* FP divide unit is fully piped or not. */
    int div_ful_pipe;          /* FP multiply unit is fully piped or not. */


    int int_units        
      [MAX_FUNC_UNITS];        /* 0 means unit is available, otherwise number
				 indicates cycle count when the int unit will 
				 complete its current operation. */
    int fp_add_units        
      [MAX_FUNC_UNITS];        /* 0 means unit is available, otherwise number
				 indicates cycle count when the fp adder will 
				 complete its current operation. */
    int fp_mul_units        
      [MAX_FUNC_UNITS];        /* 0 means unit is available, otherwise number
				 indicates cycle count when the fp divider will 
				 complete its current operation. */
    int fp_div_units        
      [MAX_FUNC_UNITS];        /* 0 means unit is available, otherwise number
				 indicates cycle count when the fp multiplier will 
				 complete its current operation. */

    int load_bufs	        
      [MAX_FUNC_UNITS];        /* 0 means unit is available, otherwise number
				 indicates cycle count when the load buffer will 
				 complete its current operation. */
    int store_bufs        
      [MAX_FUNC_UNITS];        /* 0 means unit is available, otherwise number
				 indicates cycle count when the store buffer will 
				 complete its current operation. */
   
    int *func_units[6];        /* Top level array structure used to access
				 fp_add_units, fp_div_units, and fp_mul_units. */
    
    int fp_div_exist;          /* 0 means fp divider is not supported by the 
               			  current configuration. Its function is 
				  performed by fp multiplier. */

    int ld_st_exist;	       /* 0 means load and store buffers(units) are
				  not supported by the current configuration.
				  It's function is performed by integer unit. */

    int waiting_regs[65];     /* A non-zero value in element i means 
				 register i is waiting for a result from an
				 function unit.  The value indicates the cycle
				 count when the result will be ready. */

    int Qi_regs[65];	      /* The number of the functional unit that will
				 produe a value to be stored in a FP register. */

    int sameCycle_regs[65];   /* The number of samultaneous to a single register
				 in a cycle.  Only used in scorboarding algorithm. */

    Op *opsList;              /* First in a linked list of all pending
				 operations associated with this 
				 machine; NULL means none. */

    Op *finishList;           /* A List of operations in which all excution have
			         been finished except updating the screen. */

    int cycleCount;           /* Keep track of how many cycles have been
				 executed to monitor floating point units. */
   
    int cycleDisplayCount;    /* clock cycle when machine is in cycle simulation 
                                 mode. */

    int cycleDisplayMode;     /* whether in cycle display mode or not. */

    int codeLine;             /* Line in which the loaded instruction is displayed
                                 in the .code.t window. */

    char *cycleTable[5];      /* 5 strings containing the clock cycle info
				 for each stage in BasicPipe. */

    Op *opFree;		      /* Free Op list */
    Update *updateFree;	      /* Free Update list */
    Bypass *bypassFree;       /* Free Bypass list */

    FILE *refInstrTraceFile;/* Pointer to a file into which to write dynamic
				 instruction trace as input for spam. */
    FILE *refTraceFile;       /* Pointer to a file into which to write memory
				 references for the cache simulator. */

} DLX;

/*
 * Flag values for DLX structures:
 *
 * STOP_REQUESTED:		1 means that the "stop" command has been
 *				executed and execution should stop ASAP.
 *				
 */

#define STOP_REQUESTED		0x4

/*
 * Conversion between DLX addresses and indexes, which are stored
 * in pc/nextPc fields of DLX structures and also used to address
 * the memPtr values:
 */

#define INDEX_TO_ADDR(index)	((unsigned) ((index) << 2))
#define ADDR_TO_INDEX(addr)	((addr) >> 2)

/*
 * Miscellaneous definitions:
 */

#define SIGN_BIT	0x80000000
#define R31		31

/*
 * Variables and procedures exported to rest of simulator:
 */

extern char *Asm_RegNames[];


/*
 * Tcl command procedures provided by the simulator:
 */

extern int	Asm_AsmCmd(ClientData, Tcl_Interp *, int, char**);
extern int	Asm_LoadCmd(ClientData, Tcl_Interp *, int, char **);
extern int 	Gp_GetCmd(ClientData, Tcl_Interp *, int, char**);
extern int 	Gp_PutCmd(ClientData, Tcl_Interp *, int, char**);
extern int 	Gp_FGetCmd(ClientData, Tcl_Interp *, int, char**);
extern int 	Gp_FPutCmd(ClientData, Tcl_Interp *, int, char**);
extern int 	Main_QuitCmd(ClientData, Tcl_Interp *, int, char**);
extern int 	Sim_InitCmd(ClientData, Tcl_Interp *, int, char**);
extern int 	Sim_DumpStats(ClientData, Tcl_Interp *, int, char**);
extern int 	Sim_ITraceCmd(ClientData, Tcl_Interp *, int, char**);
extern int 	Sim_MTraceCmd(ClientData, Tcl_Interp *, int, char**);
extern int 	Sim_GoCmd(ClientData, Tcl_Interp *, int, char**);
extern int 	Sim_StepCmd(ClientData, Tcl_Interp *, int, char**);
extern int 	Sim_CycleCmd(ClientData, Tcl_Interp *, int, char**);
extern int 	Sim_EquationCmd(ClientData, Tcl_Interp *, int, char**);
extern int 	Stop_StopCmd(ClientData, Tcl_Interp *, int, char**);



/*
 * Other procedures that are exported from one file to another:
 */

extern int		Asm_Assemble(DLX *, char *, char *, unsigned int, 
				     char *, int, int *, int *);
extern char *		Asm_Disassemble(DLX *, int, unsigned int);
extern int		Asm_GetExpr(DLX *, Tcl_Interp *, int, char **);

extern void		Cop0_Init(DLX *);
extern void		Cop0_IntPending(DLX *, int, int);

extern void		Gp_PutByte(DLX *, unsigned int, int);
/*
extern int		Gp_PutString(DLX *, char *, char, unsigned int, 
				     int, char **);
*/
extern int		Gp_PutString();

extern Op *		Isu_Issue (DLX *, MemWord *, int, int, int, int);
extern void     	Isu_WriteBack(DLX *);
extern void		Isu_FreeOp(DLX *, Op *);
extern void		Isu_FreeUpdate(DLX *, Update *);
extern void		Isu_FreeBypass(DLX *, Bypass *);
extern void		Isu_CleanFinished(DLX *, char *, int);

extern void		Sim_CallBack(DLX *, int, void (*)(), ClientData);
extern DLX *		Sim_Create(Tcl_Interp *);
extern void             Sim_Initialize(DLX *);
extern unsigned int	Sim_GetPC(DLX *);
extern void		Sim_Stop(DLX *);

extern int		Stop_Execute(DLX *, Stop *);

extern void 		Trap_Init_Handle(DLX *);
extern int 		Trap_Handle(DLX *, int);

extern void             Script_Read(Tcl_Interp *);





#endif /* _MIPS */