readme.txt

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                            Multi-ICE readme.txt
                            ====================


Multi-ICE Version 2.2.6
=======================
This release supports Microsoft Windows NT 4.0, Microsoft Windows 2000,
Microsoft Windows 95, Microsoft Windows 98, Microsoft Windows Me,
Microsoft Windows XP, Red Hat Linux 6.1, Red Hat Linux 7.2, Solaris 2.6,
Solaris 2.7 (7.0), Solaris 8.0, HP-UX 10.20, and HP-UX 11 (see important
note below).

This file contains the following sections:

  * Documentation
  * FAQs and Application Notes

  * What's New in this Release

  * Important Note for ARM926EJ-S Users
  * Important Note for ARM7EJ-S and ARM9EJ-S Users
  * Important Note for ARM920T Users
  * Important Note for ARM10-family Users
  * Important Note for ARM1020E and ARM1022E Users
  * Important Note for Users of Processors Based On Intel XScale Technology
  * Important Note for VFP9-S Users
  * Important Note for Adaptive Clocking Users
  * Important Note for progcards Users
  * Important Note for Semihosting Users
  * Important Note for Multiple Parallel Ports
  * Important Note for Trace Users
  * Important Note for Windows 2000 Users
  * Important Note for Mixed Endianness Debugging 
  * Important Note for Engineers Integrating ARM Processor Cores
  * Important Note for Users of the ARM eXDI Multi-ICE Driver with
    Processors Based On Intel XScale Technology

  * Installation Instructions
  * Windows Uninstallation Instructions
  * Important Note for Microsoft Windows Users
  * Important Note for HP-UX Users


Documentation
=============
Refer to the Multi-ICE User Guide for more information about new
features and how to use Multi-ICE. This is available in PDF format in
the \docs directory on the original Multi-ICE 2.2 CD-ROM. If you have
the ARM Developer Suite, you can also choose to install the Multi-ICE
User Guide as a DynaText online book. See your ADS documentation for
more information on how to access the online books.

Note: DynaText documentation is not supported on Linux installations.


FAQs and Application Notes
==========================
Technical Support FAQs : http://www.arm.com/support/faq
     Application Notes : http://www.arm.com/arm/documentation


What's New in this Release
==========================
Multi-ICE 2.2.6 is a patch release for users of Multi-ICE 2.2
and all previous Multi-ICE 2.2.x patches. This patch contains
the cumulative changes from all previous Multi-ICE 2.2.x patches.

Main changes in Multi-ICE 2.2.6:

  * New processor support for ARM720T rev 4
  * Fixed an intermittent reliability problem in the implementation of TAPOp
    macros in Multi-ICE Server. In particular, this improves stability when
    performing large amounts of semihosting data transfers.
  * Improved control of breakpoints and watchpoints when used with 
    RealView Debugger (RVD) 1.7.
  * Fixed issues with setting breakpoints on processors based on Intel
    XScale Technology when using RVD.

Main changes in Multi-ICE 2.2.5:

  * Improved Support for Debugging Processors based on Intel XScale
    Technology.

Main changes in Multi-ICE 2.2.3:

  * New processor support for Intel XScale IXP425.
  * New processor support for Intel XScale-IR7 (generic XScale with 7-bit
    TAP IR).

Main changes in Multi-ICE 2.2.2:

  * New processor support for ARM7TDMI rev 4, ARM7TDMI-S rev 4.
  * New processor support for ARM720T rev 3.
  * "Never use software breakpoints" Configuration Option
  * "Reset system on startup" Configuration Option
  * Maximum Combined IR Length Limit Increased
  * Changed Behavior of $semihosting_vector
  * Improved Support for Coprocessors

Main changes in Multi-ICE 2.2.1:

  * New processor support for ARM1020E and ARM1022E.


Generic XScale Microarchitecture Processor with 7-bit IR
--------------------------------------------------------
In releases of Multi-ICE prior to Multi-ICE 2.2.3 users could
manually configure the Multi-ICE server for a generic XScale
device (called "XScale"). However, this assumed a 5-bit Test Access
Port (TAP) Instruction Register (IR). Recent processors based on
Intel XScale technology (for example, IXP42x family) use a 7-bit
TAP IR.

Multi-ICE 2.2.3 adds support for IXP425. In addition, a second
generic XScale device called "XScale-IR7" has been added. Users can
manually configure Multi-ICE server for the generic "XScale-IR7"
device. The generic "XScale" device remains as an XScale with a
5-bit IR.

Improved Support for Debugging Processors based on Intel XScale
Technology
---------------------------------------------------------------
In releases of Multi-ICE prior to Multi-ICE 2.2.3, it was not
possible to debug a system that used the MMU to prevent read access
to the exception vectors (normally located at address 0x00000000 in
memory). Multi-ICE 2.2.3 lifts this restriction, making it easier
for users to debug operating systems that have such a configuration.

Multi-ICE 2.2.5 adds further features to support debug of operating
systems that use the ARM architecture's Fast Context Switch Extension
(FCSE).

The "XScale debug handler settings" box of the "Processor Settings" tab
in the Multi-ICE configuration dialog in release 2.2.5 is changed from
that described in the Multi-ICE 2.2 User Guide.

The "Debug handler address", "Hot-debug enabled" and "Flush debug
handler cache if running on exit" options are unchanged. The two options
"Leave processor mode in HALT mode on exit" and "Leave processor in
MONITOR mode on exit" have been merged from a pair of buttons into a
single drop-down option list. The behavior is otherwise the same as
described in the Multi-ICE 2.2 User Guide.

As described in the User Guide, Multi-ICE normally has to reset the
processor whilst the debugger connects in order to download a debug
monitor to the target. (This is not required if "hot plugging" is
supported by the target.) Multi-ICE holds the reset signal to the
processor for a fixed period of 30ms, and waits for 200ms after
releasing the reset signal before downloading the monitor. (During
this period, the XScale is held in reset by an internal control signal.)

If the new option "Hold reset longer during connection" is selected,
Multi-ICE will hold the reset signal for 1200ms, and wait 800ms before
downloading the monitor. This option is normally only required if other
devices on the target board need longer to be reset. Use this option if
connections fail regularly, as this is a cause of connection problems
on certain boards.

A new dialog controlling how Multi-ICE shadows the exception vectors
whilst debugging has been added. This dialog can be opened from the
"Processor Settings" tab in the Multi-ICE configuration dialog by
clicking on the new "Configure vectors..." button.

This new dialog appears as below:

   ,========================================================================================.
   | XScale Vector Settings                                                                 |
   +----------------------------------------------------------------------------------------+
   | ,- Low vectors (0x0) ----------------------------------------------------------------. |
   | |                                       Instruction type:  Address:     Opcode:      | |
   | |  [*] Shadow             Undef:        [Load pc from |V]  [0x00000020] [0xe59ff014] | |
   | |  [ ] Bounce             SWI:          [Use pc table |V]  [0x00000024] [0xe59ff014] | |
   | |  [ ] Preload            Pref. Abort:  [Use pc table |V]  [0x00000028] [0xe59ff014] | |
   | |  [ ] Overwrite memory   Data Abort:   [Use pc table |V]  [0x0000002c] [0xe59ff014] | |
   | |  [ ] Ignore             Reserved:     [Use pc table |V]  [0x00000030] [0xe59ff014] | |
   | |                         IRQ:          [Use pc table |V]  [0x00000034] [0xe59ff014] | |
   | |                         FIQ:          [Use pc table |V]  [0x00000038] [0xe59ff014] | |
   | |                                                                                    | |
   | '------------------------------------------------------------------------------------' |
   | ,- High vectors (0xFFFF0000) --------------------------------------------------------. |
   | |                                       Instruction type:  Address:     Opcode:      | |
   | |  [*] Shadow             Undef:        [Load pc from |V]  [0xffff0020] [0xe59ff014] | |
   | |  [ ] Bounce             SWI:          [Use pc table |V]  [0xffff0024] [0xe59ff014] | |
   | |  [ ] Preload            Pref. Abort:  [Use pc table |V]  [0xffff0028] [0xe59ff014] | |
   | |  [ ] Overwrite memory   Data Abort:   [Use pc table |V]  [0xffff002c] [0xe59ff014] | |
   | |  [ ] Ignore             Reserved:     [Use pc table |V]  [0xffff0030] [0xe59ff014] | |
   | |                         IRQ:          [Use pc table |V]  [0xffff0034] [0xe59ff014] | |
   | |                         FIQ:          [Use pc table |V]  [0xffff0038] [0xe59ff014] | |
   | |                                                                                    | |
   | '------------------------------------------------------------------------------------' |
   |                                                                   ________   ________  |
   |                                                                  [___OK___] [_Cancel_] |
   |                                                                                        |
   '========================================================================================'

The dialog is split into two boxes, each with the same functions. 

The set of five radio-control buttons on the left side of each box
controls how Multi-ICE will treat each of the contents of the vector
tables (at addresses 0x0 and 0xffff0000 respectively) whilst debugging.
(This can also be altered whilst running, as described towards the end
of this section.)

The edit control boxes on the right side of the dialog is normally
grayed out. It becomes ungrayed if the "Preload" option is selected on
the left. (See the sub-section on "Preload" below.)

To understand the meaning of these options, it is recommended that you
first read appendix D.2 of the Multi-ICE 2.2 User Guide. Section D.2.2
(page D-5 and D-6) of the User Guide describes how Multi-ICE copies the
contents of vector tables into the XScale mini-ICache, This is the
default option to "Shadow" the vectors.

Bounce
~~~~~~
When configured to "Bounce" the system vectors, Multi-ICE instead loads
its copy of the system vectors with code that jumps into the debug
monitor downloaded by Multi-ICE. The monitor then reads the actual
exception vector from memory and simulates the instruction and jumps to
the correct exception handler.

The advantage of "Bounce" over "Shadow" is that does not cause incorrect
operation if the program being debugged modifies the contents of the
vectors, as the vector is dynamically simulated. The disadvantages are
that there are a number of restrictions, and that the process of
simulating the exception takes a number of cycles, which impacts on
exception handling latency. The additional latency is around 50 cycles.

The restrictions imposed are:

  * The exception mode stacks must be set up. The bounce code has to
    save 16 bytes on the stack to avoid corrupting exception state.
    The "Bounce" option must therefore not be used when debugging code
    which has not set up exception mode stacks.

  * The only instruction types simulated are unconditional branch (B),
    unconditional word load of the program counter from an address at a
    positive offset from the program counter (LDR pc, [pc, #+n]), and
    move immediate constant to the program counter (MOV pc, #n). Any
    other instruction type is faulted and causes a debug exception
    (program halts in the debugger).

  * The vectors must be readable from privileged mode. If the attempt to
    read the exception made by the handler results in a data abort, the
    code may enter an endless loop. (Although this should be stoppable
    from the debugger.)

  * The monitor itself must be readable from privileged mode. This is
    not a normal requirement for XScale debugging, as when running in
    Special Debug State (SDS) following a debug exception, the XScale
    processor ignores memory access permissions for the code it runs
    from the monitor. However, when using the "Bounce" option, code from
    within the monitor will be run when any standard exception occurs,
    and hence the processor will not be in SDS. If the monitor is not
    itself readable, the processor will take a prefetch abort, and the
    code may enter an endless loop.

Preload
~~~~~~~
"Preload" allows the user to specify what instructions to load into the
XScale mini-Icache when running. This allows the user to debug systems
where initially the vector contents may not be known, but once set by
the application running, they do not change. The following restrictions
apply:

  * The "Reset" vector cannot be specified, as it is used by the debug
    handler.

  * The processor must not take any exceptions that may use this vector
    table prior to it setting up the vector table. That is, it must not
    use the old contents of the vector table.
    
A situation where exceptions may be taken before the vector table has
been set up may be where the processor is initially configured for "low"
vectors, sets up the "high" vectors and then switches to be configured
for "high" vectors. It might prove useful to configure Multi-ICE to
"Preload" the "high" vectors with the values that will be written to the
memory.

When "Preload" has been chosen, the controls on the right side of the
dialog become ungrayed. These can be used to specify the instructions to
load. Any ARM instruction may be specified; however the dialog makes it
simpler to specify the most common types of instruction. To specify
an instruction to load for a given vector:

  * Select the instruction type from the drop-down list under
    "Instruction type:" in the row for the specific vector;

  * If "Load pc from" was selected, enter the address to load the pc
    value from in the edit control in the "Address:" column. This
    selects instructions of the form "LDR pc, #address".

  * If "Use pc table" was selected, the address is automatically
    supplied by Multi-ICE, as it assumes a table of values based at the
    address specified for the "Undef" vector. This also selects
    instructions of the form "LDR pc, #address".

  * If "Branch to" was selected, enter the address to branch to in the
    edit control in the "Address:" column. This selects instructions of
    the form "B address".

  * If "Load pc with" was selected, enter the address to jump to in the
    edit control in the "Address" column. This selects instructions of
    the form "MOV pc, #address".

  * If "Breakpoint" was selected, the "Address" and "Opcode" edit boxes
    are grayed out. The opcode selected is "0xE120BE70", which is the
    ARM software breakpoint instruction. This will cause an entry into
    the debug handler, halting the processor. This is similar to using
    vector catch.

  * If "Opcode" was selected, the "Address" edit box is grayed out, and
    you must specify the opcode to use in the "Opcode" edit box.

The value in the edit box in the "Opcode:" column will be updated with
the opcode Multi-ICE will write to the vector table. If the value
"Invalid address" appears in the "Opcode:" edit box, then the address
you have entered is not valid, and you must change the value.

Overwrite memory
~~~~~~~~~~~~~~~~
Multi-ICE in fact only needs to shadow the instruction at the reset
vectors (0x0 and 0xffff0000), but because of the nature of the
mini-ICache, to do so using the mini-ICache requires shadowing all of
the exception vectors. (See the XScale Core datasheet for fuller
details.)

With "Overwrite memory" selected, Multi-ICE will not shadow the reset