timedevider.tan.summary

来自「分频器 FPGＡ程序设计 二分频」· SUMMARY 代码 · 共 37 行

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Timing Analyzer Summary
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Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 6.580 ns
From           : outclk~reg0
To             : outclk
From Clock     : inclk
To Clock       : --
Failed Paths   : 0

Type           : Clock Setup: 'inclk'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 275.03 MHz ( period = 3.636 ns )
From           : temp[0]
To             : temp[5]
From Clock     : inclk
To Clock       : inclk
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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