tba_2470.tim

此文件是对xilinx95144器件编的程序

                           Performance Summary Report
                           --------------------------

Design:     tba_2470
Device:     XC95144-7-PQ100
Speed File: Version 3.0
Program:    Timing Report Generator:  version F.31
Date:       Wed Oct 26 13:43:12 2005

Performance Summary:

Pad to Pad (tPD)                          :         18.0ns (2 macrocell levels)
Pad 'speed<0>' to Pad 'p0<0>'                                     

Clock net 'ale' path delays:

Clock Pad to Output Pad (tCO)             :         31.5ns (3 macrocell levels)
Clock Pad 'ale' to Output Pad 'p0<0>'                             (Pterm Clock)

Clock to Setup (tCYC)                     :          8.0ns (1 macrocell levels)
Clock to Q, net 'latch1/mtridata_dout<0>.Q' to DFF Setup(D) at 'inter_add<0>.D'(Pterm Clock)
Target FF drives output net 'inter_add<0>'

Setup to Clock at the Pad (tSU)           :          0.5ns (0 macrocell levels)
Data signal 'cs' to DFF D input Pin at 'inter_add<0>.D'
Clock pad 'ale'                                                   (Pterm Clock)

                          Minimum Clock Period: 10.0ns
                     Maximum Internal Clock Speed: 100.0Mhz
                         (Limited by Clock Pulse Width)

Clock net 'wr' path delays:

Clock Pad to Output Pad (tCO)             :          8.5ns (1 macrocell levels)
Clock Pad 'wr' to Output Pad 'check<0>'                           (Pterm Clock)

Clock to Setup (tCYC)                     :          8.0ns (1 macrocell levels)
Clock to Q, net 'check<0>.Q' to TFF Setup(D) at 'check<0>.D'      (Pterm Clock)
Target FF drives output net 'check_0_obuf$Q'

Setup to Clock at the Pad (tSU)           :          0.5ns (0 macrocell levels)
Data signal 'cs' to TFF D input Pin at 'check<0>.D'
Clock pad 'wr'                                                    (Pterm Clock)

                          Minimum Clock Period: 10.0ns
                     Maximum Internal Clock Speed: 100.0Mhz
                         (Limited by Clock Pulse Width)

--------------------------------------------------------------------------------
                            Pad to Pad (tPD) (nsec)

\ From       c     l     m     n     p     r     r     r     s     s     s     s
 \           s     c     _     o     l     a     d     e     p     p     p     p
  \                d     s     f     a     d           s     e     e     e     e
   \               _     _     i     y     i           e     e     e     e     e
    \              i     i     l     i     o           t     d     d     d     d
     \             n     n     e     n                       <     <     <     <
      \                              g                       0     1     2     3
       \                                                     >     >     >     >
  To    \------------------------------------------------------------------------

p0<0>      9.5  18.0  18.0  18.0  18.0  18.0   9.5   9.5  18.0                  
p0<1>      9.5                                 9.5   9.5         7.5            
p0<2>      9.5                                 9.5   9.5               7.5      
p0<3>      9.5                                 9.5   9.5                     7.5
p0<4>      9.5                                 9.5   9.5                        
p0<5>      9.5                                 9.5   9.5                        
p0<6>      9.5                                 9.5   9.5                        

--------------------------------------------------------------------------------
                            Pad to Pad (tPD) (nsec)

\ From       s     s     s
 \           p     p     p
  \          e     e     e
   \         e     e     e
    \        d     d     d
     \       <     <     <
      \      4     5     6
       \     >     >     >
  To    \------------------

p0<0>                     
p0<1>                     
p0<2>                     
p0<3>                     
p0<4>      7.5            
p0<5>            7.5      
p0<6>                  7.5

--------------------------------------------------------------------------------
                      Clock Pad to Output Pad (tCO) (nsec)

\ From         a     w
 \             l     r
  \            e      
   \                  
    \                 
     \                
      \               
       \              
        \             
         \            
  To      \------------

check<0>           8.5
check<1>           8.5
check<2>           8.5
en485              8.5
lcd_c              8.5
led1               8.5
led<2>             8.5
led<3>             8.5
led<4>             8.5
led<5>             8.5
load               8.5
m_s_out            8.5
outputh<8>         8.5
outputh<9>         8.5
outputl<0>         8.5
outputl<1>         8.5
outputl<2>         8.5
outputl<3>         8.5
outputl<4>         8.5
outputl<5>         8.5
outputl<6>         8.5
outputl<7>         8.5
p0<0>       31.5      
p0<1>       21.0      
p0<2>       21.0      
p0<3>       21.0      
p0<4>       21.0      
p0<5>       21.0      
p0<6>       21.0      
pa_c               8.5
play_s             8.5
stop_s             8.5
updown             8.5

--------------------------------------------------------------------------------
                   Setup to Clock at Pad (tSU or tSUF) (nsec)

\ From      a     w
 \          l     r
  \         e      
   \               
    \              
     \             
      \            
  To   \------------

cs        0.5   0.5
p0<0>     0.5   0.5
p0<1>     0.5   0.5
p0<2>     0.5   0.5
p0<3>     0.5   0.5
p0<4>           0.5
p0<5>           0.5
p0<6>           0.5
p0<7>           0.5
reset           0.5

--------------------------------------------------------------------------------
                          Clock to Setup (tCYC) (nsec)
                                  (Clock: ale)

\ From                        l     l     l     l
 \                            a     a     a     a
  \                           t     t     t     t
   \                          c     c     c     c
    \                         h     h     h     h
     \                        1     1     1     1
      \                       /     /     /     /
       \                      m     m     m     m
        \                     t     t     t     t
         \                    r     r     r     r
          \                   i     i     i     i
           \                  d     d     d     d
            \                 a     a     a     a
             \                t     t     t     t
              \               a     a     a     a
               \              _     _     _     _
                \             d     d     d     d
                 \            o     o     o     o