regd.mod

此文件是对xilinx95144器件编的程序

MODEL
MODEL_VERSION "v1998.8";
DESIGN "regd";

/* port names and type */
INPUT S:PIN99 = din<0>;
INPUT S:PIN24 = rd;
INPUT S:PIN66 = cs;
TRIOUT S:PIN8 = dout<0>;
OUTPUT S:PIN13 = led2;
OUTPUT S:PIN65 = led4;

/* timing arc definitions */
rd_dout<0>_delay: DELAY (ENABLE_HIGH) rd dout<0>;
rd_led2_delay: DELAY rd led2;

/* timing check arc definitions */
cs_rd_setup: SETUP(POSEDGE) cs rd;
din<0>_rd_setup: SETUP(POSEDGE) din<0> rd;
cs_rd_hold: HOLD(POSEDGE) cs rd;
din<0>_rd_hold: HOLD(POSEDGE) din<0> rd;

ENDMODEL