songer.tan.rpt

基于FPGA的乐曲硬件演奏电路设计的实现

+---------------------------------------------+-------+---------------+----------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+------------------------------+--------------+
; Worst-case tsu                              ; N/A   ; None          ; -0.626 ns                        ; altera_internal_jtag~TMSUTAP                                                                                                                   ; sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0]                                                                                                 ;                              ; altera_internal_jtag~TCKUTAP ; 0            ;
; Worst-case tco                              ; N/A   ; None          ; 16.740 ns                        ; NoteTabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_des:auto_generated|altsyncram_j6a2:altsyncram1|ram_block3a2~porta_address_reg7 ; CODE1[2]                                                                                                                                      ; CLK8HZ                       ;                              ; 0            ;
; Worst-case tpd                              ; N/A   ; None          ; 2.124 ns                         ; altera_internal_jtag~TDO                                                                                                                       ; altera_reserved_tdo                                                                                                                           ;                              ;                              ; 0            ;
; Worst-case th                               ; N/A   ; None          ; 3.689 ns                         ; altera_internal_jtag                                                                                                                           ; NoteTabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_des:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out                   ;                              ; altera_internal_jtag~TCKUTAP ; 0            ;
; Worst-case Minimum tco                      ; N/A   ; None          ; 13.107 ns                        ; NoteTabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_des:auto_generated|altsyncram_j6a2:altsyncram1|ram_block3a2~porta_address_reg7 ; CODE1[1]                                                                                                                                      ; CLK8HZ                       ;                              ; 0            ;
; Worst-case Minimum tpd                      ; N/A   ; None          ; 2.124 ns                         ; altera_internal_jtag~TDO                                                                                                                       ; altera_reserved_tdo                                                                                                                           ;                              ;                              ; 0            ;
; Clock Setup: 'altera_internal_jtag~TCKUTAP' ; N/A   ; None          ; 128.17 MHz ( period = 7.802 ns ) ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                      ; sld_hub:sld_hub_inst|HUB_TDO~reg0                                                                                                             ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; 0            ;
; Clock Setup: 'CLK12MHZ'                     ; N/A   ; None          ; 187.34 MHz ( period = 5.338 ns ) ; Speakera:u3|lpm_counter:\GenSpkS:Count11[0]_rtl_1|cntr_7t7:auto_generated|safe_q[4]                                                            ; Speakera:u3|lpm_counter:\GenSpkS:Count11[0]_rtl_1|cntr_7t7:auto_generated|safe_q[0]                                                           ; CLK12MHZ                     ; CLK12MHZ                     ; 0            ;
; Clock Setup: 'CLK8HZ'                       ; N/A   ; None          ; 197.01 MHz ( period = 5.076 ns ) ; NoteTabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_des:auto_generated|altsyncram_j6a2:altsyncram1|ram_block3a2~porta_datain_reg0  ; NoteTabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_des:auto_generated|altsyncram_j6a2:altsyncram1|ram_block3a2~porta_memory_reg0 ; CLK8HZ                       ; CLK8HZ                       ; 0            ;
; Total number of failed paths                ;       ;               ;                                  ;                                                                                                                                                ;                                                                                                                                               ;                              ;                              ; 0            ;
+---------------------------------------------+-------+---------------+----------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+------------------------------+--------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                            ;
+------------------------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+
; Clock Node Name              ; Clock Setting Name ; Type     ; Fmax Requirement ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ;
+------------------------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+
; altera_internal_jtag~TCKUTAP ;                    ; User Pin ; NONE             ; NONE     ; N/A                   ; N/A                 ; N/A    ;
; CLK8HZ                       ;                    ; User Pin ; NONE             ; NONE     ; N/A                   ; N/A                 ; N/A    ;
; CLK12MHZ                     ;                    ; User Pin ; NONE             ; NONE     ; N/A                   ; N/A                 ; N/A    ;
+------------------------------+--------------------+----------+------------------+----------+-----------------------+---------------------+--------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'altera_internal_jtag~TCKUTAP'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+------------------------------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                                                                                                                       ; To                                                                                                                                                                                ; From Clock                   ; To Clock                     ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------+------------------------------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 128.17 MHz ( period = 7.802 ns )                    ; sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                                  ; sld_hub:sld_hub_inst|HUB_TDO~reg0                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; None                    ;
; N/A                                     ; 136.13 MHz ( period = 7.346 ns )                    ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4]                                                                                                    ; sld_hub:sld_hub_inst|HUB_TDO~reg0                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; None                    ;
; N/A                                     ; 136.31 MHz ( period = 7.336 ns )                    ; NoteTabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_des:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                           ; sld_hub:sld_hub_inst|HUB_TDO~reg0                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; None                    ;
; N/A                                     ; 137.17 MHz ( period = 7.290 ns )                    ; sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated|dffe1a[0]                                                                                    ; sld_hub:sld_hub_inst|HUB_TDO~reg0                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; None                    ;
; N/A                                     ; 137.70 MHz ( period = 7.262 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1]                                                                                                                         ; sld_hub:sld_hub_inst|HUB_TDO~reg0                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; None                    ;
; N/A                                     ; 143.68 MHz ( period = 6.960 ns )                    ; sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[2]                                                                                                                         ; sld_hub:sld_hub_inst|HUB_TDO~reg0                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; None                    ;
; N/A                                     ; 144.68 MHz ( period = 6.912 ns )                    ; NoteTabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_des:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0] ; sld_hub:sld_hub_inst|HUB_TDO~reg0                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; None                    ;
; N/A                                     ; 146.33 MHz ( period = 6.834 ns )                    ; sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3]                                                                                                    ; sld_hub:sld_hub_inst|HUB_TDO~reg0                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; None                    ;
; N/A                                     ; 148.99 MHz ( period = 6.712 ns )                    ; sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0]                                                                                                                    ; sld_hub:sld_hub_inst|HUB_TDO~reg0                                                                                                                                                 ; altera_internal_jtag~TCKUTAP ; altera_internal_jtag~TCKUTAP ; None                        ; None                      ; None                    ;