📄 config.lst
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181 1
182 1 //----------------------------------------------------------------
183 1 // Reference Control Register Configuration
184 1 //----------------------------------------------------------------
185 1
186 1 REF0CN = 0x00; // Reference Control Register
187 1
188 1 //----------------------------------------------------------------
189 1 // ADC Configuration
190 1 //----------------------------------------------------------------
191 1
192 1 AMX0CF = 0x60; // AMUX Configuration Register
193 1 AMX0SL = 0x00; // AMUX Channel Select Register
194 1 ADC0CF = 0xF8; // ADC Configuration Register
195 1 ADC0CN = 0x00; // ADC Control Register
196 1
197 1 ADC0LTH = 0x00; // ADC Less-Than High Byte Register
198 1 ADC0LTL = 0x00; // ADC Less-Than Low Byte Register
199 1 ADC0GTH = 0xFF; // ADC Greater-Than High Byte Register
200 1 ADC0GTL = 0xFF; // ADC Greater-Than Low Byte Register
201 1
202 1 AMX1SL = 0x00; // AMUX1 Channel Select Register
203 1 ADC1CF = 0xF8; // ADC1 Configuration Register
204 1 ADC1CN = 0x00; // ADC1 Control Register
205 1
206 1 //----------------------------------------------------------------
207 1 // DAC Configuration
208 1 //----------------------------------------------------------------
209 1
210 1 DAC0CN = 0x00; // DAC0 Control Register
211 1 DAC0L = 0x00; // DAC0 Low Byte Register
212 1 DAC0H = 0x00; // DAC0 High Byte Register
213 1
214 1 DAC1CN = 0x00; // DAC1 Control Register
215 1 DAC1L = 0x00; // DAC1 Low Byte Register
216 1 DAC1H = 0x00; // DAC1 High Byte Register
217 1
218 1 //----------------------------------------------------------------
219 1 // SPI Configuration
220 1 //----------------------------------------------------------------
221 1
222 1 SPI0CN = 0x00; // SPI Control Register
223 1 SPI0CFG = 0x00; // SPI Configuration Register
224 1 SPI0CKR = 0x00; // SPI Clock Rate Register
225 1
226 1 //----------------------------------------------------------------
227 1 // UART Configuration
228 1 //----------------------------------------------------------------
229 1
230 1 SCON0 = 0x50; // Serial Port Control Register
231 1 SADEN0 = 0x00; // Serial 0 Slave Address Enable
232 1 SADDR0 = 0x00; // Serial 0 Slave Address Register
233 1
234 1 PCON = 0x00; // Power Control Register
235 1
236 1 SCON1 = 0x00; // Serial Port 1 Control Register
237 1 SADEN1 = 0x00; // Serial 1 Slave Address Enable
238 1 SADDR1 = 0x00; // Serial 1 Slave Address Register
239 1
240 1 //----------------------------------------------------------------
241 1 // SMBus Configuration
C51 COMPILER V7.05 CONFIG 12/20/2006 22:50:31 PAGE 5
242 1 //----------------------------------------------------------------
243 1
244 1 SMB0CN = 0x00; // SMBus Control Register
245 1 SMB0ADR = 0x00; // SMBus Address Register
246 1 SMB0CR = 0x00; // SMBus Clock Rate Register
247 1
248 1
249 1 //----------------------------------------------------------------
250 1 // PCA Configuration
251 1 //----------------------------------------------------------------
252 1
253 1 PCA0MD = 0x00; // PCA Mode Register
254 1 PCA0CN = 0x00; // PCA Control Register
255 1 PCA0H = 0x00; // PCA Counter/Timer High Byte
256 1 PCA0L = 0x00; // PCA Counter/Timer Low Byte
257 1
258 1
259 1 //Module 0
260 1 PCA0CPM0 = 0x00; // PCA Capture/Compare Register 0
261 1 PCA0CPL0 = 0x00; // PCA Counter/Timer Low Byte
262 1 PCA0CPH0 = 0x00; // PCA Counter/Timer High Byte
263 1
264 1 //Module 1
265 1 PCA0CPM1 = 0x00; // PCA Capture/Compare Register 1
266 1 PCA0CPL1 = 0x00; // PCA Counter/Timer Low Byte
267 1 PCA0CPH1 = 0x00; // PCA Counter/Timer High Byte
268 1
269 1 //Module 2
270 1 PCA0CPM2 = 0x00; // PCA Capture/Compare Register 2
271 1 PCA0CPL2 = 0x00; // PCA Counter/Timer Low Byte
272 1 PCA0CPH2 = 0x00; // PCA Counter/Timer High Byte
273 1
274 1 //Module 3
275 1 PCA0CPM3 = 0x00; // PCA Capture/Compare Register 3
276 1 PCA0CPL3 = 0x00; // PCA Counter/Timer Low Byte
277 1 PCA0CPH3 = 0x00; // PCA Counter/Timer High Byte
278 1
279 1 //Module 4
280 1 PCA0CPM4 = 0x00; // PCA Capture/Compare Register 4
281 1 PCA0CPL4 = 0x00; // PCA Counter/Timer Low Byte
282 1 PCA0CPH4 = 0x00; // PCA Counter/Timer High Byte
283 1
284 1 //----------------------------------------------------------------
285 1 // Timer Configuration
286 1 //----------------------------------------------------------------
287 1
288 1 CKCON = 0x00; // Clock Control Register
289 1 TH0 = 0x00; // Timer 0 High Byte
290 1 TL0 = 0x00; // Timer 0 Low Byte
291 1 TH1 = 0x00; // Timer 1 High Byte
292 1 TL1 = 0x00; // Timer 1 Low Byte
293 1 TMOD = 0x20; // Timer Mode Register
294 1 TCON = 0x40; // Timer Control Register
295 1
296 1 RCAP2H = 0xFF; // Timer 2 Capture Register High Byte
297 1 RCAP2L = 0xF3; // Timer 2 Capture Register Low Byte
298 1 TH2 = 0x00; // Timer 2 High Byte
299 1 TL2 = 0x00; // Timer 2 Low Byte
300 1 T2CON = 0x34; // Timer 2 Control Register
301 1
302 1 TMR3RLL = 0x00; // Timer 3 Reload Register Low Byte
303 1 TMR3RLH = 0x00; // Timer 3 Reload Register High Byte
C51 COMPILER V7.05 CONFIG 12/20/2006 22:50:31 PAGE 6
304 1 TMR3H = 0x00; // Timer 3 High Byte
305 1 TMR3L = 0x00; // Timer 3 Low Byte
306 1 TMR3CN = 0x00; // Timer 3 Control Register
307 1
308 1 RCAP4H = 0x00; // Timer 4 Capture Register High Byte
309 1 RCAP4L = 0x00; // Timer 4 Capture Register Low Byte
310 1 TH4 = 0x00; // Timer 4 High Byte
311 1 TL4 = 0x00; // Timer 4 Low Byte
312 1 T4CON = 0x00; // Timer 4 Control Register
313 1
314 1 //----------------------------------------------------------------
315 1 // Reset Source Configuration
316 1 //
317 1 // Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0
318 1 //------------------------------------------------------------------
319 1 // R | R/W | R/W | R/W | R | R | R/W | R
320 1 //------------------------------------------------------------------
321 1 // JTAG |Convert | Comp.0 | S/W | WDT | Miss. | POR | HW
322 1 // Reset |Start | Reset/ | Reset | Reset | Clock | Force | Pin
323 1 // Flag |Reset/ | Enable | Force | Flag | Detect| & | Reset
324 1 // |Enable | Flag | & | | Flag | Flag | Flag
325 1 // |Flag | | Flag | | | |
326 1 //------------------------------------------------------------------
327 1 // NOTE! : Comparator 0 must be enabled before it is enabled as a
328 1 // reset source.
329 1 //
330 1 // NOTE! : External CNVSTR must be enalbed through the crossbar, and
331 1 // the crossbar enabled prior to enabling CNVSTR as a reset source
332 1 //------------------------------------------------------------------
333 1
334 1 RSTSRC = 0x00; // Reset Source Register
335 1
336 1
337 1 //----------------------------------------------------------------
338 1 // Interrupt Configuration
339 1 //----------------------------------------------------------------
340 1
341 1 IE = 0x00; //Interrupt Enable
342 1 IP = 0x00; //Interrupt Priority
343 1 EIE1 = 0x00; //Extended Interrupt Enable 1
344 1 EIE2 = 0x00; //Extended Interrupt Enable 2
345 1 EIP1 = 0x00; //Extended Interrupt Priority 1
346 1 EIP2 = 0x00; //Extended Interrupt Priority 2
347 1
348 1
349 1
350 1 // other initialization code here...
351 1
352 1
353 1
354 1 } //End of config
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 223 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILER V7.05 CONFIG 12/20/2006 22:50:31 PAGE 7
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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