isr_entry.src

来自「Wince4.2 BSP for SH4 engineering develop」· SRC 代码 · 共 115 行

;
;   Copyright(c) Renesas Technology Corp. 2002-2003 All Rights Reserved.
;
;   OEM Adaptation Layer
;
;	File		:	ISR_Entry.src
;	Created		:	2002.1.31
;   Modified    :   2003.08.06
;   Author      :   Renesas Technology Corp.
;   Hardware    :   RENESAS HS7751RSTC01H (S1-E, ITS-DS5)
;   TARGET OS   :   Microsoft(R) Windows(R) CE .NET 4.2
;	Notes   	:	
;	History		:
;					2002.1.31
;					- Created
;					2002.9.26
;					- Released for Hitachi HS7751RSTC01H (S1-E, ITS-DS5)


	.list OFF
	.include "kxshx.h"
	.list ON

    .include "shx.inc"


        .import _C_Peripheral_FPGA_ISR
        .import _C_Timer0ISR
        .import _C_Timer2ISR


	LEAF_ENTRY _ASM_Peripheral_FPGA_ISR

        sts.l pr, @-r15
        stc.l gbr, @-r15
        sts.l mach, @-r15
        sts.l macl, @-r15
        mov r7, @-r15
        mov r5, @-r15
        mov r4, @-r15

        mov #_C_Peripheral_FPGA_ISR, r0
        jsr @r0
        nop

        mov @r15+, r4
        mov @r15+, r5
        mov @r15+, r7
        lds.l @r15+, macl
        lds.l @r15+, mach
        ldc.l @r15+, gbr
        lds.l @r15+, pr
        rts
        nop

        .endf


	LEAF_ENTRY _ASM_Timer0ISR

        sts.l pr, @-r15
        stc.l gbr, @-r15
        sts.l mach, @-r15
        sts.l macl, @-r15
        mov r7, @-r15
        mov r5, @-r15
        mov r4, @-r15

        mov #_C_Timer0ISR, r0
        jsr @r0
        nop

        mov @r15+, r4
        mov @r15+, r5
        mov @r15+, r7
        lds.l @r15+, macl
        lds.l @r15+, mach
        ldc.l @r15+, gbr
        lds.l @r15+, pr
        rts
        nop

        .endf


	LEAF_ENTRY _ASM_Timer2ISR

        sts.l pr, @-r15
        stc.l gbr, @-r15
        sts.l mach, @-r15
        sts.l macl, @-r15
        mov r7, @-r15
        mov r5, @-r15
        mov r4, @-r15

        mov #_C_Timer2ISR, r0
        jsr @r0
        nop

        mov @r15+, r4
        mov @r15+, r5
        mov @r15+, r7
        lds.l @r15+, macl
        lds.l @r15+, mach
        ldc.l @r15+, gbr
        lds.l @r15+, pr
        rts
        nop

        .endf


        .end