oemboot.c

Wince4.2 BSP for SH4 engineering development board

//
//      Copyright (c) Renesas Technology Corp. 1998-2003 All Rights Reserved.
//
//      Ethernet Bootloader
//
//----------------------------------------------------------------------------
//
//  FILE      : OEMBOOT.C
//  CREATED   : 1999.04.26 (for PFM-DS6)
//  MODIFIED  : 2003.08.06
//  AUTHOR    : Renesas Technology Corp.
//  HARDWARE  : RENESAS HS7751RSTC01H (S1-E, ITS-DS5)
//  TARGET OS : Microsoft(R) Windows(R) CE .NET 4.2
//  NOTES     : 
//  FUNCTION  : Platform-specific initialization and RTC functions
//  HISTORY   :
//              1999.04.26
//              - Released for PFM-DS6.
//              2001.07.05
//              - Modified for ITS-DS2A (BigSur with HD64404).
//              (Detailed history for previous platform is omitted.)
//              2002.02.21
//              - Modified for HS7751RSTC01H.
//              2002.04.24
//              - Message output for EBOOT writer operation is added.
//              2002.05.02
//              - Adapted for System FPGA and Peripheral FPGA specification
//               changes from supporting 64MB flash memory board.
//              2002.06.05
//              - Clock frequency checkings are added to PowerOnSelfTest.
//              2002.08.29
//              - BOOT_LOADER definition is moved prior to the inclusion of
//               "clock.h".
//              2002. 9.20
//              - EBOOT version message output in PowerOnSelfTest is modified
//               to display internal version (OEM version) in addition to
//               original EBOOT version.

//
//  Copyright (c) 1995-2000 Microsoft Corporation.
//

#include <windows.h>
#include <nkintr.h>
#include <memory.h>
#include "rev.h"

#include "shx.h"
#include "drv_glob.h"
#include "s1e.h"

#define BOOT_LOADER  // To avoid including debug ethernet support
#include "clock.h" // This refers BOOT_LOADER macro.

// include debug serial support from hal
#include "..\..\kernel\hal\sh\debug.c"

volatile unsigned int *PtrCurMSec;      /* current millisecond counter */
typedef volatile DWORD *PVDWORD;    /* pointer to a volatile dword */

// dummy curmsec variable
// kernel is not running, but some of the included hal functions
// rely on curmsec for timeouts.
unsigned int CurMSec_dummy = 0;

#define pDriverGlobals ((PDRIVER_GLOBALS) DRIVER_GLOBALS_PHYSICAL_MEMORY_START)
#define REG(base,off) (*(volatile unsigned int*)(base+off))


static void
InitDisplay()
{
    // Currently display hardware is unused while booting.
}

//***************************************************************************
// PowerOnSelfTest
//
//
//***************************************************************************
unsigned int PowerOnSelfTest(void) {

    DWORD dwClock;

// Displays EBOOT version and OEM version.
// EBOOT_MxxOR_VERSIONs are fixed through corresponding CEPB version.
// OEM version reflects axctual code modification.
    EdbgOutputDebugString(
        "Ethernet Bootloader %d.%d"
        " [OEM version " OEM_EBOOT_VERSION_STRING "]"
#ifdef EBOOT_WRITER
        " EBOOT writer"
#endif
        "\n", EBOOT_VERSION_MAJOR,EBOOT_VERSION_MINOR);

    PtrCurMSec=&CurMSec_dummy;  // setup pointer to curmsec so hal functions will work

    EdbgOutputDebugString("Renesas SH7751 reference platform HS7751RSTC01H\n");
    EdbgOutputDebugString("System configuration:\n");
#if IMGUM == 1
    EdbgOutputDebugString("Memory model: Unified\n");
#else
    EdbgOutputDebugString("Memory model: Separated\n");
#endif
    // Check S1-E FPGA register to display which clock mode is selected.
    dwClock = READ_REGISTER_UCHAR(PF_DW1CR) & 0x07; // Get SH7751R MD2-MD0.
    EdbgOutputDebugString("Clock mode  : MODE %d.\r\n", dwClock);

    // This checks detected clock frequencies and round them to the one of
    // known frequencies if possible. Unknown frequency is left originally.
    // Note that unknown frequency is not treated as fatal error.
    CheckClockFrequency(); // defined in "clock.h"

	return 1;
}

#define BCD(X) (((X)%10) | (((X)/10)<<4))
#define DEC(X) (((X)&0xf) + (((X)>>4)*10))
#define BCD2(X) ( (((X)/1000)<<12) | (((X%1000)/100)<<8) | (((X%100)/10)<<4) | ((X)%10) )
#define DEC2(X) (((X)&0xf) + ((((X)&0x00f0)>>4)*10) + ((((X)&0x0f00)>>8)*100) + ((((X)&0xf000)>>12)*1000) )

/*
	@func	BOOL | OEMGetRealTime | Get the time from the realtime clock
	@rdesc	none
	@comm 	OEMGetRealTime is called by the Kernel to get the time from the
			real time clock.  This function can be called reentrantly, and
			thus must protect the hardware from multiple accesses.
*/
BOOL OEMGetRealTime(
    LPSYSTEMTIME lpst	// @parm pointer to memory to return current time
)
{
	WRITE_REGISTER_UCHAR(RTC_RCR1, READ_REGISTER_UCHAR(RTC_RCR1) & (~RTC_RCR1_CIE));		// clear CIE flag
	
	do {
		WRITE_REGISTER_UCHAR(RTC_RCR1, READ_REGISTER_UCHAR(RTC_RCR1) & (~RTC_RCR1_CF));	// clear carry flag
		lpst->wMilliseconds = 0;
		lpst->wSecond = DEC(READ_REGISTER_UCHAR(RTC_RSECCNT));
		lpst->wMinute = DEC(READ_REGISTER_UCHAR(RTC_RMINCNT));
		lpst->wHour = DEC(READ_REGISTER_UCHAR(RTC_RHRCNT));
		lpst->wDayOfWeek = READ_REGISTER_UCHAR(RTC_RWKCNT);
		lpst->wDay = DEC(READ_REGISTER_UCHAR(RTC_RDAYCNT));
		lpst->wMonth = DEC(READ_REGISTER_UCHAR(RTC_RMONCNT));
		lpst->wYear = DEC2(READ_REGISTER_USHORT(RTC_RYRCNT));
	} while (READ_REGISTER_UCHAR(RTC_RCR1) & RTC_RCR1_CF);								// carry occurred

	return TRUE;
}

/*
	@func	BOOL | OEMSetRealTime | Set the realtime clock
	@rdesc	none
	@comm 	OEMSetRealTime is called by the Kernel to set the real time clock.
			This function can be called reentrantly, and thus must protect the
			hardware from multiple accesses.
*/
BOOL OEMSetRealTime(
    LPSYSTEMTIME lpst	// @parm pointer to new time
)
{
	WRITE_REGISTER_UCHAR(RTC_RCR2, READ_REGISTER_UCHAR(RTC_RCR2) & (~RTC_RCR2_START));	// stop clock
	WRITE_REGISTER_UCHAR(RTC_RCR2, READ_REGISTER_UCHAR(RTC_RCR2) | RTC_RCR2_RESET);	// reset clock

	WRITE_REGISTER_UCHAR(RTC_RSECCNT, BCD(lpst->wSecond));
	WRITE_REGISTER_UCHAR(RTC_RMINCNT, BCD(lpst->wMinute));
	WRITE_REGISTER_UCHAR(RTC_RHRCNT, BCD(lpst->wHour));
	WRITE_REGISTER_UCHAR(RTC_RWKCNT, (BYTE)lpst->wDayOfWeek);
	WRITE_REGISTER_UCHAR(RTC_RDAYCNT, BCD(lpst->wDay));
	WRITE_REGISTER_UCHAR(RTC_RMONCNT, BCD(lpst->wMonth));
	WRITE_REGISTER_USHORT(RTC_RYRCNT, BCD2(lpst->wYear));

	WRITE_REGISTER_UCHAR(RTC_RCR2, READ_REGISTER_UCHAR(RTC_RCR2) | RTC_RCR2_START);	// start clock

	return TRUE;
}