config.cpp

Wince4.2 BSP for SH4 engineering development board

    if (dwScanFrequency == REG_NOTSPECIFIED) {
        dwScanFrequency = DEFAULT_SCAN_FREQUENCY;
        DEBUGMSG(1,
            (TEXT("AMADisp: Failed to get ScanFrequency from registry, ")
            TEXT("using default value %d.\r\n"), dwScanFrequency));
    }
    else DEBUGMSG(1,
        (TEXT("AMADisp: ScanFrequency is found, value is %d.\r\n"),
        dwScanFrequency));

    if (dwFrameRate == REG_NOTSPECIFIED) {
        dwFrameRate = DEFAULT_FRAME_RATE;
        DEBUGMSG(1,
            (TEXT("AMADisp: Failed to get FrameRate from registry, ")
            TEXT("using default value %d.\r\n"), dwFrameRate));
    }
    else DEBUGMSG(1,
        (TEXT("AMADisp: FrameRate is found, value is %d.\r\n"),
        dwFrameRate));

    if (dwVideoOutputMode == REG_NOTSPECIFIED) {
        dwVideoOutputMode = DEFAULT_VIDEO_OUTPUT_MODE;
        DEBUGMSG(1,
            (TEXT("AMADisp: Failed to get VideoOutputMode from registry, ")
            TEXT("using default value %d.\r\n"), dwVideoOutputMode));
    }
    else DEBUGMSG(1,
        (TEXT("AMADisp: VideoOutputMode is found, value is %d.\r\n"),
        dwVideoOutputMode));

    if (dwVideoOutputMode == 0)
        DEBUGMSG(1,
            (TEXT("AMADisp: For RGB, EQU/SEP pulse is not generated.\r\n")));
    else if (dwVideoOutputMode == 1)
        DEBUGMSG(1,
            (TEXT("AMADisp: EQU/SEP pulse is generated for NTSC.\r\n")));
    else if (dwVideoOutputMode == 2)
        DEBUGMSG(1,
            (TEXT("AMADisp: EQU/SEP pulse is generated for PAL.\r\n")));
    else { // Illegal mode is specified.
        RETAILMSG(1,
            (TEXT("AMADisp: Illegal video output mode %d.\r\n"),
            dwVideoOutputMode));
        return FALSE;
    }

    // Set clock parameters needed for specified display clock mode.
    // Each display clock mode is described below:
    // Mode 0: Uses HD64404 built-in display clock PLL. PLL base frequency
    //         is pixel-bus clock (MPX bus clock) frequency of HD64404.
    // Mode 1: Uses external clock oscillator directly for display clock.
    // Mode 2: Uses external clock oscillator and ICD2053B PCG (Programmable
    //         Clock Generator).

    if (dwDisplayClockMode == REG_NOTSPECIFIED) {
        dwDisplayClockMode = DEFAULT_DISPLAY_CLOCK_MODE;
        DEBUGMSG(1,
            (TEXT("AMADisp: Failed to get DisplayClockMode from registry, ")
            TEXT("using default value %d.\r\n"), dwDisplayClockMode));
    }
    else DEBUGMSG(1,
        (TEXT("AMADisp: DisplayClockMode is found, value is %d.\r\n"),
        dwDisplayClockMode));

    if (dwDisplayClockMode == 0)
        DEBUGMSG(1,
            (TEXT("AMADisp: Uses HD64404 built-in PLL.\r\n")));
    else if (dwDisplayClockMode == 1)
        DEBUGMSG(1,
            (TEXT("AMADisp: Uses external oscillator.\r\n")));
    else if (dwDisplayClockMode == 2) {
        DEBUGMSG(1,
            (TEXT("AMADisp: Uses ICD2053B clock generator.\r\n")));
    }
    else { // Unknown mode is specified.
        DEBUGMSG(1,
            (TEXT("AMADisp: Unknown display clock mode %d.\r\n"),
            dwDisplayClockMode));
        return FALSE;
    }

    if (dwDisplayClockMode == 0) {
        // Display clock mode 0, uses HD64404 built-in display clock PLL.

        if (dwPLLBaseClock == REG_NOTSPECIFIED) {
            dwPLLBaseClock = GetClockFrequency(CPUBusClock);
            if (dwPLLBaseClock == 0) {
                RETAILMSG(1,
                    (TEXT("AMADisp: Failed to get HD64404 operating clock ")
                    TEXT("frequency.\r\n")));
                return FALSE;
            }
            else DEBUGMSG(1,
                (TEXT("AMADisp: Using Bclk %dHz for PLL base frequency.\r\n"),
                dwPLLBaseClock));
        }
        else DEBUGMSG(1,
            (TEXT("AMADisp: PLLBaseClock is specified %dHz in registry, ")
            TEXT("using this instead of Bclk.\r\n"), dwPLLBaseClock));

        // Check PLL parameters if specified in registry.
        dwRet = 0; // This is used as error flag.
        if (dwPLLDividerN != REG_NOTSPECIFIED) {
            DEBUGMSG(1,
                (TEXT("AMADisp: PLLDividerN is found, value is %d.\r\n"),
                dwPLLDividerN));
            if (dwPLLDividerN < 1 || dwPLLDividerN > 8) {
                RETAILMSG(1,
                    (TEXT("AMADisp: PLLDividerN is out of range. ")
                    TEXT("([N] 1-8)\r\n")));
                dwRet = 1;
            }
        }
        if (dwPLLDividerA != REG_NOTSPECIFIED) {
            DEBUGMSG(1,
                (TEXT("AMADisp: PLLDividerA is found, value is %d.\r\n"),
                dwPLLDividerA));
            if (dwPLLDividerA < 1 || dwPLLDividerA > 16) {
                RETAILMSG(1,
                    (TEXT("AMADisp: PLLDividerA is out of range. ")
                    TEXT("([A] 1-16)\r\n")));
                dwRet = 1;
            }
        }
        if (dwPLLDividerB != REG_NOTSPECIFIED) {
            DEBUGMSG(1,
                (TEXT("AMADisp: PLLDividerB is found, value is %d.\r\n"),
                dwPLLDividerB));
            if (dwPLLDividerB < 1 || dwPLLDividerB > 16) {
                RETAILMSG(1,
                    (TEXT("AMADisp: PLLDividerB is out of range. ")
                    TEXT("([B] 1-16)\r\n")));
                dwRet = 1;
            }
        }
        if (dwPLLDividerC != REG_NOTSPECIFIED) {
            DEBUGMSG(1,
                (TEXT("AMADisp: PLLDividerC is found, value is %d.\r\n"),
                dwPLLDividerC));
            if (dwPLLDividerC < 1 || dwPLLDividerC > 4) {
                RETAILMSG(1,
                    (TEXT("AMADisp: PLLDividerC is out of range. ")
                    TEXT("([C] 1-4)\r\n")));
                dwRet = 1;
            }
        }
        if (dwPLLDividerP != REG_NOTSPECIFIED) {
            DEBUGMSG(1,
                (TEXT("AMADisp: PLLDividerP is found, value is %d.\r\n"),
                dwPLLDividerP));
            if (dwPLLDividerP < 1 || dwPLLDividerP > 2) {
                RETAILMSG(1,
                    (TEXT("AMADisp: PLLDividerP is out of range. ")
                    TEXT("([P] 1-2)\r\n")));
                dwRet = 1;
            }
        }

        if (dwRet != 0) return FALSE; // Reports all PLL range error.

        if (dwPLLDividerA != REG_NOTSPECIFIED
            && dwPLLDividerB != REG_NOTSPECIFIED
            && dwPLLDividerC != REG_NOTSPECIFIED) {
            // Most of HD64404 PLL parameters are specified.

            if (dwPLLDividerN == REG_NOTSPECIFIED) dwPLLDividerN = 1;

            // VCO oscillation frequency check
            if (dwPLLDividerP == REG_NOTSPECIFIED) {
                // Both 1 and 2 are available for DivP.
                dwVal = dwPLLBaseClock * dwPLLDividerB / dwPLLDividerA;
                if (dwVal * 2 > DO_PLL_VCOHIGH) dwRet = 1;
                else if (dwVal * 2 >= DO_PLL_VCOLOW) dwPLLDividerP = 1;
                else if (dwVal * 4 >= DO_PLL_VCOLOW) dwPLLDividerP = 2;
                else dwRet = 1;
                dwVCOFrequency = dwVal / (1 << dwPLLDividerP);
            }
            else {
                // check with specified DivP
                dwVCOFrequency = dwPLLBaseClock
                    * dwPLLDividerB / dwPLLDividerA * (1 << dwPLLDividerP);
                if (dwVCOFrequency < DO_PLL_VCOLOW
                    || dwVCOFrequency > DO_PLL_VCOHIGH) dwRet = 1;
            }
            if (dwRet != 0) {
                RETAILMSG(1,
                    (TEXT("AMADisp: PLL oscillation frequency %d is out of ")
                    TEXT("range. (50MHz - 200MHz)\r\n"), dwVal));
                return FALSE;
            }

            // Total feedback divisor must be lower or equal 32.
            if (dwPLLDividerN * dwPLLDividerB * (1 << dwPLLDividerP) > 32) {
                RETAILMSG(1,
                    (TEXT("AMADisp: Total feedback divisor rate exceeds ")
                    TEXT("limit. (N * B * (1 << P) <= 32)\r\n")));
                return FALSE;
            }

            // Set actual display clock frequency.
            dwDisplayClock = dwPLLBaseClock * dwPLLDividerN / dwPLLDividerA
                * dwPLLDividerB / dwPLLDividerC;

            // In this case, dwDesiredDisplayClock is meaningless.

        }
        else {
            // Some or all PLL parameters are omitted. In this part, auto
            // configuration is applied with limitation of each specified 
            // parameters.

            // Specified display clock is treated as 'desired' value.
            if (dwDisplayClock == REG_NOTSPECIFIED) {
                dwDisplayClock = DEFAULT_DISPLAY_CLOCK;
                DEBUGMSG(1,
                    (TEXT("AMADisp: Failed to get DisplayClock from ")
                    TEXT("registry, using default value %d.\r\n"),
                    dwDisplayClock));
            }
            else DEBUGMSG(1,
                (TEXT("AMADisp: DisplayClock is found, value is %d.\r\n"),
                dwDisplayClock));
            dwDesiredDisplayClock = dwDisplayClock;

            DEBUGMSG(1,
                (TEXT("AMADisp: Searching available parameters for HD64404 ")
                TEXT("display clock PLL...\r\n")));
            bRet = CalcInternalPLLParams(
                dwPLLBaseClock, dwDesiredDisplayClock, &dwDisplayClock,
                &dwPLLDividerN, &dwPLLDividerA, &dwPLLDividerB,
                &dwPLLDividerC, &dwPLLDividerP );
            if (!bRet) return FALSE; // No available configuration.

        }
    }

    else if (dwDisplayClockMode == 1) {
        // Display clock mode 1, external oscillator supplies display clock.

        // Applies default display clock if omitted.
        if (dwDisplayClock == REG_NOTSPECIFIED) {
            dwDisplayClock = DEFAULT_DISPLAY_CLOCK;
            DEBUGMSG(1,
                (TEXT("AMADisp: Failed to get DisplayClock from registry, ")
                TEXT("using default value %d.\r\n"), dwDisplayClock));
        }
        else DEBUGMSG(1,
            (TEXT("AMADisp: DisplayClock is found, value is %d.\r\n"),
            dwDisplayClock));
    }

    else if (dwDisplayClockMode == 2) {
        // Display clock mode 2, external ICD2053B supplies display clock.

        if (dwPLLBaseClock == REG_NOTSPECIFIED) {
            dwPLLBaseClock = DEFAULT_EXT_PLL_BASE_CLOCK;
            DEBUGMSG(1,
                (TEXT("AMADisp: Failed to get PLLBaseClock from registry, ")
                TEXT("using default value %d.\r\n"), dwPLLBaseClock));
        }
        else DEBUGMSG(1,
            (TEXT("AMADisp: PLLBaseClock is found, value is %d.\r\n"),
            dwPLLBaseClock));
        
        dwRet = 0; // This is used as error flag.
        // ICD2053 PLL reference frequency must be in 1MHz - 50MHz.
        if (dwPLLBaseClock < 1000000 || dwPLLBaseClock > 50000000) {
            RETAILMSG(1,
                (TEXT("AMADisp: PLL base frequency is out of range. ")
                TEXT("([Fref] 1MHz-50MHz)\r\n")));
            dwRet = 1;
        }
        // ICD2053 PLL divider P must be in 4 - 130.
        if (dwPLLDividerP != REG_NOTSPECIFIED) {
            DEBUGMSG(1,
                (TEXT("AMADisp: PLLDividerP is found, value is %d.\r\n"),
                dwPLLDividerP));
            if (dwPLLDividerP < 4 || dwPLLDividerP > 130) {
                RETAILMSG(1,
                    (TEXT("AMADisp: PLLDividerP is out of range. ")
                    TEXT("([P] 4-130)\r\n")));
                dwRet = 1;
            }
        }
        // ICD2053 PLL divider Q must be in 3 - 129.
        if (dwPLLDividerQ != REG_NOTSPECIFIED) {
            DEBUGMSG(1,
                (TEXT("AMADisp: PLLDividerQ is found, value is %d.\r\n"),
                dwPLLDividerQ));
            if (dwPLLDividerQ < 3 || dwPLLDividerQ > 129) {
                RETAILMSG(1,
                    (TEXT("AMADisp: PLLDividerQ is out of range. ")
                    TEXT("([Q] 3-129)\r\n")));
                dwRet = 1;
            }
        }
        // ICD2053 PLL output multiplexer must be in 0 - 7.
        if (dwPLLOutputMux != REG_NOTSPECIFIED) {
            DEBUGMSG(1,
                (TEXT("AMADisp: PLLOutputMux is found, value is %d.\r\n"),
                dwPLLOutputMux));
            if (dwPLLOutputMux > 7) {
                RETAILMSG(1,
                    (TEXT("AMADisp: PLLOutputMux is out of range. ")
                    TEXT("([M] 0 - 7)\r\n")));
                dwRet = 1;
            }
        }
        if (dwRet != 0) return FALSE; // Reports all PLL range error.

        if (dwPLLDividerP != REG_NOTSPECIFIED
            && dwPLLDividerQ != REG_NOTSPECIFIED
            && dwPLLOutputMux != REG_NOTSPECIFIED) {
            // All ICD2053 PLL parameters are specified.

            DEBUGMSG(1,
                (TEXT("AMADisp: Skipping PLL auto configuration.\r\n")));

            // Divided PLL reference frequency (Fref/Q) must be 200kHz - 1MHz.
            dwVal = dwPLLBaseClock / dwPLLDividerQ;
            if (dwVal < 200000 || dwVal > 1000000) {
                RETAILMSG(1,
                    (TEXT("AMADisp: Divided reference frequency is out of ")
                    TEXT("range. ([Fref/Q] 200kHz-1MHz)\r\n")));
                dwRet = 1;
            }

            // VCO oscillation frequency check
            dwVCOFrequency = dwPLLBaseClock
                * 2 * dwPLLDividerP / dwPLLDividerQ;
            if (dwVCOFrequency < 50000000 || dwVCOFrequency > 150000000) {
                RETAILMSG(1,
                    (TEXT("AMADisp: PLL oscillation frequency is out of ")
                TEXT("range. ([Fvco] 50MHz-150MHz)\r\n")));
                dwRet = 1;
            }

            // Set actual display clock frequency.
            dwDisplayClock = dwVCOFrequency / (1 << dwPLLOutputMux);

            // In this case, dwDesiredDisplayClock is meaningless.

        }
        else {
            // Some or all PLL parameters are omitted. In this part, auto
            // configuration is applied with limitation of each specified 
            // parameters.

            // Specified display clock is treated as 'desired' value.
            if (dwDisplayClock == REG_NOTSPECIFIED) {
                dwDisplayClock = DEFAULT_DISPLAY_CLOCK;
                DEBUGMSG(1,
                    (TEXT("AMADisp: Failed to get DisplayClock from ")
                    TEXT("registry, using default value %d.\r\n"),
                    dwDisplayClock));
            }
            else DEBUGMSG(1,
                (TEXT("AMADisp: DisplayClock is found, value is %d.\r\n"),