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📄 dispregs.h

📁 Wince4.2 BSP for SH4 engineering development board
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//
//      Copyright (c) 2001-2003 Renesas Technology Corp.
//      All Rights Reserved.
//
//      HD64404 Standard Display Driver
//
//
//  FILE      : DISPREGS.H
//  CREATED   : 2001. 1.22
//  MODIFIED  : 2003. 6.17
//  AUTHOR    : Renesas Technology Corp.
//  HARDWARE  : US7751-HRPxxC (BigSur with HD64404, ITS-DS2A)
//              HS7751RSTC01H (S1-E, ITS-DS5)
//  TARGET OS : Microsoft(R) Windows(R) CE .NET 4.2
//  FUNCTIONS : HD64404 register definition related to display driver
//  HISTORY   :
//              2001. 1.22
//              - Initially created for HD64404 preliminary specification.
//              2001. 7.23
//              - Some symbols name like Q2_xx are changed to DO_xx.
//              2001. 8.30
//              - Some register symbols are renamed.
//              2001. 9.20
//              - GE registers (Q2SD/RU) are added and filename is changed to
//               "DISPREGS.H".
//              2001.10.10
//              - Conditional definition for DSAR address is added.
//              2001.10.31
//              - GE command codes and register bits are added.
//              2002. 1.28
//              - Module register address offset values are added for
//              DisplayOut, GE, and MPXIF.
//              2002. 6.12
//              - Display clock parameters are added.
//              2002. 9.25
//              - Header style is changed.

//----------------------------------------------------------------------------

#ifndef _DISPREGS_H_
#define _DISPREGS_H_

// MPXIF registers used in AMADISP
#define MPXIF_REGSIZE   0x00000040
#define MPXIF_REGOFFSET 0x00009000
#define MPXIF_DTMR      4
#define MPXIF_LTAD      7
#define MPXIF_LTAM      8

// DisplayOut registers and display parameters
#define DO_CURSORWIDTH  64
#define DO_CURSORHEIGHT 64
#define DO_CURSORBYTES  (DO_CURSORWIDTH * DO_CURSORHEIGHT)
#define DO_REGSIZE      0x00000C00
#define DO_REGOFFSET    0x00004000
#define DO_MEMORYWIDTH  1024
#define DO_LINESTRIDE   DO_MEMORYWIDTH
#define DO_PLL_VCOHIGH  200000000 // 200MHz max
#define DO_PLL_VCOLOW   50000000 // 50MHz min
#define DO_MAXDISPLAYCLOCK  50000000 // 50MHz max

//#define DO_FOR_Q2SD_MODE
#define DO_FOR_GE_TILE_MODE
//#define DO_FOR_GE_LINEAR_MODE

#define REGSIZE     DWORD

#define DO_SYSR     0x0000 // System Control Register
#define DO_SR       0x0001 // Status Register
#define DO_SRCR     0x0002 // Status Register Clear Register
#define DO_IER      0x0003 // Interrupt Enable Register
#define DO_DSMR     0x0005 // Display Mode Register
#define DO_DSMR2    0x002B // Display Mode Register 2
#define DO_REMR     0x0006 // Rendering Mode Register
#define DO_DUFG     0x0055 // FG Extended Rendering Mode Register
#define DO_DUBG     0x0056 // BG Extended Rendering Mode Register
#define DO_DUW      0x0057 // Picture In Picture Extended Rendering Mode Register
#define DO_DSX      0x0008 // Display Size Register X
#define DO_DSY      0x0009 // Display Size Register Y
#define DO_DSAR0HQ2 0x000A // Display Start Address 0H Q2SD
#define DO_DSAR0HGE 0x0064 // Display Start Address 0H GE Tiled + Linear
#define DO_DSAR0LQ2 0x0070 // Display Start Address 0L Q2SD
#define DO_DSAR0LGE 0x0065 // Display Start Address 0L GE Tiled + Linear
#define DO_DSAR1HQ2 0x000B // Display Start Address 1H Q2SD
#define DO_DSAR1HGE 0x0066 // Display Start Address 1H GE Tiled + Linear
#define DO_DSAR1LQ2 0x0071 // Display Start Address 1L Q2SD
#define DO_DSAR1LGE 0x0067 // Display Start Address 1L GE Tiled + Linear
#define DO_HDS      0x0013 // Horizontal Display Start Position Register
#define DO_HDE      0x0014 // Horizontal Display End Position Register
#define DO_VDS      0x0015 // Vertical Display Start Position Register
#define DO_VDE      0x0016 // Vertical Display End Position Register
#define DO_HSWR     0x0017 // Horizontal Sync Pulse Width Register
#define DO_HCR      0x0018 // Horizontal Scan Cycle Register
#define DO_VSP      0x0019 // Vertical Sync Position Register
#define DO_VCR      0x001A // Vertical Scan Cycle Register
#define DO_DOORH    0x001B // Display Off Output High Register
#define DO_DOORL    0x001C // Display Off Output Low Register
#define DO_EQWR     0x0029 // Equalising Pulse Width Register
#define DO_SPWR     0x002A // Separation Width Register
#define DO_HVP      0x002C // PIP Horizontal Display Start Position H0
#define DO_VVP      0x002D // PIP Vertical Display Start Position L0
#define DO_VSAR0H   0x0031 // PIP Start Address Register 0H
#define DO_VSAR0L   0x0032 // PIP Start Address Register 0L
#define DO_VSAR1H   0x0033 // PIP Start Address Register 1H
#define DO_VSAR1L   0x0034 // PIP Start Address Register 1L
#define DO_VSAR2H   0x0035 // PIP Start Address Register 2H
#define DO_VSAR2L   0x0036 // PIP Start Address Register 2L
#define DO_VSIZEX   0x0037 // PIP Window Size Register X
#define DO_VSIZEY   0x0038 // PIP Window Size Register Y
#define DO_VIMR     0x0039 // Video Incorporation Mode Register
#define DO_HCS1     0x003A // Cursor 1 Horizontal Display Start Position
#define DO_VCS1     0x003B // Cursor 1 Vertical Display Start Position
#define DO_HCS2     0x003C // Cursor 2 Horizontal Display Start Position
#define DO_VCS2     0x003D // Cursor 2 Vertical Display Start Position
#define DO_CSAR1    0x003E // Cursor 1 Start Address Register
#define DO_CSAR2    0x003F // Cursor 2 Start Address Register
#define DO_LBGSAR   0x006C // Background Area Start Address A Register
#define DO_RBGSAR   0x006D // Background Area Start Address B Register
#define DO_LBGSX    0x0026 // Background A Start Position X
#define DO_LBGSY    0x0027 // Background A Start Position Y
#define DO_RBGSX    0x0088 // Background B Start Position X
#define DO_RBGSY    0x0089 // Background B Start Position Y
#define DO_WRPY     0x009D // Wrap Around Size Register
#define DO_DBR1     0x0091 // Display Blending Register 1
#define DO_DBR2     0x0092 // Display Blending Register 2
#define DO_TRNFGR   0x00C9 // Foreground Transparent Colour Register
#define DO_TRNC1R   0x00CA // Cursor 1 Transparent Colour Register
#define DO_TRNC2R   0x00CB // Cursor 2 Transparent Colour Register
#define DO_ECR      0x00F2 // Display Out Extension Control Register
#define DO_LIR      0x00F3 // Line Interrupt Register
#define DO_PLL      0x00F4 // Display Out PLL Register
#define DO_CPR      0x0100 // Colour Palette
#define DO_CPRRH    0x00F5 // Colour Palette Read Register H
#define DO_CPRRL    0x00F6 // Colour Palette Read Register L

#ifdef DO_FOR_Q2SD_MODE
#define DO_DSAR0H    DO_DSAR0HQ2
#define DO_DSAR0L    DO_DSAR0LQ2
#define DO_DSAR1H    DO_DSAR1HQ2
#define DO_DSAR1L    DO_DSAR1LQ2
#endif
#ifdef DO_FOR_GE_TILE_MODE
#define DO_DSAR0H    DO_DSAR0HGE
#define DO_DSAR0L    DO_DSAR0LGE
#define DO_DSAR1H    DO_DSAR1HGE
#define DO_DSAR1L    DO_DSAR1LGE
#endif
#ifdef DO_FOR_GE_LINEAR_MODE
#define DO_DSAR0     DO_DSAR0HGE
#define DO_DSAR1     DO_DSAR1HGE
#endif

#define _PLT        0x0100 // Palette base index

#define GET_DSARHQ2(X) ((X&0x007f0000)>>16|(X&0x0000fe00))
#define GET_DSARLQ2(X) ((X&0x03c00000)>>22|(X&0xfc000000)>>10)
#define GET_DSARHGE(X) ((X&0x03ff0000)>>16|(X&0xfc000000)>>17)
#define GET_DSARLGE(X) ((X&0x0000fe00))
#define GET_CSAR(X)    ((X&0xfc000000)>>10|(X&0x03ff0000)>>16|(X&0x0000f800))

// Status
#define TVR_FLAG		0x00008000	// TV Sync error
#define VBK_FLAG		0x00000800	// Vertical blanking flag
#define LIS_FLAG		0x00000040	// Line interrupt status
#define VBA_FLAG		0x00000020	// V-Blank active

// Interrupt enable
#define TVR_INT_ENABLE	0x00008000	// TV Sync error enable
#define VBE_INT_ENABLE	0x00000800	// Vertical Blanking Enable
#define LIE_INT_ENABLE	0x00000040	// Line Interrupt Enable

// Interrupt mask
#define TVR_INT_MASK	(~TVR_INT_ENABLE)
#define VBE_INT_MASK	(~VBE_INT_ENABLE)
#define LIE_INT_MASK	(~LIE_INT_ENABLE)

// GE (Graphicsa Engine) registers
#define GE_REGSIZE      0x2C00
#define GE_REGOFFSET    0x00000000  // top of HD64404 register space

#define GE_RCR          (0x2000/4)  // rendering control
#define GE_SR           (0x2004/4)  // status
#define GE_SRCR         (0x2008/4)  // status clear
#define GE_IER          (0x200C/4)  // interrupt enable
#define GE_DLSARH       (0x0030/4)  // display list start address H
#define GE_DLSARL       (0x0034/4)  // display list start address L
#define GE_CSTRH        (0x007C/4)  // command status H
#define GE_CSTRL        (0x0080/4)  // command status L
#define GE_RTNRH        (0x0128/4)  // return address H
#define GE_RTNRL        (0x012C/4)  // return address L
#define GE_RMR          (0x1018/4)  // rendering mode
#define GE_SSAR         (0x1038/4)  // source area start address
#define GE_WSAR         (0x103C/4)  // work area start address
#define GE_RSAR         (0x1130/4)  // rendering area start address
#define GE_CURRX        (0x0100/4)  // current pointer X
#define GE_CURRY        (0x0104/4)  // current pointer Y
#define GE_LCORX        (0x0108/4)  // local offset X
#define GE_LCORY        (0x010C/4)  // local offset Y
#define GE_UCLRXMIN     (0x0110/4)  // user clipping area left
#define GE_UCLRYMIN     (0x0114/4)  // user clipping area top
#define GE_UCLRXMAX     (0x0118/4)  // user clipping area right
#define GE_UCLRYMAX     (0x011C/4)  // user clipping area bottom
#define GE_SCLRXMAX     (0x0120/4)  // system clipping area right
#define GE_SCLRYMAX     (0x0124/4)  // system clipping area bottom
#define GE_COLOR        (0x0134/4)  // color offset

/* DO status and interrupt flags */
#define TVR_FLAG        0x00008000
#define VBK_FLAG        0x00000800
#define DBF_FLAF        0x00000100
#define LIS_FLAG        0x00000040
#define VBA_FLAG        0x00000020
#define TVR_FLAG_CLEAR  0x00008000
#define VBK_FLAG_CLEAR  0x00000800
#define LIS_FLAG_CLEAR  0x00000040
#define TVR_INT_ENABLE  0x00008000
#define VBK_INT_ENABLE  0x00000800
#define LI_INT_ENABLE   0x00000040

/* GE status and interrupt flags */
#define CER_FLAG        0x00000004
#define BRK_FLAG        0x00000002
#define TRA_FLAG        0x00000001
#define CER_FLAG_CLEAR  0x00000004
#define BRK_FLAG_CLEAR  0x00000002
#define TRA_FLAG_CLEAR  0x00000001
#define CER_INT_ENABLE  0x00000004
#define BRK_INT_ENABLE  0x00000002
#define TRA_INT_ENABLE  0x00000001

/* GE command code */
#define POLYGON4A 0x0000
#define POLYGON4B 0x0800
#define POLYGON4C 0x1000
#define FTRAP   0x4000
#define RFTRAP  0x4800
#define LINEW   0x5000
#define RLINEW  0x5800
#define LINE    0x6000
#define RLINE   0x6800
#define PLINE   0x7000
#define RPLINE  0x7800
#define MOVE    0x8000
#define RMOVE   0x8800
#define LCOFS   0x9000
#define RLCOFS  0x9800
#define CLRW    0xA000
#define UCLIP   0xA800
#define WPR     0xB000
#define SCLIP   0xB800
#define JUMP    0xC000
#define GOSUB   0xC800
#define RET     0xD800
#define NOP3    0xF000
#define TRAP    0xF800

/* GE draw mode bits */
#define TRNS    0x0200
#define STYL    0x0100
#define CLIP    0x0080
#define NET     0x0020
#define EOS     0x0010
#define FST     0x0008
#define LNI     0x0004
#define HALF    0x0002
#define WORK    0x0001

#endif // _DISPREGS_H_

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