scif.c

Wince4.2 BSP for SH4 engineering development board

*****************************************************************************/

BOOL SCIF_Deinit(
    PVOID   pHead)				/* points to device head */
{
    PSCIF_INFO pHWHead	= (PSCIF_INFO)pHead;
	
    DEBUGMSG (ZONE_FUNCTION,(TEXT("SERIAL : +SCIF_DEINIT, 0x%X\r\n"), pHWHead));
    /* this will handle us bailing on this routine */
	if (pHWHead != NULL)
	{
	    // Stop LinePollingThread
	    DeinitPollingThread(pHWHead);

		if (pHWHead->FlushDone)
			CloseHandle(pHWHead->FlushDone);

        // Close handlers
        if(pHWHead->hModemLinePollingEvent)
            CloseHandle(pHWHead->hModemLinePollingEvent);
        
        if(pHWHead->hKillOKEvent)
            CloseHandle(pHWHead->hKillOKEvent);

		if (pHWHead->pRegBase != NULL)
		{
			VirtualFree((BYTE*)pHWHead->pRegBase, 0, MEM_RELEASE);
		}

		if (pHWHead->pPortBase != NULL)  
		{
			VirtualFree((BYTE*)pHWHead->pPortBase, 0, MEM_RELEASE);
		}

		if (pHWHead->pIntArea1 != NULL)
		{
			VirtualFree((BYTE*)pHWHead->pIntArea1, 0, MEM_RELEASE);
		} 

		VirtualFree(pHWHead, sizeof(SCIF_INFO), MEM_DECOMMIT);
	}


    
    DEBUGMSG (ZONE_CLOSE,(TEXT("SERIAL : -SCIF_DEINIT, 0x%X\r\n"), pHWHead));
	
	return(TRUE);
}
/*****************************************************************************
*	FUNCTION :		ClearRTS
*	DESCRIPTION :	this will clear the RTS
*	INPUTS :		The pHEAD
*	OUTPUTS :		None
*	DESIGN NOTES :	We rely on the MDD to decide whether or not we are allowed
*					to call this function.
*	CAUTIONS :		To access this bit, we must do so through the SC Port 
*					of the SH-3.  1 to clear. IN SH-4, WHAT IS CLEAR?
*****************************************************************************/
VOID SCIF_ClearRTS(
    PVOID   pHead)							/* PVOID returned by SCIF_init.*/
    
{
    DEBUGMSG (ZONE_FUNCTION, (TEXT("SERIAL : +SCIF_ClearRTS, 0x%X\r\n"), pHead));

	WRITE_REGISTER_USHORT(((PSCIF_INFO)pHead)->pSCSPTR, 
		READ_REGISTER_USHORT( ((PSCIF_INFO)pHead)->pSCSPTR) | SCSPTR_RTS);

	DEBUGMSG (ZONE_FUNCTION, (TEXT("SERIAL : -SCIF_ClearRTS, 0x%X\r\n"), pHead));
}

/*****************************************************************************
*	FUNCTION :		SetRTS
*	DESCRIPTION :	this will set the RTS
*	INPUTS :		The pHEAD
*	OUTPUTS :		None
*	DESIGN NOTES :	We rely on the MDD to decide whether or not we are allowed
*					to call this function.
*	CAUTIONS :		To set/use this we MUST use the SC port.  
*****************************************************************************/
VOID SCIF_SetRTS(PVOID   pHead)		
{
    DEBUGMSG (ZONE_FUNCTION, (TEXT("SERIAL : +SCIF_SetRTS, 0x%X\r\n"), pHead));

	WRITE_REGISTER_USHORT(((PSCIF_INFO)pHead)->pSCSPTR, 
		READ_REGISTER_USHORT( ((PSCIF_INFO)pHead)->pSCSPTR) & ~SCSPTR_RTS);
        
    DEBUGMSG (ZONE_FUNCTION, (TEXT("SERIAL : -SCIF_SetRTS, 0x%X\r\n"), pHead));
}

/*****************************************************************************
*	FUNCTION :		ClearDTR
*	DESCRIPTION :	this will clear the DTR
*	INPUTS :		The pHEAD
*	OUTPUTS :		None
*	DESIGN NOTES :	We rely on the MDD to decide whether or not we are allowed
*					to call this function.
*	CAUTIONS :  	This routine is reserved because I have not signal to 
*                   control DTR yet.		
*****************************************************************************/

VOID SCIF_ClearDTR(
    PVOID   pHead)
{
    /* 
	 * This function is to disable the DTR.  
	 * But,we can't use DTR signal according to the supecification of this
	 * hardware(HS7751RSTC01H).So we don't use this function. 
	 */

/*	DEBUGMSG (ZONE_FUNCTION, (TEXT("SERIAL : +SCIF_ClearDTR, 0x%X\r\n"), pHead));
	WRITE_REGISTER_UCHAR(((PSCIF_INFO)pHead)->pSCPDR, 
			READ_REGISTER_UCHAR( ((PSCIF_INFO)pHead)->pSCPDR)| SCPDR_DTR);
    
	DEBUGMSG (ZONE_FUNCTION, (TEXT("SERIAL : -SCIF_ClearDTR, 0x%X\r\n"), pHead));*/
	return ;
}
/*****************************************************************************
*	FUNCTION :		SetDTR
*	DESCRIPTION :	this will set the DTR
*	INPUTS :		The pHEAD
*	OUTPUTS :		None
*	DESIGN NOTES :	We rely on the MDD to decide whether or not we are allowed
*					to call this function.
*	CAUTIONS :		This routine is reserved because I have no signal to 
*                   control DTR yet.
*****************************************************************************/

VOID SCIF_SetDTR(
    PVOID   pHead)
{
    /* 
	 * This function is to set the DTR.  
	 * But,we can't use DTR signal according to the supecification of this
	 * hardware(HS7751RSTC01H).So we don't use this function. 
	 */

//    DEBUGMSG (ZONE_FUNCTION, (TEXT("SERIAL : +SCIF_SetDTR, 0x%X\r\n"), pHead));
    
/*	WRITE_REGISTER_UCHAR(((PSCIF_INFO)pHead)->pSCPDR, 
		READ_REGISTER_UCHAR( ((PSCIF_INFO)pHead)->pSCPDR)& ~SCPDR_DTR);
    
	DEBUGMSG (ZONE_FUNCTION, (TEXT("SERIAL : -SCIF_SetDTR, 0x%X\r\n"), pHead));*/
	return ;
}
/*****************************************************************************
*	FUNCTION :		ClearBreak
*	DESCRIPTION :	this will clear the break (Hardware flow control)
*	INPUTS :		The pHEAD
*	OUTPUTS :		None
*	DESIGN NOTES :	We rely on the MDD to decide whether or not we are allowed
*					to call this function.
*	CAUTIONS :		To access this bit, we must do so through the SC Port 
*					of the SH-4.
*****************************************************************************/
VOID SCIF_ClearBreak(
    PVOID   pHead)				 /* PVOID returned by SCIF_init. */
{
	PSCIF_INFO pHWHead = (PSCIF_INFO)pHead;

    DEBUGMSG (ZONE_FUNCTION, (TEXT("SERIAL : +SCIF_ClearBreak, 0x%X\r\n"), pHead));  
	WRITE_REGISTER_USHORT(pHWHead->pSCSPTR, (READ_REGISTER_USHORT(pHWHead->pSCSPTR) 
		& ~SCSPTR_BEN ));
		
	/* now turn on transmit */
	WRITE_REGISTER_USHORT(pHWHead->pSCR, (READ_REGISTER_USHORT(pHWHead->pSCR) 
		| SCIF_SCSCR_TE));
				
    DEBUGMSG (ZONE_FUNCTION, (TEXT("SERIAL : -SCIF_ClearBreak, 0x%X\r\n"), pHead));
}

/*****************************************************************************
*	FUNCTION :		SetBreak
*	DESCRIPTION :	this will set the break (Hardware flow control)
*	INPUTS :		The pHEAD
*	OUTPUTS :		None
*	DESIGN NOTES :	We rely on the MDD to decide whether or not we are allowed
*					to call this function.  They do this is in a very 
*					interesting way.  To cause a break, you must stop all
*					transmits and force the Tx signals to 0.  To do 
*					this, we must forcefully take control of the Tx bits
*					in SCPCR and then 0 out the value.  We must then 
*					turn off the TE bit.  
*	CAUTIONS :		
*****************************************************************************/
VOID SCIF_SetBreak(
    PVOID   pHead)						/* PVOID returned by SCIF_init. */
{
	PSCIF_INFO pHWHead = (PSCIF_INFO)pHead;

    DEBUGMSG (ZONE_FUNCTION, (TEXT("SERIAL : +SCIF_SetBreak, 0x%X\r\n"), pHead));  
	WRITE_REGISTER_USHORT(pHWHead->pSCSPTR, (READ_REGISTER_USHORT(pHWHead->pSCSPTR) 
		& ~SCSPTR_BDATAH));
		
	/* now turn off transmit */
	WRITE_REGISTER_UCHAR(pHWHead->pSCR, (READ_REGISTER_UCHAR(pHWHead->pSCR) 
		& ~SCIF_SCSCR_TE));
		
    DEBUGMSG (ZONE_FUNCTION, (TEXT("SERIAL : -SCIF_SetBreak, 0x%X\r\n"), pHead));
}


/*****************************************************************************
*	FUNCTION :		SCIF_SetBaudRate		
*	DESCRIPTION :	configures SCIF for proper baud rate
*	INPUTS :		The pointer to the hardware struct and the baud
*	OUTPUTS :		None
*	DESIGN NOTES :	I have the option of doing this one of two ways, the 
*					cleaner solution would be to use an array that has 
*					cooresponding values by each relevant baud number, but
*					as there are two registers, it might get a little 
*					cumbersome to do this, so, I will do it with a simple switch
*					which will be more efficient and will not sacrafice any
*					substantial code space.
*	CAUTIONS :		No Debugmessages can be in this code because it is
*					called in power up/down.
*****************************************************************************/
BOOL SCIF_SetBaudRate(
    PVOID   pHead,						/* PVOID returned by SCIF_Init */
    ULONG   BaudRate)					/* ULONG representing decimal baud rate. */
{
    PSCIF_INFO	pHWHead = (PSCIF_INFO)pHead;
    BYTE		BaudValue = 0;			/* must be 8 bits */
    BYTE		Clk_div = 0;			/* not a decimal, a bit value */
	int			ret;
	USHORT		SCR;					/* old contents of SCR reg */
   	
	/* set the new Baudrate in our DCB */
    pHWHead->dcb.BaudRate = BaudRate;
	
	ret = TRUE;						/* this will be set FALSE if no match is found */
	/* 
	 * All of the values below are taken from the results of caluculation.
	*/

    if(dwClockFreq==40000000) {	
		switch(BaudRate)
		{
		case 75:
			BaudValue = 255; 
			Clk_div = SCIF_SCSMR_CKS_64;
			break;
		case 110:
			BaudValue = 175; 
			Clk_div = SCIF_SCSMR_CKS_64;
			break;
		case 135:
			BaudValue = 143; 
			Clk_div = SCIF_SCSMR_CKS_64;
			break;
		case 150:
			BaudValue = 130; 
			Clk_div = SCIF_SCSMR_CKS_64;
			break;
    	case 300:
			BaudValue = 64; 
			Clk_div = SCIF_SCSMR_CKS_64;
			break;
		case 600:
			BaudValue = 32; 
			Clk_div = SCIF_SCSMR_CKS_64;
			break;
    	case 1200:
			BaudValue = 15; 
			Clk_div = SCIF_SCSMR_CKS_64;
			break;
    	case 1800:
			BaudValue = 42; 
			Clk_div = SCIF_SCSMR_CKS_16;
			break;
		case 2000:
			BaudValue = 38; 
			Clk_div = SCIF_SCSMR_CKS_16;
			break;
    	case 2400:
			BaudValue = 129; 
			Clk_div = SCIF_SCSMR_CKS_4;
			break;
    	case 3600:
			BaudValue = 86; 
			Clk_div = SCIF_SCSMR_CKS_4;
			break;
		case 4800:
			BaudValue = 255;  
			Clk_div = SCIF_SCSMR_CKS_1; 
			break;
    	case 7200:
			BaudValue = 173; 
			Clk_div = SCIF_SCSMR_CKS_1;
			break;
    	case 9600:
			BaudValue = 129;  
			Clk_div = SCIF_SCSMR_CKS_1;
			break;
		case 12800:
			BaudValue = 97; 
			Clk_div = SCIF_SCSMR_CKS_1;
			break;
		case 14400:
			BaudValue = 86; 
			Clk_div = SCIF_SCSMR_CKS_1;
			break;
		case 19200: 
			BaudValue = 64;  
			Clk_div = SCIF_SCSMR_CKS_1;
			break;
		case 23040:
			BaudValue = 53; 
			Clk_div = SCIF_SCSMR_CKS_1;
			break;
		case 28800:
			BaudValue = 42; 
			Clk_div = SCIF_SCSMR_CKS_1;
		case 31250:
			BaudValue = 39; 
			Clk_div = SCIF_SCSMR_CKS_1;
			break;
		case 38400:
			BaudValue = 32; 
			Clk_div = SCIF_SCSMR_CKS_1;
			break;
		case 57600:
			BaudValue = 21; 
			Clk_div = SCIF_SCSMR_CKS_1;
			break;
		case 115200:
			BaudValue = 10; 
			Clk_div = SCIF_SCSMR_CKS_1;
			break;

		default:
			ret = FALSE;
		}
	}

    if(dwClockFreq==50000000) {
		switch(BaudRate)
		{
		case 75:
			BaudValue = 255; 
			Clk_div = SCIF_SCSMR_CKS_64;
			break;
		case 110:
			BaudValue = 221; 
			Clk_div = SCIF_SCSMR_CKS_64;
			break;
		case 135:
			BaudValue = 180; 
			Clk_div = SCIF_SCSMR_CKS_64;
			break;
		case 150:
			BaudValue = 162; 
			Clk_div = SCIF_SCSMR_CKS_64;
			break;
    	case 300:
			BaudValue = 80; 
			Clk_div = SCIF_SCSMR_CKS_64;
			break;
		case 600:
			BaudValue = 40; 
			Clk_div = SCIF_SCSMR_CKS_64;
			break;
    	case 1200:
			BaudValue = 19; 
			Clk_div = SCIF_SCSMR_CKS_64;
			break;
    	case 1800:
			BaudValue = 53; 
			Clk_div = SCIF_SCSMR_CKS_16;
			break;
		case 2000:
			BaudValue = 48; 
			Clk_div = SCIF_SCSMR_CKS_16;
			break;
    	case 2400:
			BaudValue = 40; 
			Clk_div = SCIF_SCSMR_CKS_16;
			break;
    	case 3600:
			BaudValue = 108; 
			Clk_div = SCIF_SCSMR_CKS_4;
			break;
		case 4800:
			BaudValue = 80;  
			Clk_div = SCIF_SCSMR_CKS_4; 
			break;
    	case 7200:
			BaudValue = 216; 
			Clk_div = SCIF_SCSMR_CKS_1;
			break;
    	case 9600:
			BaudValue = 162;