scif.h

Wince4.2 BSP for SH4 engineering development board

//
//  Copyright(c) Renesas Technology Corp. 1998-2003 All Rights Reserved.
//
//  SH4SCIF Serial Driver for HS7751RSTC01H
//
//  FILE      : scif.h
//  CREATED   : 1999.03.19 ("scif.h" for PFM-DS5)
//  MODIFIED  : 2003.08.06
//  AUTHOR    : Renesas Technology Corp.
//  HARDWARE  : RENESAS HS7751RSTC01H (S1-E, ITS-DS5)
//  TARGET OS : Microsoft(R) Windows(R) CE .NET 4.2
//  HISTORY   :
//              1999.03.19
//              - Released for PFM-DS6D SH7750 SCIF driver.
//              2002.09.26
//              - Header style is changed and file information is added.
//              - Some comments and unnecessary codes are removed.
//              2002.11.28
//              - Members and defines which are used in the CTS polling
//                thread are added.
// 

#include <s1e.h>
/* the following TEMPLATE should be replaced with the file name */
#ifndef SCIF_H
#define SCIF_H

#ifdef __cplusplus
extern "C" {
#endif

/*Because this part only defined in ccisr.src , we need 
extint0 to control DCD interrupt*/
// Since this interrupt has been used for keyboard driver. I lost the DCD singal
//#define	MExINT						0xA6000000
//#define   ExINT						0xA6000002 

/* typedefs and #defines */
#define		INTC_IRQ3_DCD_RE	0x0010				/* int of DCD Rising edge */
#define		INTC_IRQ3_DCD_FE	0x0000				/* int of DCD Falling edge */
#define		INTC_IRQ3_DCD_MASK	0x0030				/* int of DCD mask */

/* Register defines, the regs are defined in project.h, these are the bits */
/* SCSMR Serial Mode Reg */
#define SCIF_SCSMR_8BIT				0x0000	/* 8 BIT Data */
#define SCIF_SCSMR_7BIT				0x0040	/* 7 BIT Data */
#define SCIF_SCSMR_PE				0x0020	/* Parity Enable */
#define SCIF_SCSMR_ODD_PAR			0x0010	/* Odd Parity */
#define SCIF_SCSMR_EVEN_PAR			0x0000	/* Even Parity */
#define SCIF_SCSMR_1STOP			0x0000	/* 1 Stop Bit */
#define SCIF_SCSMR_2STOP			0x0008	/* 2 Stop bits */
#define SCIF_SCSMR_CKS_1			0x0000	/* Clock Selecto p0 */
#define SCIF_SCSMR_CKS_4			0x0001	/* Clock Select p0/4 */
#define SCIF_SCSMR_CKS_16			0x0002	/* Clock Select p0/16 */
#define SCIF_SCSMR_CKS_64			0x0003	/* Clock Select p0/64 */

/* SCSCR Serial Control Register */
#define SCIF_SCSCR_TIE				0x0080	/* Transmit Interrupt Enable */
#define SCIF_SCSCR_RIE				0x0040	/* receive Interrupt Enable */
#define SCIF_SCSCR_TE				0x0020	/* Transmit Enable */
#define SCIF_SCSCR_RE				0x0010	/* Receive Enable */
#define SCIF_SCSCR_CKE_0			0x0000	/* Internal Clock SCK Off */
#define SCIF_SCSCR_CKE_2			0x0002	/* External Clock SCK In */

/* SCSSR Serial Status Register */
#define SCIF_SCSSR_ER				0x0080	/* Receive Error */
#define SCIF_SCSSR_TEND				0x0040	/* Transmit End */
#define SCIF_SCSSR_TDFE				0x0020	/* Transmit FIFO Data Empty */
#define SCIF_SCSSR_BRK				0x0010	/* Break Signal Received */
#define SCIF_SCSSR_FER				0x0008	/* Frame Signal Error */
#define SCIF_SCSSR_PER				0x0004	/* Parity Error */
#define SCIF_SCSSR_RDF				0x0002	/* Receive FIFO Data Full */
#define SCIF_SCSSR_DR				0x0001	/* Receive Data Ready */
#define SCIF_SCSSR_PER_MASK			0xF000	/* Number of Parity Errors */
#define SCIF_SCSSR_FER_MASK			0x0F00	/* Number of Framing Errors */
#define SCIF_SCSSR_INTR_ALL			0x00B2	/* Interrupts that can be received */

/* FIFO Control Register */
#define SCIF_SCFCR_RTRG_1			0x0000	/* 1 Received Trigger causes RDF */
#define SCIF_SCFCR_RTRG_4			0x0040	/* 4 Received Trigger Causes RDF */
#define SCIF_SCFCR_RTRG_8			0x0080	/* 8 Received Trigger Causes RDF */
#define SCIF_SCFCR_RTRG_14			0x00C0	/* 14 Recieved Trigger Causes RDF */
#define SCIF_SCFCR_TTRG_8			0x0000	/* 8 Transmitted Triggers cause TDFE */
#define SCIF_SCFCR_TTRG_4			0x0010	/* 4 Transmitted Triggers cause TDFE */
#define SCIF_SCFCR_TTRG_2			0x0020	/* 2 Trnsmitted Triggers cause TDFE */
#define SCIF_SCFCR_TTRG_1			0x0030	/* 3 Transmitted Triggers cause TDFE */
#define SCIF_SCFCR_MCE				0x0008	/* Modem Control Enable */
#define SCIF_SCFCR_TFRST			0x0004	/* Transmit FIFO Register Reset */
#define SCIF_SCFCR_RFRST			0x0002	/* receive FIFO Register Reset */
#define SCIF_SCFCR_LOOP				0x0001	/* Internally connects TXD and RXD */

/* SCFDR */
#define SCFDR_TX_MASK				0xFF00
#define GET_SCFDR_TX_BYTES(val)		((val & SCFDR_TX_MASK)>>8)
#define SCFDR_RX_MASK				0x00FF
#define GET_SCFDR_RX_BYTES(val)		(val & SCFDR_RX_MASK)
	
#define FIFO_SIZE					16


/* 
 * Control bits for the Port Registers that coorespond to the related 
 * SCIF related bits
 */
#define		SCSPTR_RTS_EN	0x0080  /* RTS ENABLE INPUT /OUTPUT BIT IN SCSPTR*/
#define		SCSPTR_RTS		0x0040	/* RTS ON/OFF BIT IN SCSPTR */
#define		SCSPTR_CTS_EN	0x0020	/* CTS ENABLE INPUT/OUTPUT BIT IN SCSPTR*/
#define		SCSPTR_CTS		0x0010	/* CTS ON / OFF BIT IN SCSPTR */
#define		SCSPTR_BEN		0x0002  /* SERIAL PORT BREAK I/O BIT IN SCSPTR*/
#define		SCSPTR_BDATAH	0x0001  /* OUTPUT HIGH LEVEL DATA TO TXD2 */
#define		SCSPTR_BDATAL	0x0000	/* OUTPUT LOW LEVEL DATA TO TXD2 */

/* Line status register */
#define		SCIF_SCLSR_ORER		0x0001  /* An overrun error occured

/* The masks for ModemValues */
#define		MV_CTS		0x01		/* used to denote CTS is on/off */
#define		MV_DCD		0x04		/* used to denote DCD is on/off */

/* I need some ModemStatus Masks, doing the invert of the commandds is not good enough */
#define MS_CTS_MASK		      ((DWORD)0x00E0)
#define MS_RING_MASK          ((DWORD)0x00B0)
#define MS_RLSD_MASK          ((DWORD)0x0070)


/* We use a callback for serial events */
typedef VOID		(*EVENT_FUNC)(PVOID Arg1, ULONG Arg2);
#define CLOSE_DEBOUNCE_TICKS	200
#define CTS_DEBOUNCE_TICKS	40

#define MODEMLINE_POLLING_THREAD_PRIORITY 240
#define MODEMLINE_POLLING_RATE_AT_OPEN 30
#define MODEMLINE_POLLING_RATE_AT_CLOSE 100

/*
 * The SERIAL_INFO struct has many fields that are platform dep.
 */ 

typedef struct __LS_SERIAL_INFO
{
	/* Store volatile pointers to each SCIF register */
	volatile PVSHORT	pSMR;	/* pointer to Serial Mode Register */
    volatile PVBYTE		pBRR;	/* pointer to Bit Rate Register */
    volatile PVSHORT	pSCR;	/* pointer to Serial Control Reg */
    volatile PVBYTE		pFTDR;	/* pointer to Transmit Fifo Data Reg */
    volatile PVSHORT	pSSR;	/* pointer to Serail Status Reg */
    volatile PVBYTE		pFRDR;	/* pointer to Receive Data FIFO reg */
    volatile PVSHORT	pFCR;	/* pointer to FIFO Control Reg */
    volatile PVSHORT	pFDR;	/* pointer to FIFO Data Count reg */
	volatile PVSHORT	pSCSPTR;/* pointer to Serial Port Reg */
	volatile PVSHORT	pLSR;	/* Line status register */

	volatile PVBYTE		pRegBase;	/* pointer to base reg for cleaning up */
	volatile PVBYTE		pPortBase;	/* pointer to base reg for cleaning up */
	volatile PVSHORT	pIntArea1;	/* pointer to the Interrupt Control Regs */

	volatile USHORT		SCSPTR;	/* shadow of value of SCSPTR reg */
	volatile USHORT		SMR;	/* shadow of SMR */
	volatile BYTE		BRR;	/* shadow of BRR */  
	volatile USHORT		SCR;	/* shadow of SCR */
	volatile USHORT		FCR;	/* shadow of FCR */
	volatile USHORT		LSR;	/* shadow of LSR */
	
    /* We have an event callback into the MDD */
    EVENT_FUNC	EventCallback;	/* This callback exists in MDD */
    PVOID       pMddHead;		/* This is the first parm to callback */
        
    /* Keep a copy of DCB since we rely on many of its parms */
    DCB         dcb;			/* Device Control Block(copy of DCB in MDD) */
    
	/* And the same thing applies for CommTimeouts */
    COMMTIMEOUTS CommTimeouts;  /* Copy of CommTimeouts structure */
	        
	ULONG				OpenCount;	    /* Count of simultaneous opens. */
    ULONG				DroppedBytes;	/* Number of dropped bytes */
    HANDLE				FlushDone;		/* Handle to flush done event. */
    CRITICAL_SECTION	TransmitCritSec; /* Protects UART TX FIFO from simultaneous access */
	BOOL				CTSFlowOff;		/* Flag - CTS flow control state. */
    BOOL				DSRFlowOff;		/* Flag - DSR flow control state. */
	BOOL				AddTXIntr;		/* Flag - Fake a TX intr. */
    COMSTAT				Status; 		/* Bitfield representing Win32 comm status. */
    ULONG				CommErrors;		/* Bitfield representing Win32 comm error status. */
    ULONG				ModemStatus;	/* Bitfield representing Win32 modem status. */
	BOOL				CommCharInQueue; /* there is a command char in the queue */
	COMMPROP			CommProp;		/* common Properties Structure */
	int					LastClose;
	CRITICAL_SECTION	ModemCritSect;		/* Critical section to check the modem sigs */

	HANDLE				hModemLinePollingEvent;
	HANDLE				hKillOKEvent;
	HANDLE				pModemLinePollingThread;
	DWORD				fKillModemLinePollingThread;
	int					LastCTSOff;
    } SCIF_INFO, *PSCIF_INFO;

#ifdef __cplusplus
}
#endif



#endif