ddsfpga.smp_dump.txt

来自「dds设计，生成多种波形，Verilog语言」· 文本 代码 · 共 13 行

State Machine - |DDSFPGA|control:inst1|state_wave
Name state_wave.sin state_wave.triangle state_wave.square 
state_wave.square 0 0 0 
state_wave.triangle 0 1 1 
state_wave.sin 1 0 1 

State Machine - |DDSFPGA|control:inst1|state_adjust
Name state_adjust.adj10k state_adjust.adj100 state_adjust.adj1 
state_adjust.adj10k 0 0 0 
state_adjust.adj100 1 1 0 
state_adjust.adj1 1 0 1