readme

FPGA-CPLD_DesignTool(example7）

WATCHVER is a top level Verilog type project of a Stop Watch. 

DESIGN TYPE:
        ISE (chip V50 BG256 -6)

CONTROLS 
Inputs:
* CLK -System clock for the Watch design.
* STRTSTOP -Starts and stops the stoopwatch. This is an active-low signal 
            which acts like the start/stop button on a runner's stop-watch.
* RESET -Resets the stopwatch to 00.0 after it has been stopped.

Outputs:
* TENSOUT[6:0] -7-bit bus which represents the Tens digit of the stopwatch 
                value. This bus is in 7-segment display format to be viewable 
                on the 7-segment LED display. 
* ONESOUT[6:0] -similar to TENSOUT bus above, but represents the Ones digit 
                of the stopwatch value.
* TENTHSOUT[9:0] -10-bit bus which represents the Tenths digit of the stopwatch 
                  value. This bus is one-hot encoded.

DESCRIPTION:
* STMACH_A or STMACH_V -State Machine macro. This module uses the VSS 
                        StateCAD Editor to enter and implement the state machine. 
* CNT60 -Schematic-based module which counts from 0 to 59, decimal. This macro 
         has two 4-bit outputs, which represent the 'ones' and 'tens' digits of 
         the decimal values, respectively.
* TENTHS -A LogiBLOX 10-bit, one-hot encoded counter. This macro outputs the 
          'tenths' digit of the watch value as a 10-bit one-hot encoded value.
* HEX2LED -HDL-based macro. This macro decodes the ones and tens digit values 
           from hexadecimal to 7-segment display format.

SIMULATION:
Requires the following simulation libraries:
	Unisims_ver
	XilinxCoreLib
	Simprims_ver

Behavioural and RTL Simulation done using Verilog Testbench (stopwatch_tb.v).


NOTE: If you are trying to run this example in a read-only location,    
the design hierachy will not display properly. Please copy the example  
project to a new location by using either Project Save As... from the File menu
pulldown in ISE or some other method of your choice. Copy the example to a location
where you have write permissions and the hiearchy will display properly. 


For support information and contacts please see:

	http://support.xilinx.com
or
	http://support.xilinx.com/support/services/contact_info.htm