watchver_1.prm

来自「FPGA-CPLD_DesignTool(example7）」· PRM 代码 · 共 18 行

PROMGEN: Xilinx Prom Generator F.23
Copyright (c) 1995-2002 Xilinx, Inc.  All rights reserved.

promgen -w -p exo -c FF -o H:\My_Designs\watchver//watchver -u 0 H:\My_Designs\watchver\stopwatch_cclktemp.bit -x xc18v01 xc18v01 

PROM H:\My_Designs\watchver//watchver_1.prm map: Sun Dec 08 15:25:09 2002

Calculating PROM checksum with fill value ff

Format        Exormax
Size          128K
PROM start    00020000
PROM end      0003ffff
PROM checksum 00c24745

        Addr1        Addr2 File(s)
     00020000     000393d7 H:/My_Designs/watchver/stopwatch_cclktemp.bit