📄 changefreq.mac
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INCLUDE regClock.inc
INCLUDE regBase.inc
; cpld register address define
FPGA_REGS_BASE_PHYSICAL EQU (0x08000000)
JSSR_OFFSET EQU (0x20)
;-----------------------------------------------------
;read hexswitch value
;-----------------------------------------------------
MACRO
getHexSwitch $w1, $w2
ldr $w2, =FPGA_REGS_BASE_PHYSICAL
ldr $w1, [$w2, #JSSR_OFFSET]
mov $w1, $w1 ,LSR #8
and $w1, $w1, #0xf
MEND
;-----------------------------------------------------
;read hexswitch value
;-----------------------------------------------------
; Hexswitch value: 0-3 4-7 8-11 12-15
; frequency: 300/200/100 400/200/100 200/200/100 xxx/400/100
MACRO
changeFreq $w0, $w1, $w2
getHexSwitch $w0, $w1
cmp $w0, #0x0 ; {300/200/100/100}
ldreq $w2, =(CCCR_L27 :OR: CCCR_M2 :OR: CCCR_N15)
cmp $w0, #0x01 ; {300/200/100/100}
ldreq $w2, =(CCCR_L27 :OR: CCCR_M2 :OR: CCCR_N15)
cmp $w0, #0x02 ; {300/200/100/100}
ldreq $w2, =(CCCR_L27 :OR: CCCR_M2 :OR: CCCR_N15)
cmp $w0, #0x03 ; {300/200/100/100}
ldreq $w2, =(CCCR_L27 :OR: CCCR_M2 :OR: CCCR_N15)
cmp $w0, #0x04 ; {400/200/100/100}
ldreq $w2, =(CCCR_L27 :OR: CCCR_M2 :OR: CCCR_N20)
cmp $w0, #0x05 ; {400/200/100/100}
ldreq $w2, =(CCCR_L27 :OR: CCCR_M2 :OR: CCCR_N20)
cmp $w0, #0x06 ; {400/200/100/100}
ldreq $w2, =(CCCR_L27 :OR: CCCR_M2 :OR: CCCR_N10)
cmp $w0, #0x07 ; {400/200/100/100}
ldreq $w2, =(CCCR_L27 :OR: CCCR_M2 :OR: CCCR_N20)
cmp $w0, #0x08 ; {200/200/100/100}
ldreq $w2, =(CCCR_L27 :OR: CCCR_M2 :OR: CCCR_N10)
cmp $w0, #0x09 ; {200/200/100/100}
ldreq $w2, =(CCCR_L27 :OR: CCCR_M2 :OR: CCCR_N10)
cmp $w0, #0x0a ; {200/200/100/100}
ldreq $w2, =(CCCR_L27 :OR: CCCR_M2 :OR: CCCR_N10)
cmp $w0, #0x0b ; {200/200/100/100}
ldreq $w2, =(CCCR_L27 :OR: CCCR_M2 :OR: CCCR_N10)
cmp $w0, #0x0c ; {xxx/400/100/100} //For PXA255 only, run mode 400MHz
ldreq $w2, =(CCCR_L27 :OR: CCCR_M4 :OR: CCCR_N10)
cmp $w0, #0x0d ; {xxx/400/100/100}
ldreq $w2, =(CCCR_L27 :OR: CCCR_M4 :OR: CCCR_N10)
cmp $w0, #0x0e ; {xxx/400/100/100}
ldreq $w2, =(CCCR_L27 :OR: CCCR_M4 :OR: CCCR_N10)
cmp $w0, #0x0f ; {xxx/400/100/100}
ldreq $w2, =(CCCR_L27 :OR: CCCR_M4 :OR: CCCR_N10)
ldr $w1, =CLOCKREGS_PHYSICAL_BASE
str $w2, [$w1, #CCCR_OFFSET]
;set cp14
getHexSwitch $w0, $w2 ; 8-15 = DOT (Run), 0-7 = !DOT(Turbo)
cmp $w0, #0x8 ; hex_switch
bhi changeover ;if run mode
enterFCS r1
enterTurbo r1
b changeturbo
changeover
mov $w1, #2 ; frequency change bit
mcr p14, 0, $w1, c6, c0, 0 ; write CCLKCFG
changeturbo
MEND
END
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