config.h

WINDRIVER SBC7410 BSP

/* config.h - Wind River wrSbc7410 configuration header file */

/* Copyright 1984-2002 Wind River Systems, Inc. */

/*
modification history
--------------------
01k,13jan03,dee  fix SPR# 85611
01j,06jan03,dee  cleanup
01i,09jul02,gtf  Added/modified L2 caching setup.
01h,19apr02,gtf  Modified for sbc7410 bsp.
01g,17feb02,g_h  Add the NO_NETWORK option to BOOT_DEVICE type
01f,04feb02,g_h  Move some of the L2 cache macros to sysCache.h
01e,29jan02,g_h  Add #undef NV_RAM_SIZE before re-defining it.
01d,12dec01,g_h  Change RAM_HIGH_ADRS to 01E00000 
01c,23oct01,g_h  Cleaning for T2.2
01b,08apr01,g_h  add support for vWare II
01a,15aug98,est  adopted from templatePpc/config.h
*/

/*
This file contains the configuration parameters for the
Wind River PPMC74xx evaluation board.
*/

#ifndef	__INCconfigh
#define	__INCconfigh

#ifdef __cplusplus
extern "C" {
#endif

/* BSP version/revision identification, before configAll.h */

#define BSP_VER_1_1	0
#define BSP_VER_1_2	1
#define BSP_VERSION	"1.2"
#define BSP_REV		"/1"	/* 0 for first revision */

#include "configAll.h"	/* Set the VxWorks default configuration */

/* Memory configuration */

/* 
 *  The constants ROM_TEXT_ADRS, ROM_SIZE, & RAM_HIGH_ADRS are defined in 
 *  config.h, MakeSkel, Makefile, and Makefile. All definitions for these 
 *  constants must be identical.           
 */

#define ROM_BASE_ADRS             0xFFF00000 /* Physical start of ROM     */
#define ROM_TEXT_ADRS             ROM_BASE_ADRS + 0x100  /* ROM entry address */
#define ROM_SIZE                  0x00100000 /* 1MB bytes of ROM space    */
#define LOCAL_MEM_LOCAL_ADRS      0x00000000 /* Physical start of RAM     */
#define LOCAL_MEM_SIZE	          0x10000000 /* 256 Megabyte              */
#define RAM_LOW_ADRS              0x00400000 /* RAM test/data address     */
#define RAM_HIGH_ADRS             0x00e00000 /* RAM address for ROM boot  */
#define USER_RESERVED_MEM         0x0e000000 /* user reserved memory size */

#define ROM_WARM_ADRS	          (ROM_TEXT_ADRS+8)  /* warm reboot entry */

#undef	LOCAL_MEM_AUTOSIZE	  /* run-time memory sizing */

/* Flash configuration */

#define INCLUDE_FLASH

/* NvRAM configuration */

#define NV_RAM_ADRS		0x1c010000
#define NV_RAM_SIZE		0x2000 /* 8KB */
#define NV_RAM_INTRVL		1
#undef  NV_BOOT_OFFSET
#define NV_BOOT_OFFSET		0
#define NV_ENET0_OFFSET		0x0200 /* Offset of Ethernet HW adrs from the boot offset */
#define NV_ENET1_OFFSET		0x0300 /* Offset of Ethernet HW adrs from the boot offset */

/* AltiVec configuration */
#define INCLUDE_ALTIVEC

/* Serial port configuration */
#define	INCLUDE_SERIAL
#undef  NUM_TTY
#define	NUM_TTY			  N_SIO_CHANNELS /* defined in wrPpmc74xx.h */

/* Timer configuration */
#define	INCLUDE_AUXCLK
#define INCLUDE_TIMESTAMP	
#undef  INCLUDE_PPCDECTIMER_TIMESTAMP
#define INCLUDE_GT64260TIMER_TIMESTAMP

/*
 * Cache configuration
 *
 * Note that when MMU is enabled, cache modes are controlled by
 * the MMU table entries in sysPhysMemDesc[], not the cache mode
 * macros defined here.  */

#define INCLUDE_CACHE_SUPPORT 
#define USER_I_CACHE_ENABLE
#undef	USER_I_CACHE_MODE
#define USER_I_CACHE_MODE	  CACHE_COPYBACK
#define USER_D_CACHE_ENABLE
#undef  USER_D_CACHE_MODE
#define USER_D_CACHE_MODE	  CACHE_COPYBACK

/* L2 Cache configuration. */

#define INCLUDE_CACHE_L2		
/* NOTE: both modes pass VTS and can be used with either toolchain. */
#if 1
#define L2_CACHE_MODE       CACHE_WRITETHROUGH 
#else
#undef  L2_CACHE_MODE   /* copyback */
#endif
#define L2_CACHE_SIZE		L2CR_SIZE_2MB   /* L2CR constants defined in sysCache.h */
#define L2_CLK_DIVIDER		L2CR_CLK_3      /* L2CR constants defined in sysCache.h */
#undef  L2_DIFF_CLOCK	    /* define for synchronous late write SRAMs 
                               (not for this bsp)(not for this bsp)  */

/* MMU configuration */

#define INCLUDE_MMU_BASIC
#undef	INCLUDE_MMU_FULL

/* Network driver configuration */

#define INCLUDE_NETWORK
#define INCLUDE_NET_INIT
#undef  INCLUDE_SM_NET
#undef  INCLUDE_SM_SEQ_ADDR

/* Only if using network */

#ifdef  INCLUDE_NETWORK

/* Enhanced Network Driver (END) support */

#define	INCLUDE_END		/* Enhanced Network Driver (see configNet.h) */
#undef  INCLUDE_BSD		/* BSD 4.4 drivers (not supported) */

/*
 * Define BOOT_DEVICE from one of the following 4 defines
 * NO_NETWORK  FEI_END  GEI_END  WANCOM_END
*/
#define NO_NETWORK           0
#define FEI_END	             1  /* only build in the FEI driver */
#define GEI_END		     2
#define WANCOM_END	     3

#define BOOT_DEVICE    WANCOM_END /* Choose your boot Device */

#endif  /* INCLUDE_NETWORK */

/* Boot device */

#if (BOOT_DEVICE == FEI_END)
   #define BOOT_DEV_NAME "fei"
   #define INCLUDE_FEI82557END		/* include FEI driver */
   #undef  WDB_COMM_TYPE
   #define WDB_COMM_TYPE WDB_COMM_END
   #undef  ETHERNET_ADR_SET     /* undef, board has eeprom */
#elif (BOOT_DEVICE == GEI_END)
   #define BOOT_DEV_NAME "gei"
   #define INCLUDE_GEI_END
   #undef  WDB_COMM_TYPE
   #define WDB_COMM_TYPE WDB_COMM_END
   #undef  ETHERNET_ADR_SET     /* undef, board has eeprom */
#elif (BOOT_DEVICE == WANCOM_END)
   #define BOOT_DEV_NAME "wancom"
   #define INCLUDE_WANCOMEND
   #undef  WDB_COMM_TYPE
   #define WDB_COMM_TYPE WDB_COMM_END
   #define ETHERNET_ADR_SET     /* BSP must set MAC address */
#elif (BOOT_DEVICE == NO_NETWORK)
   #define BOOT_DEV_NAME "none"
   #undef  INCLUDE_FEI82557END		
   #undef  INCLUDE_GEI_END
   #undef  INCLUDE_WANCOMEND
   #undef  ETHERNET_ADR_SET     /* no network board */
#else
   #define BOOT_DEV_NAME "none"
#endif

/* Debugging configuration */

/* 			
 * If the FORCE_DEFAULT_BOOT_LINE is defined then the DEFAULT_BOOT_LINE
 * parameters are always used regardless of NVRAM values specified at
 * bootrom time. See target.nr for details. This is usually used to debug
 * downloaded images with out a bootrom present.
 */
#undef  FORCE_DEFAULT_BOOT_LINE

#ifdef  INCLUDE_WDB_COMM_VTMD
  #undef FORCE_DEFAULT_BOOT_LINE /* When using TMD this macro should be undefined */
#endif  /* INCLUDE_WDB_COMM_VTMD */

/* Stuff to be excluded if FORCE_DEFAULT_BOOT_LINE defined */

#ifdef  FORCE_DEFAULT_BOOT_LINE
  #undef  NV_RAM_SIZE
  #define NV_RAM_SIZE		  NONE
#endif  /* FORCE_DEFAULT_BOOT_LINE */

/* Boot line configuration */

#ifdef BOOT_DEV_NAME
#define DEFAULT_BOOT_LINE  BOOT_DEV_NAME\
				"(0,0)host:config/wrSbc7410/vxWorks " \
				"h=10.0.0.1 " \
				"e=10.0.0.2:ffffff00 " \
				"u=tor2 "     \
				"pw=tor2 "     \
				"f=0x0 tn=wrSbc7410" 
#endif /* BOOT_DEV_NAME */

#undef	END_OVERRIDE		  /* define if you are using old boot ROMs. */

/*
 * PCI configuration
 *
 * This board supports either the local onboard PCI bus, or the
 * offboard cPCI backplane, but not both.  If INCLUDE_PCI_STANDALONE
 * is defined, then the offboard bus is disabled.  If
 * INCLUDE_PCI_STANDALONE is not defined, then the offboard bus is
 * enabled.  JP51 must be removed for standalone operation, and inserted
 * for backplane operation
*/

#undef  INCLUDE_PCI
#define INCLUDE_PCI           /* define if you want PCI */
#undef  INCLUDE_PCI_AUTOCONF   /* define or undef for AUTOCONF */
#undef  INCLUDE_PCI_STANDALONE  /* define or undef for local or backplane */

#if  defined(INCLUDE_PCI)
  #define INCLUDE_SHOW_ROUTINES
  #define INCLUDE_NET_SHOW

  #undef PCI_CFG_TYPE
  #if defined(INCLUDE_PCI_AUTOCONF)
    #define PCI_CFG_TYPE PCI_CFG_AUTO
  #else
    #define PCI_CFG_TYPE PCI_CFG_FORCE
  #endif /* INCLUDE_PCI_AUTOCONF */

  #if defined(INCLUDE_PCI_STANDALONE)
    #undef  INCLUDE_PCI_CARD_IN_BACKPLANE
  #else
    #define INCLUDE_PCI_CARD_IN_BACKPLANE
  #endif  /* INCLUDE_PCI_STANDALONE */
#endif  /* INCLUDE_PCI */

/*
 * User application initialization
 *
 * USER_APPL_INIT must be a valid C statement or block.  It is
 * included in the usrRoot() routine only if INCLUDE_USER_APPL is
 * defined.  The code for USER_APPL_INIT is only an example.  The
 * user is expected to change it as needed.  The use of taskSpawn
 * is recommended over direct execution of the user routine.
 */

#undef	INCLUDE_USER_APPL
#define	USER_APPL_INIT \
	{ \
	IMPORT int myAppInit(); \
	taskSpawn ("myApp", 30, 0, 5120, \
		   myAppInit, 0x1, 0x2, 0x3, 0,0,0,0,0,0,0); \
	}

#define INCLUDE_TFFS
#define INCLUDE_TFFS_VOL0
#define INCLUDE_TFFS_VOL1
#define INCLUDE_TFFS_VOL2
#define INCLUDE_TFFS_VOL3
#define INCLUDE_MTD_STRATAFLASH

#define INCLUDE_TFFS_BOOT
#define INCLUDE_DISK_UTIL       /* ls, cd, mkdir, xcopy, etc. */

#define INCLUDE_DOSFS           /* usrDosFsOld.c wrapper layer */
#define INCLUDE_DOSFS_MAIN      /* dosFsLib (2) */
#define INCLUDE_DOSFS_FAT       /* dosFs FAT12/16/32 FAT table handler */
#define INCLUDE_DOSFS_DIR_VFAT  /* Microsoft VFAT dirent handler */
#define INCLUDE_DOSFS_DIR_FIXED /* 8.3 & VxLongNames directory handler */
#define INCLUDE_DOSFS_FMT       /* dosFs2 file system formatting module */
#define INCLUDE_DOSFS_CHKDSK    /* file system integrity checking */
#define INCLUDE_CBIO            /* CBIO API module */
#define INCLUDE_DISK_CACHE      /* CBIO API disk caching layer */
#define INCLUDE_DISK_PART       /* disk partition handling code, fdisk... */
#define INCLUDE_RAM_DISK        /* CBIO API ram disk driver */

/* Use Intel write buffer command instead of byte programming. */
#define STRATAFLASH_WRITE_BUFFER_MODE

/* Set manufacturer default ID here. */
#define ENET_DEFAULT 0x1EA00000     /* 00:A0:1E:xx:xx:xx */

#undef  INCLUDE_WANCOM_MII_INT

/* Tornado 2.1/2.2 compatiblilty */
#ifndef _WRS_TEXT_SEG_START
#define _WRS_TEXT_SEG_START \
        .text ; .balign 4
#endif        

#if defined (VTS_TESTING)  /* define on make command line */
#undef INCLUDE_SHOW_ROUTINES
#undef INCLUDE_PING
#undef INCLUDE_SHELL
#undef INCLUDE_NET_SHOW
#undef INCLUDE_RLOGIN
#undef INCLUDE_NET_SYM_TBL
#undef INCLUDE_LOADER
#undef INCLUDE_TIMESTAMP
#define INCLUDE_SHOW_ROUTINES
#define INCLUDE_PING
#define INCLUDE_SHELL
#define INCLUDE_NET_SHOW
#define INCLUDE_RLOGIN
#define INCLUDE_NET_SYM_TBL
#define INCLUDE_LOADER
#define INCLUDE_TIMESTAMP
#endif

/* Include hardware header file */

#include "wrSbc7410.h"

#ifdef __cplusplus
}
#endif /* __cplusplus */

#endif	/* __INCconfigh */

#if defined(PRJ_BUILD)
    #include "prjParams.h"
#endif