target.nr

WINDRIVER SBC7410 BSP

controller driver enables all muxed interrupts at the CPU mask 
register and uses the local register mask bits to "enable" and
"disable" interrupts. Muxed interrupt must be enabled and
disabled with the sysGt64260MuxedIntEnable() and sysGt64260MuxedIntDisable() 
routines defined in sysGt64260IntrCtl.c. See sysGt64260IntrCtl.c
for more details.


.SS "Delivered Objects"
The following command line build images are delivered with the wrSbc7410 BSP in the
prebuilt/diab or prebuilt/gnu directories.

.IP
bootrom_uncmp
.IP
bootrom
.IP
vxWorks
.IP
vxWorks_rom
.IP
vxWorks.st
.IP
vxWorks.st_rom
.LP

NOTE: These images have been built in standalone PCI mode and *without* the
Intel 82559 fei driver.

The bsp2prj make target has also been tested to verify that usable T2 projects
can be created in the $(WIND_BASE)/target/proj directory.


.SS "Make Targets"
Only bootrom_uncmp, bootrom & vxWorks have been tested. Both GNU and DIAB
builds have been tested using the baseline VTS tests. The makefile
additionally contains the following make targets - bootrom.bin, bootrom_uncmp.bin,
vxWorks_rom.bin and vxWorks.st_rom.bin - as a convenience. These *.bin files
are in HSI flat binary file format and can be used directly by visionCLICK.
Bootable project builds have also been tested for GNU and DIAB toolchains.

.SS "BSP Subdirectories"
The following subdirectories are delivered with the BSP.

bspVal - contains tcl source of tests run for VTS.

estregs - contains wrSbc7410 est register file for visionCLICK.

pci - contains modified PCI library files.

prebuilt - contains diab and gnu prebuilt make targets.

tffs - contains customized TFFS standard files to support custom
StrataFlash MTD.

timer - contains modified ppcDecTimer.c file; changed to allow conditional
inclusion of decrementer timestamp timer.

vtsLogs - contains VTS test results for both DIAB and GNU images as 
well as the VTS wrSbc7410.t1 resource file.


.SH "SPECIAL CONSIDERATIONS"
This section describes miscellaneous information that the user needs
to know about the BSP.

.SS "Problem using visionPROBE II/visionICE II running vxWorks image or bootrom"
When using visionPROBE II or visionICE II to run vxWorks image or bootrom you need to set
the VECTOR table location to low. To do this type the following command in visionCLICK Terminal window
or SingleStep commandline window:

.CS
    CF VECTOR LOW
.CE

And press enter after it. Failing to do this will result with crashing at address 0x0 after pressing 
the GO button. The reason for this is, VxWorks is setting the Vector table to LOW, and by default 
visionPROBE/ICE ia setting it to HIGH.

** NOTE: If you are using visionPROBE II/visionICE II to program the Flash, this option should be set to high.

.CS
    CF VECTOR HIGH
.CE

.SS "Known Problems/Limitations"

1. GT64260 errata. See the errata reference from Marvell.

2. T2.2 fei82557End driver. The T2.2 BETA driver does not work; 
   the T2.1 driver works and has been supplied with this BSP.

3. 64-bit PCI operation not tested.

4. PCI auto configuration not supported in this version of the BSP.

5. Either PCI-0 or PCI-1 can be active; but not both.

6. Bug in bootConfig.c for #include ETHERNET_ADR_SET. A local BSP copy
   of bootConfig.c has been supplied in the BSP directory to allow
   setting of MAC addresses in NVRAM for wancom0 and wancom1. 
    
7. VTS failure

8. wancom END driver poll mode receive: max data packet size is 1454 bytes.   


.SS "NOTES"

1. GT64260/GT64260A PCI-0 and PCI-1 arbiters should not be enabled - there is 
   an external arbiter on sbc7410 board.

2. Processor PMC slot board not used in PCI backplane board with sbc7410 board.

3. All ints to /INTA on I/O expand unit PCI backplane board (JP14 closed). The I/O 
   expand unit PCI backplane board does *not* have an arbiter. The Intel 21154 on
   the wrSbc7410 board has it's secondary interface arbiter enabled by default.
   The primiary side of the 21154 which is connected to the GT64260/GT64260A PCI-0
   interface does not have an arbiter. There is an external on-board (wrSbc7410
   board) arbiter which serves as the PCI bus arbiter for the PCI-0 bus.
   
4. VTS logs are contained in the BSP subdirectory ./vtsLogs. The wrSbc7410.t1 
   resource file used for the VTS is also contained in this subdirectory. The
   DIAB image logs are *.461.* and *.300.* and the GNU image logs are 
   *.392.* and *.276.*. Test tcl source is contained in the ./bspVal/src/tests
   subdirectory. These logs were obtained with L2 caching disabled. To see the 
   L2 caching logs for both diab and gnu look under the ./vtsLogs/L2 - copyback
   and ./vtsLogs/L2 - writethrough subdirectories.


.SH "BOARD LAYOUT"
The diagrams below shows the location of jumpers relevant to VxWorks:

.bS
 _______________________________________________________________________
| RJ45 | RJ45  | RS232| +------------+                                  |
|------+-------+------+ |     J45    |                                  |
| P                     +------------+                                  |
| O  +----------------+ +------------+                                  |
| W  |                | |     J36    |                            +---+ |
| E  |    Motorola    | +------------+              +--------+    |   | |
| R  |                | +-------+  +-----+          | SODIMM |    |   | |
|    |    XPC 7410    | | JP57  |  | J39 |          | SOCKET |    |   | |
|    |                | +-------+  +-----+          |        |    |   | |
|    |                |                             |        |    | J | |
|    |                |           +---+             |        |    | 5 | |
|    +----------------+           |UX4|             |        |    | 2 | |
| +-----+ +------+ +-----+        +---+             |        |    |   | |
| | SW6 | | JP44 | | SW8 |        +---+             +--------+    |   | |
| +-----+ +------+ +-----+        |UX2|                           |   | |
|    +-------+     +---------+    +---+                           |   | |
|    | J51   |     |   J50   |                   PN3      PN1     |   | |
|    +-------+     +---------+                 |------||------|   |   | |
|    | J4    |     |   J49   |                            PN2     |   | | 
|    +-------+     +---------+                         |------|   +---+ |
|    | J48   |     |   J47   |                                          |
|    +-------+     +---------+                                        |
|         +-------+                                                     |
|         |  JP51 |                       +---+---+---+---+ ------------|
|         +-------+                       |SW4|SW5|SW1|SW2| | 8 LEDS    |
|_________________________________________+---+---+---+---+_|___________|
|                                       |
|                J3                     |
-----------------------------------------
.bE
    Key:
    UX2 - Clock Oscillator Socket for PCI clocks
    UX4 - Clock Oscillator Socket for GT64260
    
    PN1, PN2, PN3 - PMC PCI-1 64 bit PCI connectors
    
    J3   - CPCI Connector
    J51  - Mictor Connectors
    J4   - Mictor Connectors
    J48  - Mictor Connectors
    J49  - Mictor Connectors
    J50  - Mictor Connectors
    J52  - PCI-1 32/64-bit PCI connector
    J57  - Mictor Connectors
    JP44 - processor bus voltage select
    JP51 - standalone/cardcage jumper (standalone - installed)
    JP57 - /ready support for slow devices
    J36  - mailbox connector
    J39  - Control FPGA ISP Header Pinout
    J45  - jtag header
	
    SW6  - PLL config
    SW8  - fpga program mode
    SW1  - GT64260 configuration
    SW2  - GT64260 configuration
    SW4  - GT64260 configuration
    SW5  - GT64260 configuration

.bS
+--------------------------------------+
|              J3                      |
| _____________________________________|_________________________________
|                                                                       |
|                                                                       |
|                                  +----------------+                   |
|   +------------+                 |    Marvell     |                   |
|   |  Intel     |                 |                |                   |
|   |  21154     |                 |      +--+      |                   |
|   |            |                 |      |  |      |                   |
|   |            |                 |      |  |      |                   |
|   |            |                 |      |  |      |                   |
|   +------------+                 |      +--+      |                   |
|                                  |                |                   |
|                                  |    GT64260A    |                   |
|                                  +----------------+                   |  
|                                                          +---------+  |
|                                                          |Intel    |  |
|                                                          |Flash    |  |
|                            +----------+                  +---------+  |
|                            | SRAM     |                  +---------+  |
|                            |          |                  |Intel    |  |
|                            +----------+                  |Flash    |  |
|                            +----------+                  +---------+  |
|                            | SRAM     |                               |
|                            |          |                               |
| Reverse side of SBC7410    +----------+                               |
|_______________________________________________________________________|

.bE



I/O Expand Unit PCI Backplane Board
.bS
 _______________________________________________________________________________
|                                                                              |
|                                                                              |
|  +-----+                                                                     |
|  |     |                                                                     |
|  |     |                                                                     |
|  |  J5 |                                                                     |
|  |     |                                                                     |
|  |-----|                                 +---+ +---+ +---+                   |
|  |     |                                 |   | |   | |   |                   |
|  |     |                                 |   | |   | |   |                   |
|  |     |                                 |   | |   | |   |                   |
|  |  J4 |                                 |   | |   | |   |                   |
|  |     |                                 |PCI| |PCI| |PCI|                   |
|  |-----|                                 |   | |   | |   |                   |
|  |     |                                 |   | |   | |   |                   |
|  |     |                                 |   | |   | |   |                   |
|  |     |                                 |   | |   | |   |                   |
|  |  J3 |                                 |   | |   | |   |                   |
|  |     |                                 |   | |   | |   |                   |
|  |-----|                   +---+         |   | |   | |   |                   |
|  |     |                   |   |         |   | |   | |   |                   |
|  |     |                   |J21|         |   | |   | |   |                   |
|  |     |                   |   |         |   | |   | |   |                   |
|  |  J2 |                   +---+         |   | |   | |   |                   |
|  |     |                   |J22|         +---+ +---+ +---+                   |
|  |-----|                   |   |          J24   J25   J26                    |
|  |     |                   |   |                                             |
|  |     |                   +---+                                             |
|  |  J1 |                                                                     |
|  |     |                      /JP15                                          |
|  +-----+                                                                     |
|       I/O Expand Unit PCI Backplane Board                                    |
|                                                                              |
|______________________________________________________________________________|
.bE

   Key:
   JP15     - INTA all on /INTA
   J1-J5    - compact PCI 64-bit slot
   J24-J25  - 64-bit PCI slots
   J21, J22 - 32-bit compact PCI slot
   
    

.SH "BIBLIOGRAPHY"

Note: Datasheets for the GT64260/GT64260A are only available from Marvell's secure
website after user registration.

.iB "wrSbc7410 User's Manual"

.iB "I/O Expand Unit User's Manual"

.iB "wrSbc7410 Schematics, Document No. SCH-00256-001"

.iB "SBC MPC74XX/GT64260 ENGINEERING SPECIFICATION, Rev 0.3, 12/19/01, WindRiver HSI"

.iB "Motorola PowerPC Microprocessor Family: The Programming Environments, 32-bit"

.iB "Peripheral Component Interconnect (PCI) Local Bus Specification, Rev 2.1,"

.iB "PCI to PCI Bridge Architecture Specification 2.0,"

.iB "PICMG 2.0 D2.14 CompactPCI Specification,"

.iB "IEEE P1386.1 Draft 2.0 - PCI Mezzanine Card Specification (PMC),"

.iB "MPC7410 RISC Microprocessor User苨 Manual, Motorola, MPC7410 UM/D Rev. 0, 10/2000."

.iB "3 Volt Intel StrataFlash