sysend.c.bak

INTEL IXP425的VXWORKS BSP

*
* This routine find out the PCI device, and map its memory and I/O address.
* It will understand both DEC21x4x and FEI type cards.
*
* RETURNS: N/A
*/

STATUS sysLanPciInit (void)
{
    PciDevice *         pDev;           /* Pci resources */
    PCI_RESOURCES *	pRsrc;		/* dec resource */
    UINT32		pciBus;		/* PCI Bus number */
    UINT32		pciDevice = 0;	/* PCI Device number */
    UINT32		pciFunc;	/* PCI Function number */
    unsigned int	ix;		/* counter */
    int			iy;		/* counter */
    int			unit = 0;	/* unit numbers */
    UINT32		boardType = NONE; /* board type detected */

#ifdef INCLUDE_FEI82557END
    FEI_RESOURCE *      pFeiRes;        /* FEI specific info */
#ifndef  IXP425_PCI_SIMPLE_MAPPING
    void* feiMemBase=NULL;
#endif
#endif

    /* Setup Interrupt Pointers */
    feiEndIntConnect = (FUNCPTR) pciIntConnect;
    feiEndIntDisconnect = (FUNCPTR) pciIntDisconnect;


    /* Find the first empty entry in the endDevTable*/
    while(endDevTbl[currentEndDevice].endLoadFunc != END_TBL_END)
    {
	currentEndDevice++;
    }

    /*
     * The following code tries to automatically detect and configure
     * all instances of supported Ethernet cards.
     */

    printpxu("\r\n  BOARD_TYPE_NB", BOARD_TYPE_NB);

    for (ix = 0; ix < BOARD_TYPE_NB; ix++)
    {
        for (iy = 0; iy < IXP425_PCI_MAX_DEV; iy++)
        {
            if( (pDev = pciDeviceGet(boardResources[ix].vendorId,
                   boardResources[ix].deviceId, iy) ) == NULL)
                break;	/* skip to next vendor/product pair */

            if( pDev->error == TRUE )
            {
                break;  /* Something wrong here */
            }

            /* board detected */
            boardType = boardResources[ix].type;
            pciBus = pDev->bus;
            pciDevice = pDev->device;
            pciFunc = pDev->func;

            /*
             * Update the END device table
             *
             * pciDevice for PCI cards plugged in is in the range 5 to 8.
             */
            pRsrc = &(pciResources[pciDevice]);

            /* We only do Auto Configuration */
            /* get memory base address and I/O base address */

#ifdef INCLUDE_FEI82557END
            	
            if ((boardType >= FEI_START) &&
                 (boardType < (FEI_START + TYPE_ALLOC)))
                {
                pFeiRes = &feiResources [unit];

                pFeiRes->pciBus    = pciBus;
                pFeiRes->pciDevice = pciDevice;
                pFeiRes->pciFunc   = pciFunc;

                pFeiRes->membaseCsr = pDev->bar[0].address;

                /* Convert to CPU address */
                pFeiRes->membaseCsr += CPU_PCI_MEM_ADRS;

#ifdef PCI_IO_ADRS_OK
                pFeiRes->iobaseCsr = pDev->bar[1].address;
                pFeiRes->iobaseCsr &= ~PCI_BASE_IO;
                pFeiRes->iobaseCsr += CPU_PCI_IO_ADRS;
#else
                pFeiRes->iobaseCsr = pFeiRes->membaseCsr;
#endif

                pFeiRes->membaseFlash = pDev->bar[2].address;

                pFeiRes->membaseFlash += CPU_PCI_MEM_ADRS;

                pFeiRes->irq = pDev->irq;
 
                pFeiRes->configType = boardType;

                }
#endif /* INCLUDE_FEI82557END */

            /*
             * Update the END device table & dynamically create the load
             * string we need for this device
             */

#ifdef INCLUDE_FEI82557END
            if ((boardType >= FEI_START) &&
                (boardType < (FEI_START + TYPE_ALLOC)))
                {
                pRsrc->buf = (void *)NONE;


#ifndef  IXP425_PCI_SIMPLE_MAPPING
		/*allocate memory for FEI END device*/
		feiMemBase = cacheDmaMalloc(FEI_TOTAL_SIZE);
		if (feiMemBase == NULL)
		{
		    return ERROR;
		}

                sprintf (endLoadStr[currentEndDevice],
                         "0x%x:0x%x:0x%x:0x%x:0x00:2", (UINT32)feiMemBase
                         , (UINT32)FEI_TOTAL_SIZE, (UINT32)FEI_N_TFDS, (UINT32)FEI_N_RFDS);
		/* set up BAR in PCI controller so that the PCI device can access
		   the memory that has just been set up for it*/

		if(sysPciMappingAdd((UINT32)feiMemBase, FEI_TOTAL_SIZE)!=OK)
		{
		    printf("sysPciMappingAdd failed in sysLanPciInit\n");
		    return ERROR;
		}
#else	
                sprintf (endLoadStr[currentEndDevice],
                        "-1:0x00:0x20:0x20:0x00:2");
#endif 

                endDevTbl[currentEndDevice].unit = unit++;
                endDevTbl[currentEndDevice].endLoadFunc = fei82557EndLoad;
                endDevTbl[currentEndDevice].endLoadString =
                                                endLoadStr[currentEndDevice];
                endDevTbl[currentEndDevice].endLoan = 1;
                currentEndDevice++;

                /* enable mapped I/O addresses */

                pciConfigOutWord (pciBus, pciDevice, pciFunc,
                          PCI_CFG_COMMAND, PCI_CMD_IO_ENABLE | PCI_CMD_MEM_ENABLE |
                          PCI_CMD_MASTER_ENABLE);
                feiUnits++;
                }
#endif /* INCLUDE_FEI82557END */

            }
        }

    return OK;
    }

#ifdef INCLUDE_FEI82557END

/*******************************************************************************
*
* sys557Init - prepare LAN adapter for 82557 initialization
*
* This routine is expected to perform any adapter-specific or target-specific
* initialization that must be done prior to initializing the 82557.
*
* The 82557 driver calls this routine from the driver attach routine before
* any other routines in this library.
*
* This routine returns the interrupt level the <pIntLvl> parameter.
*
* RETURNS: OK or ERROR if the adapter could not be prepared for initialization.
*/

STATUS sys557Init
    (
    int	unit,			/* unit number */
    FEI_BOARD_INFO * pBoard     /* board information for the end driver */
    )
{
    volatile FEI_RESOURCE * pReso = &feiResources [unit];
/*    UINT16	sum          = 0;
    int		ix;
    int		iy;
    UINT16	value;  */
    void *	testbuf = 0;	/* keep compiler quiet */
  
#ifdef PCI_END_DEBUG
    int errors;
    UINT32 testrepeat = 1000;
#endif
    /*
     * Locate the 82557 based adapter - PRO100B, INBUSINESS and XXX.
     * Note that since the INBUSINESS adapter is based upon the PRO100B
     * board type, it is initialised and driven like one.
     */
    
    if (pReso->boardType != UNKNOWN)		/* only setup once */
	{
	    
	}
    else
	{
	   printfxu("\r\n    pReso->boardType is UNKNOWN!");
	 	   
	/* read the configuration in EEPROM */
          
#ifdef PCI_END_DEBUG
	    printf("RFD_SIZE = 0x%x\n",RFD_SIZE);
	    printf("CFD_SIZE    = 0x%x\n",CFD_SIZE); 
	    printf("TOTAL FEI STORAGE: 0x%x\n",FEI_TOTAL_SIZE);

/*	    errors=0;
	    for(ix=0;ix<testrepeat; ix++)
	    {
		value = sys557eepromRead (unit, 0);
		if(value != 0x0200)
		{
		    errors++;
		}

	    }
	    printf("Test of eeprom read resulted in %d errors from %d reads\n",errors,testrepeat);  */
#endif
/*	    for (ix = 0; ix < EE_SIZE; ix++)
	    {
	    value = sys557eepromRead (unit, ix);
	    pReso->eeprom[ix] = value;	    	   
	    sum += value;
#ifdef PCI_END_DEBUG
	    printf("%4.4x ", value);
	    if(ix % 4 ==0)
	    {
		printf("\n");
	    }
#endif
	    }     
	  
	if (sum != EE_CHECKSUM)
	{
            printf ("\nfei%d: Invalid EEPROM checksum %#4.4x\n", unit, sum);  
	}     */



	/* DP83840 specific setup */

/*	if (((pReso->eeprom[6]>>8) & 0x3f) == DP83840)
	    {
	    int reg23 = sys557mdioRead (unit, pReso->eeprom[6] & 0x1f, 23);
	    sys557mdioWrite (unit, pReso->eeprom[6] & 0x1f, 23, reg23 | 0x0420);
	    }    */

	/* perform a system self-test. */

        pReso->timeout = 16000;		/* Timeout for self-test. */

	/*
	 * No specific area specified, so we assume that cacheDmaMalloc() will
	 * return a pointer to a suitable area. If the data cache is on,
	 * this will be page-aligned, but if the data cache is off, then we
	 * will just get whatever malloc returns.
	 */

       
	if (testbuf = cacheDmaMalloc (32), testbuf == 0)
	    {
	    printf("fei%d cacheDmaMalloc failed\n", unit);
	    return ERROR;
	    }

      
	
	pReso->pResults = (volatile INT32 *)testbuf;


	/* The chip requires the results buffer to be 16-byte aligned. */

        pReso->pResults    = (volatile INT32 *)
			     ((((int) pReso->pResults) + 0xf) & ~0xf);

	/* initialise results buffer */

	pReso->pResults[0] = 0;
	pReso->pResults[1] = -1;
	
	/* Issue the self-test command */
	if(sysPhysToPci((void*)pReso->pResults) == NULL)
	{
	    printf("pReso->pResults does not reside in an area that the PCI devices can access\n");
	}
	/*reset the chip*/
	sysPciOutLong (pReso->iobaseCsr + 0x8, 0x0);
	sysDelay();
	/*perform self test*/
	sysPciOutLong (pReso->iobaseCsr + 0x8, sysPhysToPci((void*)pReso->pResults) | 1);
#ifdef PCI_END_DEBUG
	printf("Asked the PCI NIC to write result of self test to PCI ADDR:0x%x\n",(UINT32)sysPhysToPci((void*)pReso->pResults));
	printf("AHB address of results: 0x%x\n", (UINT32)pReso->pResults);
#endif
	/* wait for results */
	do
	    {
	    sysDelay();		/* cause a delay of at least an I/O cycle */
	    }
	while ((pReso->pResults[1] == -1) && (--pReso->timeout >= 0));

      
      
	if (pReso->timeout < 0)
        {		/* Test optimized out. */
           
	    printf ("Self test failed, status %8.8x:\n"
		    " Failure to initialize the 82557.\n"
		    " Verify that the card is a bus-master capable slot.\n",
		    pReso->pResults[1]);
	}
	else
        {
                 
#ifdef PCI_END_DEBUG
	    printf ("General self-test: %s.\n"
		    " Serial sub-system self-test: %s.\n"
		    " Internal registers self-test: %s.\n"
		    " ROM checksum self-test: %s (%#8.8x).\n",
		    pReso->pResults[1] & 0x1000 ? "failed" : "passed",
		    pReso->pResults[1] & 0x0020 ? "failed" : "passed",
		    pReso->pResults[1] & 0x0008 ? "failed" : "passed",
		    pReso->pResults[1] & 0x0004 ? "failed" : "passed",
		    pReso->pResults[0]);
#endif
        }

	 printfxu("  pReso->boardType is assigned as PRO100B.");
        pReso->boardType = PRO100B;	/* note that it is now initialised */

        /* Save results so we can refer to them again later */

        pReso->str[0] = pReso->pResults[0];
        pReso->str[1] = pReso->pResults[1];

        cacheDmaFree (testbuf);

        pReso->pResults = pReso->str;

	}
    /* initialise the board information structure */

    

    pBoard->vector	  = IVEC_TO_INUM(pReso->irq);
    pBoard->baseAddr	  = pReso->iobaseCsr;

   
    /***************************************************
      *  Call functionRead Mac address from flash config space.
      *
      *  If successful, return true with mac address in MacAddress,
      *        pBoard->enetAddr is assigned with MacAddress.
      *  If failure, return false,  
      *        pBoard->enetAddr is assigned with sysMacBase.
      ***************************************************
      */
   {
    unsigned char MacAddress[6];
    unsigned char key[100]; 	
    sprintf(key, "mac_eth%d", unit);    

    if(GetMac(key, &MacAddress[0]) == 0)
    {
        
    	 pBoard->enetAddr[0] = MacAddress[0];
	 pBoard->enetAddr[1] = MacAddress[1];
	 pBoard->enetAddr[2] = MacAddress[2];
	 pBoard->enetAddr[3] = MacAddress[3];
	 pBoard->enetAddr[4] = MacAddress[4];
	 pBoard->enetAddr[5] = MacAddress[5];
      
    }
    else
    {
        pBoard->enetAddr[0] = 0x00;
        pBoard->enetAddr[1] = 0xe0;
        pBoard->enetAddr[2] = 0x8e;
        pBoard->enetAddr[3] = sysMacBase[2];
        pBoard->enetAddr[4] = sysMacBase[1];
        pBoard->enetAddr[5] = sysMacBase[0]+unit;
    }
    }	
    pBoard->intEnable	  = sys557IntEnable;
    pBoard->intDisable	  = sys557IntDisable;
    pBoard->intAck	  = sys557IntAck;

    /* install address conversion routines for driver
     The fei driver needs these to figure out what addresses it needs to 
    tell the nic to write to (PCI addresses) in order to access the appropriate
    areas of the AHB*/

    pBoard->sysLocalToBus = sys557EndPhysToPci;
    pBoard->sysBusToLocal = sys557EndPciToPhys;

#ifdef FEI_10MB
    pBoard->phySpeed	  = NULL;
    pBoard->phyDpx	  = NULL;
#endif
    
    intEnable (pReso->irq);

    return (OK);
	
    }

/*******************************************************************************