ixp425pciconfigshow.c

INTEL IXP425的VXWORKS BSP

/* ixp425PciConfigShow.c - PCI Show routines for the IXP425 */

/* Copyright 2002 Wind River Systems, Inc. */

/*
modification history
--------------------
01a,05jun02,jb  initial version...
*/

/*
DESCRIPTION

This module provides a group of functions that provide a variety 
of reports on the devices attached to the PCI bus.

In order for the functionality defined herein to be available, 
INCLUDE_PCI must be defined in config.h

.SH INITIALIZATION
The function sysPciInit(), which should be called from
sysHwInit() to initialize the PCI unit on the IXP425.

The function sysPciAssignAddrs() should be called from 
sysHwInit() after the call to sysPciInit to initialise 
devices on the PCI bus.

INCLUDE FILES:
ixp425Pci.h ixp425Pci_p.h

SEE ALSO:
.I "PCI Local Bus Specification, Revision 2.2, December 18, 1998"
ixp425Pci.c
*/

#include "vxWorks.h"
#include "config.h" 
#include "ixp425Pci.h"
#include "ixp425Pci_p.h"


/******************************************************************************
*
* pciAddrShow - Shows PCI address assignments
*
* This function prints the PCI address assignments automatically generated. 
* It prints a table giving for each device the bus number, device number,
* a flag indicating whether there was an error for that device, and the
* vendor/device ID. Then it lists the BARs for that device, giving the
* size of the region and its address.
*
* RETURNS: N/A
*/

void 
pciAddrShow (void)
{
    UINT32 i;
    UINT32 j;
    for (i=0; i<nDevices; i++) 
    {
        printf ("bus %d  dev %d  irq 0x%02X error %d  id %04X %04X\n",
		devices[i].bus,
		devices[i].device,
		devices[i].irq,
		devices[i].error,
		devices[i].vendor_id,
		devices[i].device_id);
        for (j=0; devices[i].bar[j].size; j++) 
	{
            printf ("  size %08X  addr %08X\n",
		    devices[i].bar[j].size,
		    devices[i].bar[j].address);
        }
    } 
}




/*******************************************************************************
*
* pciDeviceShow - print information about PCI devices
*
* This routine prints information about all PCI devices on a specified bus
* RETURNS:
* OK, or ERROR if the library is not initialized.
*/

STATUS 
pciDeviceShow (UINT32 busNo)               
{
    UINT32 deviceNo;
    UINT16 vendorId;
    UINT16 deviceId;
    UINT32 classCode;
    
    if (pciLibInitStatus != OK)                 
    {
	return (ERROR);
    }
    printf ("Scanning function 0 of each PCI device on bus %d\n", busNo);
    printf ("bus       device    function  vendorID  deviceID  class\n");
    
    for (deviceNo=0; deviceNo < IXP425_PCI_MAX_DEV; deviceNo++)
    {
	if (pciDeviceExists (busNo, deviceNo, 0))
	{
	    pciConfigInWord (busNo, deviceNo, 0, PCI_CFG_VENDOR_ID, &vendorId);	    
	    pciConfigInWord (busNo, deviceNo, 0, PCI_CFG_DEVICE_ID, &deviceId);
	    pciConfigInLong (busNo, deviceNo, 0, PCI_CFG_REVISION, &classCode);	    
	    classCode = classCode >> 8;	   
	    printf ("%.8x  %.8x  %.8x  %.8x  %.8x  %.8x\n",
		    busNo, deviceNo, 0, vendorId, deviceId, classCode);
	}
    }
    return (OK);
}




/*******************************************************************************
*
* pciDheaderPrint - print a PCI device header
*
* This routine prints a PCI device header, which contains all of the configuration
* data represented in a PCI device's configuration registers.
*
* RETURNS: N/A
*
*/

LOCAL void 
pciDheaderPrint (PCI_HEADER_DEVICE * pD)
{
    printf ("vendor ID =                   0x%.4x\n", (ushort_t)pD->vendorId);
    printf ("device ID =                   0x%.4x\n", (ushort_t)pD->deviceId);
    printf ("command register =            0x%.4x\n", (ushort_t)pD->command);
    printf ("status register =             0x%.4x\n", (ushort_t)pD->status);
    printf ("revision ID =                 0x%.2x\n", (uchar_t)pD->revisionId);
    printf ("class code =                  0x%.2x\n", (uchar_t)pD->classCode);
    printf ("sub class code =              0x%.2x\n", (uchar_t)pD->subClass);
    printf ("programming interface =       0x%.2x\n", (uchar_t)pD->progIf);
    printf ("cache line =                  0x%.2x\n", (uchar_t)pD->cacheLine);
    printf ("latency time =                0x%.2x\n", (uchar_t)pD->latency);
    printf ("header type =                 0x%.2x\n", (uchar_t)pD->headerType);
    printf ("BIST =                        0x%.2x\n", (uchar_t)pD->bist);
    printf ("base address 0 =              0x%.8x\n", pD->base0);
    printf ("base address 1 =              0x%.8x\n", pD->base1);
    printf ("base address 2 =              0x%.8x\n", pD->base2);
    printf ("base address 3 =              0x%.8x\n", pD->base3);
    printf ("base address 4 =              0x%.8x\n", pD->base4);
    printf ("base address 5 =              0x%.8x\n", pD->base5);
    printf ("cardBus CIS pointer =         0x%.8x\n", pD->cis);
    printf ("sub system vendor ID =        0x%.4x\n", (ushort_t)pD->subVendorId);
    printf ("sub system ID =               0x%.4x\n", (ushort_t)pD->subSystemId);
    printf ("expansion ROM base address =  0x%.8x\n", pD->romBase);
    printf ("interrupt line =              0x%.2x\n", (uchar_t)pD->intLine);
    printf ("interrupt pin =               0x%.2x\n", (uchar_t)pD->intPin);
    printf ("min Grant =                   0x%.2x\n", (uchar_t)pD->minGrant);
    printf ("max Latency =                 0x%.2x\n", (uchar_t)pD->maxLatency);
}


/*******************************************************************************
*
* pciBheaderPrint - print a PCI-to-PCI bridge header
*
* This routine prints a PCI-to-PCI bridge header.
*
* RETURNS: N/A
*
*/

LOCAL void 
pciBheaderPrint (PCI_HEADER_BRIDGE * pB)
{
    printf ("vendor ID =                   0x%.4x\n", (ushort_t)pB->vendorId);
    printf ("device ID =                   0x%.4x\n", (ushort_t)pB->deviceId);
    printf ("command register =            0x%.4x\n", (ushort_t)pB->command);
    printf ("status register =             0x%.4x\n", (ushort_t)pB->status);
    printf ("revision ID =                 0x%.2x\n", (uchar_t)pB->revisionId);
    printf ("class code =                  0x%.2x\n", (uchar_t)pB->classCode);
    printf ("sub class code =              0x%.2x\n", (uchar_t)pB->subClass);
    printf ("programming interface =       0x%.2x\n", (uchar_t)pB->progIf);
    printf ("cache line =                  0x%.2x\n", (uchar_t)pB->cacheLine);
    printf ("latency time =                0x%.2x\n", (uchar_t)pB->latency);
    printf ("header type =                 0x%.2x\n", (uchar_t)pB->headerType);
    printf ("BIST =                        0x%.2x\n", (uchar_t)pB->bist);
    printf ("base address 0 =              0x%.8x\n", pB->base0);
    printf ("base address 1 =              0x%.8x\n", pB->base1);
    printf ("primary bus number =          0x%.2x\n", (uchar_t)pB->priBus);
    printf ("secondary bus number =        0x%.2x\n", (uchar_t)pB->secBus);
    printf ("subordinate bus number =      0x%.2x\n", (uchar_t)pB->subBus);
    printf ("secondary latency timer =     0x%.2x\n", (uchar_t)pB->secLatency);
    printf ("IO base =                     0x%.2x\n", (uchar_t)pB->ioBase);
    printf ("IO limit =                    0x%.2x\n", (uchar_t)pB->ioLimit);
    printf ("secondary status =            0x%.4x\n", (ushort_t)pB->secStatus);
    printf ("memory base =                 0x%.4x\n", (ushort_t)pB->memBase);
    printf ("memory limit =                0x%.4x\n", (ushort_t)pB->memLimit);
    printf ("prefetch memory base =        0x%.4x\n", (ushort_t)pB->preBase);
    printf ("prefetch memory limit =       0x%.4x\n", (ushort_t)pB->preLimit);
    printf ("prefetch memory base upper =  0x%.8x\n", pB->preBaseUpper);
    printf ("prefetch memory limit upper = 0x%.8x\n", pB->preLimitUpper);
    printf ("IO base upper 16 bits =       0x%.4x\n", (ushort_t)pB->ioBaseUpper);
    printf ("IO limit upper 16 bits =      0x%.4x\n", (ushort_t)pB->ioLimitUpper);
    printf ("expansion ROM base address =  0x%.8x\n", pB->romBase);
    printf ("interrupt line =              0x%.2x\n", (uchar_t)pB->intLine);
    printf ("interrupt pin =               0x%.2x\n", (uchar_t)pB->intPin);
    printf ("bridge control =              0x%.4x\n", (ushort_t)pB->control);
}



/*******************************************************************************
*
* pciHeaderShow - print a header of the specified PCI device
*
* This routine prints a header of the PCI device specified by busNo, deviceNo,
* and funcNo.
*
* RETURNS:
* OK, or ERROR if this library is not initialized, or if no device exists at the 
* specified location.
*
*/

STATUS 
pciHeaderShow (UINT32 busNo,          /* bus number */
	       UINT32 deviceNo,       /* device number */
	       UINT32 funcNo)         /* function number */    
{
    PCI_HEADER_DEVICE headerDevice;
    PCI_HEADER_BRIDGE headerBridge;
    PCI_HEADER_DEVICE * pD = &headerDevice;
    PCI_HEADER_BRIDGE * pB = &headerBridge;
    
    if (pciLibInitStatus != OK)       
    {
	return (ERROR);
    }
    /*there is no guarantee that there is actually a device on 
      the specified bus, device and function, so we should check first*/
    if (pciDeviceExists (busNo, deviceNo, funcNo)!=TRUE)
    {
	return ERROR;
    }
    
    pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_HEADER_TYPE,
		     &pD->headerType);
    
    if (pD->headerType & 0x01)          /* PCI-to-PCI bridge */
    {
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_VENDOR_ID,
			 &pB->vendorId);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_DEVICE_ID,
			 &pB->deviceId);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_COMMAND,
			 &pB->command);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_STATUS,
			 &pB->status);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_REVISION,
			 &pB->revisionId);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_PROGRAMMING_IF,
			 &pB->progIf);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_SUBCLASS,
			 &pB->subClass);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_CLASS,
			 &pB->classCode);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_CACHE_LINE_SIZE,
			 &pB->cacheLine);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_LATENCY_TIMER,
			 &pB->latency);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_HEADER_TYPE,
			 &pB->headerType);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_BIST,
			 &pB->bist);
	pciConfigInLong (busNo, deviceNo, funcNo, PCI_CFG_BASE_ADDRESS_0,
			 &pB->base0);
	pciConfigInLong (busNo, deviceNo, funcNo, PCI_CFG_BASE_ADDRESS_1,
			 &pB->base1);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_PRIMARY_BUS,
			 &pB->priBus);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_SECONDARY_BUS,
			 &pB->secBus);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_SUBORDINATE_BUS,
			 &pB->subBus);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_SEC_LATENCY,
			 &pB->secLatency);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_IO_BASE,
			 &pB->ioBase);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_IO_LIMIT,
			 &pB->ioLimit);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_SEC_STATUS,
			 &pB->secStatus);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_MEM_BASE,
			 &pB->memBase);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_MEM_LIMIT,
			 &pB->memLimit);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_PRE_MEM_BASE,
			 &pB->preBase);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_PRE_MEM_LIMIT,
			 &pB->preLimit);
	pciConfigInLong (busNo, deviceNo, funcNo, PCI_CFG_PRE_MEM_BASE_U,
			 &pB->preBaseUpper);
	pciConfigInLong (busNo, deviceNo, funcNo, PCI_CFG_PRE_MEM_LIMIT_U,
			 &pB->preLimitUpper);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_IO_BASE_U,
			 &pB->ioBaseUpper);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_IO_LIMIT_U,
			 &pB->ioLimitUpper);
	pciConfigInLong (busNo, deviceNo, funcNo, PCI_CFG_ROM_BASE,
			 &pB->romBase);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_BRG_INT_LINE,
			 &pB->intLine);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_BRG_INT_PIN,
			 &pB->intPin);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_BRIDGE_CONTROL,
			 &pB->control);
	pciBheaderPrint (pB);
    }
    else                                        /* PCI device */
    {
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_VENDOR_ID,
			 &pD->vendorId);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_DEVICE_ID,
			 &pD->deviceId);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_COMMAND,
			 &pD->command);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_STATUS,
			 &pD->status);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_REVISION,
			 &pD->revisionId);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_PROGRAMMING_IF,
			 &pD->progIf);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_SUBCLASS,
			 &pD->subClass);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_CLASS,
			 &pD->classCode);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_CACHE_LINE_SIZE,
			 &pD->cacheLine);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_LATENCY_TIMER,
			 &pD->latency);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_HEADER_TYPE,
			 &pD->headerType);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_BIST,
			 &pD->bist);
	pciConfigInLong (busNo, deviceNo, funcNo, PCI_CFG_BASE_ADDRESS_0,
			 &pD->base0);
	pciConfigInLong (busNo, deviceNo, funcNo, PCI_CFG_BASE_ADDRESS_1,
			 &pD->base1);
	pciConfigInLong (busNo, deviceNo, funcNo, PCI_CFG_BASE_ADDRESS_2,
			 &pD->base2);
	pciConfigInLong (busNo, deviceNo, funcNo, PCI_CFG_BASE_ADDRESS_3,
			 &pD->base3);
	pciConfigInLong (busNo, deviceNo, funcNo, PCI_CFG_BASE_ADDRESS_4,
			 &pD->base4);
	pciConfigInLong (busNo, deviceNo, funcNo, PCI_CFG_BASE_ADDRESS_5,
			 &pD->base5);
	pciConfigInLong (busNo, deviceNo, funcNo, PCI_CFG_CIS,
			 &pD->cis);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_SUB_VENDOR_ID,
			 &pD->subVendorId);
	pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_SUB_SYSTEM_ID,
			 &pD->subSystemId);
	pciConfigInLong (busNo, deviceNo, funcNo, PCI_CFG_EXPANSION_ROM,
			 &pD->romBase);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_DEV_INT_LINE,
			 &pD->intLine);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_DEV_INT_PIN,
			 &pD->intPin);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_MIN_GRANT,
			 &pD->minGrant);
	pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_MAX_LATENCY,
			 &pD->maxLatency);
	pciDheaderPrint (pD);
    }
    
    return (OK);
}




/*******************************************************************************
*
* pciFindClassShow - find a device by class, then print information.
*
* This routine finds a device by class, then prints information describing
* the device's location on the PCI bus.
*
* RETURNS:
* OK, or ERROR if this library is not initialized, or the device is not found.
*
*/

STATUS 
pciFindClassShow (UINT32 classCode, /* class code */
		  UINT32 index)     /* desired instance of device */    
{
    UINT32 busNo;
    UINT32 deviceNo;
    UINT32 funcNo;
    
    if (pciFindClass (classCode, index, &busNo, &deviceNo, &funcNo) == OK)
    {
	printf ("class code = 0x%.8x\n", classCode);
	printf ("index =      0x%.8x\n", index);
	printf ("busNo =      0x%.8x\n", busNo);
	printf ("deviceNo =   0x%.8x\n", deviceNo);
	printf ("funcNo =     0x%.8x\n", funcNo);
	return (OK);
    }
    
    return (ERROR);
}