rtlmiiapi.h

INTEL IXP425的VXWORKS BSP

/**
 * @file rtlMIIAPI.h
 *
 * @author UTSTARCOM Corporation
 * @date 
 *
 * @brief  RTL8305 MII  Header file
 *
 * Design Notes:
 *
 */

#ifndef rtlMIIAPI_H
#define rtlMIIAPI_H


#define PORTA 	0x0
#define PORTB	0x1

#define RTL8305_PHY0   0x00
#define RTL8305_PHY1   0x01
#define RTL8305_PHY2   0x02
#define RTL8305_PHY3   0x03
#define RTL8305_PHY4   0x04
#define RTL8201_PHY     0x0d

#define VLANA 			0x00
#define VLANB			0x01
#define VLANC			0x02
#define VLAND			0x03
#define VLANE			0x04

#define ERR_PORT_ERROR   0xff01
#define ERR_VID_ERROR      0xff02

typedef struct {
UINT8 PHY_address;
UINT8 VLAN_register;
}VLAN_register_t;

/* realtek8305 vlan register bit definitions -  */

#define RTL_PORT0_PVID_BIT_SHL  0x00
#define RTL_PORT1_PVID_BIT_SHL  0x04
#define RTL_PORT2_PVID_BIT_SHL  0x08
#define RTL_PORT3_PVID_BIT_SHL  0x0c
#define RTL_PORT4_PVID_BIT_SHL  0x00
#define RTL_PVID_BIT_WITH  0x07

#define RTL_VLAN_INDENTIFIER_BIT_WITH 0x0FFF
#define RTL_VLAN_MEMBER_BIT_WITH 0x001F
#define RTL_VLANA_INDENTIFIER_BIT_SHL  0x00
#define RTL_VLANA_INDENTIFIER_BIT_WITH 0x0FFF
#define RTL_VLANA_MEMBER_BIT_SHL 0x00


#define RTL_VLANB_INDENTIFIER_LOWER_BIT_SHL  0x08
#define RTL_VLANB_INDENTIFIER_UPPER_BIT_SHL  0x00
#define RTL_VLANB_INDENTIFIER_LOWER_BIT_WITH 0x00FF
#define RTL_VLANB_INDENTIFIER_UPPER_BIT_WITH  0x0F
#define RTL_VLANB_MEMBER_BIT_SHL  0x08


#define RTL_VLANC_INDENTIFIER_BIT_SHL  0x00
#define RTL_VLANC_INDENTIFIER_BIT_WITH 0x0FFF
#define RTL_VLANC_MEMBER_BIT_SHL 0x00


#define RTL_VLAND_INDENTIFIER_LOWER_BIT_SHL  0x08
#define RTL_VLAND_INDENTIFIER_UPPER_BIT_SHL  0x00
#define RTL_VLAND_INDENTIFIER_LOWER_BIT_WITH 0x00FF
#define RTL_VLAND_INDENTIFIER_UPPER_BIT_WITH  0x0F
#define RTL_VLAND_MEMBER_BIT_SHL  0x08


#define RTL_VLANE_INDENTIFIER_BIT_SHL  0x00
#define RTL_VLANE_INDENTIFIER_BIT_WITH 0x0FFF
#define RTL_VLANE_MEMBER_BIT_SHL 0x00


#define RTL_VLAN_CTRL_DisableVLAN_BIT    0x0020
#define RTL_VLAN_CTRL_DISTagAware_BIT  0x0010
#define RTL_VLAN_CTRL_DISMemFilter_BIT  0x0008
#define RTL_VLAN_CTRL_DISTagAdmitCtrl    0x0004
#define RTL_VLAN_CTRL_DISLeaky                0x0002
#define RTL_VLAN_CTRL_DISARP	               0x0001

#define RTL_PRIORITY_CTRL_QWEIGHT_2_BIT	0x0300	/*  0x0300  high_q:low_q 16:1
													      0x0200  high_q firstly
													      0x0100  high_q:low_q 8:1
													      0x0000  high_q:low_q 4:1 */ 
#define RTL_PRIORITY_CTRL_DISFCAutoOff_BIT 0x0080
#define RTL_PRIORITY_CTRL_DISDSPri_BIT		0x0040
#define RTL_PRIORITY_CTRL_DISTagPri_BIT	0x0020
#define RTL_PRIORITY_CTRL_DISPort4Pri_BIT	0x0010
#define RTL_PRIORITY_CTRL_DISPort3Pri_BIT	0x0008
#define RTL_PRIORITY_CTRL_DISPort2Pri_BIT	0x0004
#define RTL_PRIORITY_CTRL_DISPort1Pri_BIT	0x0002
#define RTL_PRIORITY_CTRL_DISPort0Pri_BIT	0x0001


#define RTL_PORT_CTRL_SOFTRESET_BIT      0x8000

IxEthAccStatus realtekMdioShow (UINT32 port);
IxEthAccStatus realtekMiiInit(void);
IxEthAccStatus realtekSoftReset(UINT32 port);
#endif  /*IxEthAccMii_p_H*/