alu.xrf

一本老师推荐的经典的VHDL覆盖基础的入门书籍

vendor_name = Synplicity
source_file = 0, noname, synplify
source_file = 1, d:\prj_d\synplify_pro\source\verilog\alu.v, synplify
design_name=alu
instance = port, clk, , alu, 1, 2:6:2:8
instance = port, a[7:0], , alu, 1, 3:12:3:12
instance = port, b[7:0], , alu, 1, 3:15:3:15
instance = port, opcode[2:0], , alu, 1, 4:12:4:17
instance = port, outp[7:0], , alu, 1, 5:13:5:16
instance = comp, outp_7_, , alu, 1, 9:0:9:5
instance = comp, outp_6_, , alu, 1, 9:0:9:5
instance = comp, outp_5_, , alu, 1, 9:0:9:5
instance = comp, outp_4_, , alu, 1, 9:0:9:5
instance = comp, outp_3_, , alu, 1, 9:0:9:5
instance = comp, outp_2_, , alu, 1, 9:0:9:5
instance = comp, outp_1_, , alu, 1, 9:0:9:5
instance = comp, outp_0_, , alu, 1, 9:0:9:5
instance = comp, NoName_un1_opcode_x_Z, , alu, 1, 12:3:12:6
instance = comp, un1_b_1_x_2_, , alu, 1, 11:4:11:7
instance = comp, un1_b_1_x_3_, , alu, 1, 11:4:11:7
instance = comp, un1_b_1_x_4_, , alu, 1, 11:4:11:7
instance = comp, un1_b_1_x_5_, , alu, 1, 11:4:11:7
instance = comp, un1_b_1_x_6_, , alu, 1, 11:4:11:7
instance = comp, un1_b_1_x_7_, , alu, 1, 11:4:11:7
instance = comp, outp_8_a_7_, , alu, 1, 11:4:11:7
instance = comp, outp_8_a_6_, , alu, 1, 11:4:11:7
instance = comp, outp_8_a_5_, , alu, 1, 11:4:11:7
instance = comp, outp_8_a_4_, , alu, 1, 11:4:11:7
instance = comp, outp_8_a_3_, , alu, 1, 11:4:11:7
instance = comp, outp_8_a_2_, , alu, 1, 11:4:11:7
instance = comp, outp_8_a_1_, , alu, 1, 11:4:11:7
instance = comp, outp_8_a_0_, , alu, 1, 11:4:11:7
instance = comp, un1_a_1_add7_Z, , alu, 1, 11:4:11:7
instance = comp, un1_a_1_add6_Z, , alu, 1, 11:4:11:7
instance = comp, un1_a_1_add5_Z, , alu, 1, 11:4:11:7
instance = comp, un1_a_1_add4_Z, , alu, 1, 11:4:11:7
instance = comp, un1_a_1_add3_Z, , alu, 1, 11:4:11:7
instance = comp, un1_a_1_add2_Z, , alu, 1, 11:4:11:7
instance = comp, un1_a_1_add1_Z, , alu, 1, 11:4:11:7
instance = comp, un1_a_1_add0_Z, , alu, 1, 11:4:11:7
instance = comp, opcode_in_2_, , alu, 1, 4:12:4:17
instance = comp, opcode_in_1_, , alu, 1, 4:12:4:17
instance = comp, opcode_in_0_, , alu, 1, 4:12:4:17
instance = comp, b_in_7_, , alu, 1, 3:15:3:15
instance = comp, b_in_6_, , alu, 1, 3:15:3:15
instance = comp, b_in_5_, , alu, 1, 3:15:3:15
instance = comp, b_in_4_, , alu, 1, 3:15:3:15
instance = comp, b_in_3_, , alu, 1, 3:15:3:15
instance = comp, b_in_2_, , alu, 1, 3:15:3:15
instance = comp, b_in_1_, , alu, 1, 3:15:3:15
instance = comp, b_in_0_, , alu, 1, 3:15:3:15
instance = comp, a_in_7_, , alu, 1, 3:12:3:12
instance = comp, a_in_6_, , alu, 1, 3:12:3:12
instance = comp, a_in_5_, , alu, 1, 3:12:3:12
instance = comp, a_in_4_, , alu, 1, 3:12:3:12
instance = comp, a_in_3_, , alu, 1, 3:12:3:12
instance = comp, a_in_2_, , alu, 1, 3:12:3:12
instance = comp, a_in_1_, , alu, 1, 3:12:3:12
instance = comp, a_in_0_, , alu, 1, 3:12:3:12
instance = comp, clk_in, , alu, 1, 2:6:2:8
instance = comp, outp_out_7_, , alu, 1, 5:13:5:16
instance = comp, outp_out_6_, , alu, 1, 5:13:5:16
instance = comp, outp_out_5_, , alu, 1, 5:13:5:16
instance = comp, outp_out_4_, , alu, 1, 5:13:5:16
instance = comp, outp_out_3_, , alu, 1, 5:13:5:16
instance = comp, outp_out_2_, , alu, 1, 5:13:5:16
instance = comp, outp_out_1_, , alu, 1, 5:13:5:16
instance = comp, outp_out_0_, , alu, 1, 5:13:5:16