pll_ram.hif

一本老师推荐的经典的VHDL覆盖基础的入门书籍

PARAMETER_UNKNOWN
DEF
E0_PH
0
PARAMETER_UNKNOWN
DEF
E1_PH
0
PARAMETER_UNKNOWN
DEF
E2_PH
0
PARAMETER_UNKNOWN
DEF
E3_PH
0
PARAMETER_UNKNOWN
DEF
M_PH
0
PARAMETER_UNKNOWN
DEF
C1_USE_CASC_IN
0
PARAMETER_UNKNOWN
DEF
C2_USE_CASC_IN
0
PARAMETER_UNKNOWN
DEF
C3_USE_CASC_IN
0
PARAMETER_UNKNOWN
DEF
C4_USE_CASC_IN
0
PARAMETER_UNKNOWN
DEF
C5_USE_CASC_IN
0
PARAMETER_UNKNOWN
DEF
CLK0_COUNTER
0
PARAMETER_UNKNOWN
DEF
CLK1_COUNTER
0
PARAMETER_UNKNOWN
DEF
CLK2_COUNTER
0
PARAMETER_UNKNOWN
DEF
CLK3_COUNTER
0
PARAMETER_UNKNOWN
DEF
CLK4_COUNTER
0
PARAMETER_UNKNOWN
DEF
CLK5_COUNTER
0
PARAMETER_UNKNOWN
DEF
L0_TIME_DELAY
0
PARAMETER_UNKNOWN
DEF
L1_TIME_DELAY
0
PARAMETER_UNKNOWN
DEF
G0_TIME_DELAY
0
PARAMETER_UNKNOWN
DEF
G1_TIME_DELAY
0
PARAMETER_UNKNOWN
DEF
G2_TIME_DELAY
0
PARAMETER_UNKNOWN
DEF
G3_TIME_DELAY
0
PARAMETER_UNKNOWN
DEF
E0_TIME_DELAY
0
PARAMETER_UNKNOWN
DEF
E1_TIME_DELAY
0
PARAMETER_UNKNOWN
DEF
E2_TIME_DELAY
0
PARAMETER_UNKNOWN
DEF
E3_TIME_DELAY
0
PARAMETER_UNKNOWN
DEF
M_TIME_DELAY
0
PARAMETER_UNKNOWN
DEF
N_TIME_DELAY
0
PARAMETER_UNKNOWN
DEF
EXTCLK3_COUNTER
E3
PARAMETER_UNKNOWN
DEF
EXTCLK2_COUNTER
E2
PARAMETER_UNKNOWN
DEF
EXTCLK1_COUNTER
E1
PARAMETER_UNKNOWN
DEF
EXTCLK0_COUNTER
E0
PARAMETER_UNKNOWN
DEF
ENABLE0_COUNTER
L0
PARAMETER_UNKNOWN
DEF
ENABLE1_COUNTER
L0
PARAMETER_UNKNOWN
DEF
CHARGE_PUMP_CURRENT
2
PARAMETER_UNKNOWN
DEF
LOOP_FILTER_R
1
PARAMETER_UNKNOWN
DEF
LOOP_FILTER_C
5
PARAMETER_UNKNOWN
DEF
VCO_POST_SCALE
0
PARAMETER_UNKNOWN
DEF
INTENDED_DEVICE_FAMILY
Stratix
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Stratix
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
areset
clk
clk
clk
clk
clk
clk
clkena
clkena
clkena
clkena
clkena
clkena
extclkena
extclkena
extclkena
extclkena
inclk
inclk
locked
}
# include_file {
c:|eda|quartus|libraries|megafunctions|aglobal.inc
1067245770
c:|eda|quartus|libraries|megafunctions|stratix_pll.inc
1065209610
c:|eda|quartus|libraries|megafunctions|stratixii_pll.inc
1067519972
}
# end
# entity
dpram8x32
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
dpram8x32.v
1102174290
7
# storage
db|pll_ram(3).cnf
db|pll_ram(3).cnf
# internal_option {
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
}
# end
# entity
altsyncram
# case_insensitive
# source_file
c:|eda|quartus|libraries|megafunctions|altsyncram.tdf
1074616120
6
# storage
db|pll_ram(4).cnf
db|pll_ram(4).cnf
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
OPERATION_MODE
DUAL_PORT
PARAMETER_UNKNOWN
USR
WIDTH_A
8
PARAMETER_DEC
USR
WIDTHAD_A
5
PARAMETER_DEC
USR
NUMWORDS_A
32
PARAMETER_DEC
USR
OUTDATA_REG_A
UNREGISTERED
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_A
CLEAR0
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_A
CLEAR0
PARAMETER_UNKNOWN
USR
INDATA_ACLR_A
CLEAR0
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
8
PARAMETER_DEC
USR
WIDTHAD_B
5
PARAMETER_DEC
USR
NUMWORDS_B
32
PARAMETER_DEC
USR
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK0
PARAMETER_UNKNOWN
USR
ADDRESS_REG_B
CLOCK0
PARAMETER_UNKNOWN
USR
OUTDATA_REG_B
CLOCK0
PARAMETER_UNKNOWN
USR
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
CLEAR0
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_B
CLEAR0
PARAMETER_UNKNOWN
USR
RDCONTROL_ACLR_B
CLEAR0
PARAMETER_UNKNOWN
USR
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
1
PARAMETER_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
USR
BYTE_SIZE
8
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
USR
INIT_FILE
UNUSED
PARAMETER_UNKNOWN
DEF
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
0
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Stratix
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_7bc1
PARAMETER_UNKNOWN
USR
}
# used_port {
aclr0
address_a
address_a
address_a
address_a
address_a
address_b
address_b
address_b
address_b
address_b
clock0
data_a
data_a
data_a
data_a
data_a
data_a
data_a
data_a
q_b
q_b
q_b
q_b
q_b
q_b
q_b
q_b
rden_b
wren_a
}
# include_file {
c:|eda|quartus|libraries|megafunctions|stratix_ram_block.inc
1065209632
c:|eda|quartus|libraries|megafunctions|lpm_mux.inc
1065206910
c:|eda|quartus|libraries|megafunctions|lpm_decode.inc
1065206278
c:|eda|quartus|libraries|megafunctions|aglobal.inc
1067245770
c:|eda|quartus|libraries|megafunctions|altsyncram.inc
1067509390
c:|eda|quartus|libraries|megafunctions|a_rdenreg.inc
1065198478
c:|eda|quartus|libraries|megafunctions|altrom.inc
1065202474
c:|eda|quartus|libraries|megafunctions|altram.inc
1065202336
c:|eda|quartus|libraries|megafunctions|altdpram.inc
1065201364
c:|eda|quartus|libraries|megafunctions|altqpram.inc
1065202280
}
# end
# entity
altsyncram_7bc1
# case_insensitive
# source_file
db|altsyncram_7bc1.tdf
1102196540
6
# storage
db|pll_ram(5).cnf
db|pll_ram(5).cnf
# used_port {
wren_a
data_a0
data_a1
data_a2
data_a3
data_a4
data_a5
data_a6
data_a7
address_a0
address_a1
address_a2
address_a3
address_a4
address_b0
address_b1
address_b2
address_b3
address_b4
clock0
rden_b
aclr0
q_b0
q_b1
q_b2
q_b3
q_b4
q_b5
q_b6
q_b7
}
# memory_file {
none
0
}
# end
# entity
lpm_counter
# case_insensitive
# source_file
c:|eda|quartus|libraries|megafunctions|lpm_counter.tdf
1074616120
6
# storage
db|pll_ram(6).cnf
db|pll_ram(6).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
5
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
UP
PARAMETER_UNKNOWN
USR
LPM_MODULUS
0
PARAMETER_UNKNOWN
DEF
LPM_AVALUE
0
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
0
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Stratix
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
ON
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
NOTHING
PARAMETER_UNKNOWN
DEF
}
# used_port {
aclr
clock
cnt_en
q0
q1
q2
q3
q4
}
# include_file {
c:|eda|quartus|libraries|megafunctions|lpm_constant.inc
1065206142
c:|eda|quartus|libraries|megafunctions|lpm_decode.inc
1065206278
c:|eda|quartus|libraries|megafunctions|lpm_add_sub.inc
1065205794
c:|eda|quartus|libraries|megafunctions|cmpconst.inc
1065204392
c:|eda|quartus|libraries|megafunctions|lpm_compare.inc
1065206072
c:|eda|quartus|libraries|megafunctions|lpm_counter.inc
1065206208
c:|eda|quartus|libraries|megafunctions|dffeea.inc
1065204974
c:|eda|quartus|libraries|megafunctions|alt_synch_counter.inc
1065200082
c:|eda|quartus|libraries|megafunctions|alt_synch_counter_f.inc
1065200140
c:|eda|quartus|libraries|megafunctions|alt_counter_f10ke.inc
1065198980
c:|eda|quartus|libraries|megafunctions|alt_counter_stratix.inc
1065199034
c:|eda|quartus|libraries|megafunctions|aglobal.inc
1067245770
}
# end
# entity
alt_counter_stratix
# case_insensitive
# source_file
c:|eda|quartus|libraries|megafunctions|alt_counter_stratix.tdf
1074616120
6
# storage
db|pll_ram(7).cnf
db|pll_ram(7).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
5
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
UP
PARAMETER_UNKNOWN
USR
LPM_MODULUS
0
PARAMETER_UNKNOWN
USR
LPM_SVALUE
31
PARAMETER_UNKNOWN
DEF
LPM_AVALUE
31
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CASCADE_CHAIN_LENGTH
2
CASCADE_CHAIN_LENGTH
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Stratix
PARAMETER_UNKNOWN
USR
}
# used_port {
clock
cnt_en
aclr
q0
q1
q2
q3
q4
cout
}
# include_file {
c:|eda|quartus|libraries|megafunctions|stratix_lcell.inc
1065209494
c:|eda|quartus|libraries|megafunctions|lpm_constant.inc
1065206142
c:|eda|quartus|libraries|megafunctions|lpm_compare.inc
1065206072
c:|eda|quartus|libraries|megafunctions|aglobal.inc
1067245770
}
# end
# complete