pll_ram.map.eqn

一本老师推荐的经典的VHDL覆盖基础的入门书籍

--H1_safe_q[0] is lpm_counter:wr_addr_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0]
--operation mode is arithmetic

H1_safe_q[0]_lut_out = H1_safe_q[0] $ wr_en;
H1_safe_q[0] = DFFEA(H1_safe_q[0]_lut_out, G1__clk0, rst, , , , );

--H1L3 is lpm_counter:wr_addr_rtl_0|alt_counter_stratix:wysi_counter|counter_cell[0]~COUT
--operation mode is arithmetic

H1L3 = CARRY(H1_safe_q[0]);


--A1L22 is i~24
--operation mode is normal

A1L22 = !H1_safe_q[1] # !H1_safe_q[2] # !H1_safe_q[3] # !H1_safe_q[4];


--A1L12 is i~1
--operation mode is normal

A1L12 = A1L22 # !H1_safe_q[0];


--rst is rst
--operation mode is input

rst = INPUT();


--clk_in is clk_in
--operation mode is input

clk_in = INPUT();


--wr_en is wr_en
--operation mode is input

wr_en = INPUT();


--rd_en is rd_en
--operation mode is input

rd_en = INPUT();


--data_in[7] is data_in[7]
--operation mode is input

data_in[7] = INPUT();


--rd_addr[0] is rd_addr[0]
--operation mode is input

rd_addr[0] = INPUT();


--rd_addr[1] is rd_addr[1]
--operation mode is input

rd_addr[1] = INPUT();


--rd_addr[2] is rd_addr[2]
--operation mode is input

rd_addr[2] = INPUT();


--rd_addr[3] is rd_addr[3]
--operation mode is input

rd_addr[3] = INPUT();


--rd_addr[4] is rd_addr[4]
--operation mode is input

rd_addr[4] = INPUT();


--data_in[6] is data_in[6]
--operation mode is input

data_in[6] = INPUT();


--data_in[5] is data_in[5]
--operation mode is input

data_in[5] = INPUT();


--data_in[4] is data_in[4]
--operation mode is input

data_in[4] = INPUT();


--data_in[3] is data_in[3]
--operation mode is input

data_in[3] = INPUT();


--data_in[2] is data_in[2]
--operation mode is input

data_in[2] = INPUT();


--data_in[1] is data_in[1]
--operation mode is input

data_in[1] = INPUT();


--data_in[0] is data_in[0]
--operation mode is input

data_in[0] = INPUT();


--clk_out is clk_out
--operation mode is output

clk_out = OUTPUT(G1__clk0);


--lock is lock
--operation mode is output

lock = OUTPUT(G1__locked);


--package_full is package_full
--operation mode is output

package_full = OUTPUT(!A1L12);


--data_out[7] is data_out[7]
--operation mode is output

data_out[7] = OUTPUT(F1_q_b[7]);


--data_out[6] is data_out[6]
--operation mode is output

data_out[6] = OUTPUT(F1_q_b[6]);


--data_out[5] is data_out[5]
--operation mode is output

data_out[5] = OUTPUT(F1_q_b[5]);


--data_out[4] is data_out[4]
--operation mode is output

data_out[4] = OUTPUT(F1_q_b[4]);


--data_out[3] is data_out[3]
--operation mode is output

data_out[3] = OUTPUT(F1_q_b[3]);


--data_out[2] is data_out[2]
--operation mode is output

data_out[2] = OUTPUT(F1_q_b[2]);


--data_out[1] is data_out[1]
--operation mode is output

data_out[1] = OUTPUT(F1_q_b[1]);


--data_out[0] is data_out[0]
--operation mode is output

data_out[0] = OUTPUT(F1_q_b[0]);