sad9883.c

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/*------------------------------------------------------------------------
--  Copyright 2003 by Silicon Optix Inc.  All rights reserved. 
--
--  This document contains proprietary and confidential information of
--  Silicon Optix Inc. Distribution, copying, disclosure, or incorporation
--  in other material in whole, in part, or modified form is strictly 
--  prohibited without written permission from Silicon Optix Inc. 
--  Use of this information must be in accordance with the Silicon Optix
--  Software Licensing Agreement. If this information is received in error, 
--  please delete and notify us immediately.
--
------------------------------------------------------------------------
-- File Name  : sAd9883.c
-- Purpose    : 
--            :
------------------------------------------------------------------------
-- Revision History:
------------------------------------------------------------------------
-- <See $Log at end for detailed CVS history>
-- 
-- Creator's Name : Hung Nguyen
-- Creation Date  : Oct. 10, 2003
-- Comment        : 
--
-- Revision   : 
-- Name       : 
-- Date       :
-- Comment    :
--                                                                   
*-------------------------------------------------------------------------
$Id: sAd9883.c,v 1.2 2003/10/16 17:39:16 lawrence Exp $
*/

#define SAD9883_C
/****************************************************************************/
/*  I N C L U D E    F I L E S                                                       */
/****************************************************************************/

#include "main/aConfig.h"
#include "main/aGlobal.h"
#ifdef uI_NUCLEUS
#include	"nucleus.h"
#include	"Tc_defs.h"
#endif
#include "sd_defs.h"
#include "sd_extr.h"
#include "main/uItron/uI_types.h"
#include "main/uItron/uI_setm.h"
#include "main/uItron/uI_nplus.h"
#include "main/aInit.h"


#include "Driver.h"
#include "Driver/adc/dadc.h"
#include "Driver/adc/dadc2.h"
#include "Driver/common/aDrvTsk.h"
#include "Driver/Uart/dUart.h"
#include "Driver/Uart/dUart1.h"
#include "Driver/Uart/dUart2.h"
#include "aLogTsk.h"

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "Image/Detect/sMode.h"
#include "Image/Detect/sPort.h"
#include "Image/Detect/sDetect.h"
#include "sAd9883.h"

#if ADC_OPTION ==ADC_9883 || ADC2_OPTION ==ADC_9883
BYTE byWriteSingleDataAd9883(BYTE by_reg_address, BYTE by_data)
{
#if 0
	tst_ADC_WRITE_CONFIG st_adc_write_config;

#ifdef Use_DRV_NONBLOCKING_OPTION
	st_adc_write_config.t_blocking = BLOCKING;
#endif
	
	st_adc_write_config.t_change_priority = PRI_NO_CHANGE;
	st_adc_write_config.u32_delay = 0;
	st_adc_write_config.u32_max_count = 5;
	st_adc_write_config.u32_reg_address = by_reg_address;
	st_adc_write_config.u32_length = 1;
#if ADC_OPTION ==ADC_9883
	return st_adc_driver.Write(&by_data, &st_adc_write_config, &st_adc_driver);
#elif ADC2_OPTION ==ADC_9883
	return st_adc2_driver.Write(&by_data, &st_adc_write_config, &st_adc2_driver);
#endif
#endif
return OK;
}

BYTE byReadSingleDataAd9883(BYTE by_reg_address, BYTE *byp_data)
{
#if 0
	tst_ADC_READ_CONFIG st_adc_read_config;

#ifdef Use_DRV_NONBLOCKING_OPTION
	st_adc_read_config.t_blocking = BLOCKING;
#endif

	st_adc_read_config.t_change_priority = PRI_NO_CHANGE;
	st_adc_read_config.u32_delay = 0;
	st_adc_read_config.u32_max_count = 5;
	st_adc_read_config.u32_reg_address = by_reg_address;
	st_adc_read_config.u32_length = 1;
#if ADC_OPTION ==ADC_9883
	return st_adc_driver.Read(byp_data, &st_adc_read_config, &st_adc_driver);
#elif ADC2_OPTION ==ADC_9883
	return st_adc2_driver.Read(byp_data, &st_adc_read_config, &st_adc2_driver);
#endif
#endif
return OK;
}

BYTE byAd9883InitMsr(UWORD32 u32_port_id)
{
#if 0
	u32_ifm_msr_tmr[u32_port_id]=10;
	return OK;
#endif
return OK;
}

BYTE byAd9883GetInitMsrDone(UWORD32 u32_port_id, UWORD32 *u32p_init_done)
{
#if 0
	if(u32_ifm_msr_tmr[u32_port_id] == 0)
		*u32p_init_done = 1;
	else
		*u32p_init_done = 0;
	return OK;
#endif
return OK;
}

BYTE byAd9883StartMsr(UWORD32 u32_port_id)
{
#if 0
	u32_ifm_msr_tmr[u32_port_id] =10;
	return OK;
#endif
return OK;
}

BYTE byAd9883GetMsrDone(UWORD32 u32_port_id, UWORD32 *u32p_msr_done)
{
#if 0
	*u32p_msr_done = 1;
	return OK;
#endif
return OK;
}

BYTE byAd9883GetMsrRaw(UWORD32 u32_port_id, st_RAW_MSR *stp_raw_msr )
{
#if 0
	BYTE by_data;

	byReadSingleDataAd9883(AD9883_SYNC_DETECT, &by_data);
	if((by_data & AD9883_S_DET_VS_DET) && (by_data & AD9883_S_DET_HS_DET))
	{
		stp_raw_msr->u32_inp_setup |= VALID_DSS;
		stp_raw_msr->u32_inp_setup &=  (~VALID_DCS);
		stp_raw_msr->u32_inp_setup &=  (~VALID_ACS);
	}
	else if(!(by_data & AD9883_S_DET_VS_DET) && (by_data & AD9883_S_DET_HS_DET))
	{
		stp_raw_msr->u32_inp_setup |= VALID_DCS;
		stp_raw_msr->u32_inp_setup &=  (~VALID_DSS);
		stp_raw_msr->u32_inp_setup &=  (~VALID_ACS);
	}
	else if(by_data & AD9883_S_DET_SOG_DET)
	{
		stp_raw_msr->u32_inp_setup |= VALID_ACS;
		stp_raw_msr->u32_inp_setup &=  (~VALID_DSS);
		stp_raw_msr->u32_inp_setup &=  (~VALID_DCS);
	}
	else
	{
		stp_raw_msr->u32_inp_setup &=  (~VALID_ACS);
		stp_raw_msr->u32_inp_setup &=  (~VALID_DSS);
		stp_raw_msr->u32_inp_setup &=  (~VALID_DCS);
	}

	stp_raw_msr->u32_valid_var |= (VALID_DSS | VALID_DCS | VALID_ACS);
	return OK;
#endif
return OK;	
}

BYTE byAd9883SetClampMidScale(UWORD32 u32_port_id, BYTE by_RGB_YUV)
{
#if 0
	BYTE by_ret, by_data;

	byReadSingleDataAd9883(AD9883_SOG_THRESHOLD, &by_data);
	by_data &= 0xF8;
 	if(by_RGB_YUV == AD9883_INP_MIDSCALE_YUV)
 	{
 		by_data = by_data |BIT0 |BIT2;//Setup Clamp to MidScale for RED and BLUE channels
		by_ret |=byWriteSingleDataAd9883(AD9883_RED_GAIN, 0x5e);// Configure as per Gary's liking
		by_ret |=byWriteSingleDataAd9883(AD9883_BLUE_GAIN, 0x5a);
		by_ret |=byWriteSingleDataAd9883(AD9883_GREEN_GAIN, 0x6a);
		by_ret |=byWriteSingleDataAd9883(AD9883_RED_OFFSET, 0x6a);
		by_ret |=byWriteSingleDataAd9883(AD9883_BLUE_OFFSET, 0x78);
		by_ret |=byWriteSingleDataAd9883(AD9883_GREEN_OFFSET, 0x68);
	}
	else
	{
		by_ret |=byWriteSingleDataAd9883(AD9883_RED_GAIN, 0x80);
		by_ret |=byWriteSingleDataAd9883(AD9883_BLUE_GAIN, 0x80);
		by_ret |=byWriteSingleDataAd9883(AD9883_GREEN_GAIN, 0x80);
		by_ret |=byWriteSingleDataAd9883(AD9883_RED_OFFSET, 0x80);
		by_ret |=byWriteSingleDataAd9883(AD9883_BLUE_OFFSET, 0x80);
		by_ret |=byWriteSingleDataAd9883(AD9883_GREEN_OFFSET, 0x80);
	}
	by_ret |=byWriteSingleDataAd9883(AD9883_SOG_THRESHOLD, by_data);  // PLL VCO and Pump Current
	return by_ret;;
#endif
return OK;
}

BYTE byAd9883SetMode(UWORD32 u32_port_id, VP byptable)
{
#if 0
	BYTE by_ret;
	BYTE *byp_table;

	byp_table = byptable;

	by_ret |=byWriteSingleDataAd9883(AD9883_VCO_CPMP, byp_table[0]);
	by_ret |=byWriteSingleDataAd9883(AD9883_CLAMP_REPLACEMENT, byp_table[1]);
	by_ret |=byWriteSingleDataAd9883(AD9883_CLAMP_DURATION, byp_table[2]);
	by_ret |=byWriteSingleDataAd9883(AD9883_SYNC_SEPARATOR, byp_table[3]);
	by_ret |=byWriteSingleDataAd9883(AD9883_PLL_CLAMP_CONTROL, byp_table[4]);

	by_ret |=byWriteSingleDataAd9883(AD9883_PRE_COAST, 0x10);   // To correct SOG Field signal from HDTV FPGA
	by_ret |=byWriteSingleDataAd9883(AD9883_OUTPUT_FORMAT, 0xFE);  // PLL VCO and Pump Current

	return by_ret;
#endif
return OK;
}

BYTE byAd9883SetInpSetup(UWORD32 u32_port_id)
{
#if 0
	UWORD32 u32_setup;
	BYTE by_sync_dtct;
	BYTE by_sync_ctrl = 0x16;
	BYTE u32_data=0;
	byReadSingleDataAd9883(AD9883_SYNC_DETECT, &by_sync_dtct); /* reading H sync polarity */
	if(!(by_sync_dtct & AD9883_S_DET_HS_POL)) /* if HS active low */
		by_sync_ctrl |= BIT5; /* set HS out polarity as HS in polarity */
	
	PortGetInpSetup(u32_port_id, &u32_setup);
	if(u32_setup & VALID_ACS)
		by_sync_ctrl |= BIT3; /* */
	if(u32_setup & (VALID_ACS | VALID_DCS))
		by_sync_ctrl |= BIT0; /* */
 	u32_data = byWriteSingleDataAd9883(AD9883_SYNC_CONTROL, by_sync_ctrl);  // PLL divider LSB
#endif
	return OK;

}
BYTE byAd9883SetRedOffset (UWORD32 u32_port_id, UWORD32 u32_value)
{
#if 0
	BYTE by_ret=0;
	by_ret |= byWriteSingleDataAd9883(AD9883_RED_OFFSET, (BYTE)(u32_value));
	return by_ret;
#endif
return OK;
}

BYTE byAd9883SetBlueOffset (UWORD32 u32_port_id, UWORD32 u32_value)
{
#if 0
	BYTE by_ret=0;
	by_ret |= byWriteSingleDataAd9883(AD9883_BLUE_OFFSET, (BYTE)(u32_value));
	return by_ret;
#endif
return OK;
}

BYTE byAd9883SetGreenOffset (UWORD32 u32_port_id, UWORD32 u32_value)
{
#if 0
	BYTE by_ret=0;
	by_ret |= byWriteSingleDataAd9883(AD9883_GREEN_OFFSET, (BYTE)(u32_value));
	return by_ret;
#endif
return OK;
}

BYTE byAd9883SetRedGain (UWORD32 u32_port_id, UWORD32 u32_value)
{
#if 0
	BYTE by_ret=0;
	by_ret |= byWriteSingleDataAd9883(AD9883_RED_GAIN, (BYTE)(u32_value));
	return by_ret;
#endif
return OK;
}

BYTE byAd9883SetBlueGain (UWORD32 u32_port_id, UWORD32 u32_value)
{
#if 0
	BYTE by_ret=0;
	by_ret |= byWriteSingleDataAd9883(AD9883_BLUE_GAIN, (BYTE)(u32_value));
	return by_ret;
#endif
return OK;
}

BYTE byAd9883SetGreenGain (UWORD32 u32_port_id, UWORD32 u32_value)
{
#if 0
	BYTE by_ret=0;
	by_ret |= byWriteSingleDataAd9883(AD9883_GREEN_GAIN, (BYTE)(u32_value));
	return by_ret;
#endif
return OK;
}

BYTE byAd9883SetBright (UWORD32 u32_port_id, UWORD32 u32_value)
{
#if 0
	BYTE by_ret=0;
	WORD w_data;
	w_data = AD9883_BRIGHT_MAX - u32_value;
	w_data <<=1;
	by_ret |= byAd9883SetRedOffset(u32_port_id, (w_data));