📄 net_nic.c
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/*
*********************************************************************************************************
* uC/TCP-IP
* The Embedded TCP/IP Suite
*
* (c) Copyright 2003-2006; Micrium, Inc.; Weston, FL
*
* All rights reserved. Protected by international copyright laws.
*
* uC/TCP-IP is provided in source form for FREE evaluation, for educational
* use or peaceful research. If you plan on using uC/TCP-IP in a commercial
* product you need to contact Micrium to properly license its use in your
* product. We provide ALL the source code for your convenience and to help
* you experience uC/TCP-IP. The fact that the source code is provided does
* NOT mean that you can use it without paying a licensing fee.
*
* Network Interface Card (NIC) port files provided, as is, for FREE and do
* NOT require any additional licensing or licensing fee.
*
* Knowledge of the source code may NOT be used to develop a similar product.
*
* Please help us continue to provide the Embedded community with the finest
* software available. Your honesty is greatly appreciated.
*********************************************************************************************************
*/
/*
*********************************************************************************************************
*
* NETWORK INTERFACE CARD
*
* AT91SAM7X256 EMAC
*
* Filename : net_nic.c
* Version : V1.87
* Programmer(s) : EHS
*********************************************************************************************************
* Note(s) : (1) Supports EMAC section of Atmel's AT91SAM7X256 microcontroller as described in
*
* Atmel Corporation (ATMEL; http://www.atmel.com).
*
* (2) REQUIREs Ethernet Network Interface Layer located in the following network directory :
*
* \<Network Protocol Suite>\IF\Ether\
*
* where
* <Network Protocol Suite> directory path for network protocol suite.
*
* (3) Since the AT91SAM7X256 EMAC (NIC) module is integrated into the AT91SAM7X256
* microcontroller, the endianness of the registers is the same as the CPU, which is
* little endian by default.
*********************************************************************************************************
* TO DO(s) : (1) Add support for jumbo frames.
*********************************************************************************************************
*/
/*
*********************************************************************************************************
* INCLUDE FILES
*********************************************************************************************************
*/
#define NET_NIC_MODULE
#include <ioat91sam7x256.h>
#include <net.h>
#include <bsp.h>
/*
*********************************************************************************************************
* DEFINES
*********************************************************************************************************
*/
#define EMAC_MAN_WRITE (0x01 << 28) /* 01: Transfer is a write. */
#define EMAC_MAN_READ (0x02 << 28) /* 10: Transfer is a read. */
#define EMAC_MAN_CODE (0x02 << 16) /* IEEE Code. MUST have value of 10. */
#define EMAC_RXBUF_ADDRESS_MASK (0xFFFFFFFC) /* Addr of Rx Descriptor Buf's (wrap/ownership ignored */
#define EMAC_RXBUF_ADD_WRAP (0x01 << 1) /* This is the last buffer in the ring. */
#define EMAC_RXBUF_SW_OWNED (0x01 << 0) /* Software owns the buffer. */
#define EMAC_RXBUF_LEN_MASK (0x00000FFF) /* Length of frame including FCS. (12 bits) */
#define EMAC_RXBUF_SOF_MASK (0x01 << 14) /* Start of frame mask */
#define EMAC_RXBUF_EOF_MASK (0x01 << 15) /* End of frame mask */
#define EMAC_RXBUF_OFF_MASK (0x03 << 12) /* Data offset mask (up to three bytes possible) */
#define EMAC_TXBUF_ADD_WRAP (0x01 << 30) /* This is the last buffer in the ring. */
#define EMAC_TXBUF_TX_SIZE_MASK (0x000007FF) /* Length of frame including FCS. (11 bits) */
#define EMAC_TXBUF_ADD_LAST (0x01 << 15) /* This is the last buffer for the current frame */
#define EMAC_TXBUF_STATUS_USED (CPU_INT32U)(0x01 << 31) /* Status Used Bit. Indicates when a buf has been read */
/*
*********************************************************************************************************
* MACROS
*********************************************************************************************************
*/
#define EMAC_MAN_REGA(_x_) (_x_ << 18) /* Specifies the register in the PHY to access. */
#define EMAC_MAN_PHYA(_x_) ((_x_ & 0x1F) << 23) /* PHY address. Normally 0. */
#define EMAC_MAN_DATA(_x_) (_x_ & 0xFFFF) /* PHY Read/Write Data Mask. */
/*
*********************************************************************************************************
* DATA TYPES
*********************************************************************************************************
*/
typedef struct {
CPU_INT32U addr; /* Address of RX buffer. */
CPU_INT32U status; /* Status of RX buffer. */
} NIC_BUF_DESC; /* See 'AT91SAM7X256 EMAC RX & TX BUFFER DESCRIPTORS' */
/*
*********************************************************************************************************
* GLOBALS
*********************************************************************************************************
*/
NIC_BUF_DESC *NIC_RxBufDescPtrStart; /* Pointer to the aligned list of Rx buffer descriptors */
NIC_BUF_DESC *NIC_RxBufDescPtrEnd; /* Pointer to the END of the Rx descriptor list */
NIC_BUF_DESC *NIC_TxBufDescPtr; /* Pointer to the only Tx buffer descriptor (aligned) */
NIC_BUF_DESC *NIC_CurrentFrameStart; /* Pointer to the 1st descriptor for the current frame */
NIC_BUF_DESC *NIC_CurrentFrameEnd; /* Pointer to the last descriptor for the current frame */
NIC_BUF_DESC *NIC_ExpectedFrameStart; /* Pointer to the next expected SOF descriptor */
/* This is used to improve search / detection of frames */
/* that need to be read from the descriptor buffers */
CPU_INT16U NIC_RxNRdyCtr; /* Track # of frames are need to be read from memory */
/* MUST be aligned on a 32 byte boundaries */
CPU_INT08U NIC_RxBuf[NIC_RX_BUF_SIZE * NIC_RX_N_BUFS + 32]; /* RxBuffers & descriptors, Tx descriptors declarations */
CPU_INT08U NIC_RxBufDesc[sizeof(NIC_BUF_DESC) * NIC_RX_N_BUFS + 32];
CPU_INT08U NIC_TxBufDesc[sizeof(NIC_BUF_DESC) * 1 + 32];
/*
*********************************************************************************************************
* LOCAL FUNCTION PROTOTYPES
*********************************************************************************************************
*/
static void NetNIC_RxISR_Handler (void); /* ISR for RX interrupts. */
static void NetNIC_TxISR_Handler (void); /* ISR for TX interrupts. */
static void NetNIC_TxPktDiscard (NET_ERR *perr);
static CPU_INT16U NIC_GetNRdy (void);
/* -------- AT91SAM7X256 EMAC FNCTS ------------------ */
static void EMAC_Init (NET_ERR *perr);
/* -------- AT91SAM7X256 EMAC RX FNCTS --------------- */
static void EMAC_RxBufInit (void);
static void EMAC_RxEn (void);
static void EMAC_RxDis (void);
static void EMAC_RxIntEn (void);
static void EMAC_RxPktDiscard (CPU_INT16U size);
static void EMAC_RxPkt (void *ppkt,
CPU_INT16U size,
NET_ERR *perr);
/* -------- AT91SAM7X256 EMAC TX FNCTS --------------- */
static void EMAC_TxBufInit (void);
static void EMAC_TxEn (void);
static void EMAC_TxDis (void);
static void EMAC_TxIntEn (void);
static void EMAC_TxPkt (void *ppkt,
CPU_INT16U size,
NET_ERR *perr);
static void EMAC_TxPktPrepare (void *ppkt,
CPU_INT16U size,
NET_ERR *perr);
/*
*********************************************************************************************************
* NetNIC_Init()
*
* Description : (1) Initialize Network Interface Card :
* (a) Perform NIC Layer OS initialization
* (b) Initialize NIC status
* (c) Initialize NIC statistics & error counters
* (d) Initialize AT91SAM7X256
*
* Argument(s) : none.
*
* Return(s) : none.
*
* Caller(s) : Net_Init().
*********************************************************************************************************
*/
void NetNIC_Init (NET_ERR *perr)
{
/* --------------- PERFORM NIC/OS INIT --------------- */
NetOS_NIC_Init(perr); /* Create NIC objs. */
if (*perr != NET_OS_ERR_NONE) {
return;
}
/* ----------------- INIT NIC STATUS ----------------- */
NetNIC_ConnStatus = DEF_OFF;
/* ------------- INIT NIC STAT & ERR CTRS ------------ */
#if (NET_CTR_CFG_STAT_EN == DEF_ENABLED)
NetNIC_StatRxPktCtr = 0;
NetNIC_StatTxPktCtr = 0;
#endif
#if (NET_CTR_CFG_ERR_EN == DEF_ENABLED)
NetNIC_ErrRxPktDiscardedCtr = 0;
NetNIC_ErrTxPktDiscardedCtr = 0;
#endif
/* ----------------- INIT AT91SAM7X256 EMAC----------- */
EMAC_Init(perr);
}
/*
*********************************************************************************************************
* EMAC_Init()
*
* Description : (1) Initialize & start AT91SAM7X256 :
*
* (a) Initialize Interrupts.
* (b) Initialize Registers.
* (c) Initialize MAC Address.
* (d) Initialize RX Buffer descriptors.
* (e) Initialize Auto Negotiation.
* (f) Enable Receiver/Transmitter.
* (g) Initialize External Interrupt Controller. See Note #4.
*
*
* Argument(s) : none.
*
* Return(s) : none.
*
* Caller(s) : NetNIC_Init().
*
* Note(s) : (2) See this 'net_nic.c AT91SAM7X256 REGISTER BITS' for register bit summary.
*
* (3) (a) Assumes MAC address to set has previously been initialized by
*
* (1) AT91SAM7X256's EEPROM for AT91SAM7X256_EMAC_MAC_ADDR_SEL_EEPROM
* (2) Application code for AT91SAM7X256_EMAC_MAC_ADDR_SEL_CFG
*
* (b) AT91SAM7X256 NIC module allow configuration of six MAC addresses that will be
* used to accept or reject an ethernet packet. This driver uses one of these.
*
* (4) Interrupts MUST be enabled ONLY after ALL network initialization is complete (see also
* 'net.c Net_Init() Note #4c').
*
*********************************************************************************************************
*/
static void EMAC_Init (NET_ERR *perr)
{
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