tcd1208_driver.tal

汽车四轮定位CCD驱动CPLD源代码

Design Name = tcd1208_driver.tt4
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~


*******************
* TIMING ANALYSIS *
*******************

Timing Analysis KEY:
One unit of delay time is equivalent to one pass 
     through the Central Switch Matrix.
..   Delay ( in this column ) not applicable to the indicated signal.
TSU, Set-Up Time ( 0 for input-paired signals ),
     represents the number of switch matrix passes between
     an input pin and a register setup before clock.
     TSU is reported on the register.
TCO, Clocked Output-to-Pin Time ( 0 for output-paired signals ),
     represents the number of switch matrix passes between
     a clocked register and an output pin.
     TCO is reported on the register.
TPD, Propagation Delay Time ( calculated only for combinatorial eqns.),
     represents the number of switch matrix passes between
     an input pin and an output pin.
     TPD is reported on the output pin.
TCR, Clocked Output-to-Register Time,
     represents the number of switch matrix passes between
     a clocked register and the register it drives ( before clock ).
     TCR is reported on the driving register.

                    TSU       TCO       TPD       TCR
                  #passes   #passes   #passes   #passes
SIGNAL NAME       min  max  min  max  min  max  min  max
           data1   1    1    0    0   ..   ..    1    1   
        RN_data1   1    1    0    0   ..   ..    1    1   
           data2   1    1    0    0   ..   ..    1    1   
        RN_data2   1    1    0    0   ..   ..    1    1   
              SH  ..   ..    0    0   ..   ..    1    1   
           RN_SH  ..   ..    0    0   ..   ..    1    1   
    C0_GoutDFFRH  ..   ..    1    1   ..   ..   ..   ..   
     P0_countc_1  ..   ..   ..   ..   ..   ..    1    1   
     P0_countc_0  ..   ..   ..   ..   ..   ..    1    1   
      O0_GoutDFF   1    1   ..   ..   ..   ..    1    1   
     H0_countc_1  ..   ..   ..   ..   ..   ..    1    1   
     H0_countc_2  ..   ..   ..   ..   ..   ..    1    1   
     H0_countc_4  ..   ..   ..   ..   ..   ..    1    1   
     H0_countc_6  ..   ..   ..   ..   ..   ..    1    1   
     H0_countc_7  ..   ..   ..   ..   ..   ..    1    1   
     H0_countc_8  ..   ..   ..   ..   ..   ..    1    1   
     H0_countc_9  ..   ..   ..   ..   ..   ..    1    1   
    H0_countc_10  ..   ..   ..   ..   ..   ..    1    1   
    H0_countc_11  ..   ..   ..   ..   ..   ..    1    1   
     H0_countc_3  ..   ..   ..   ..   ..   ..    1    1   
     H0_countc_5  ..   ..   ..   ..   ..   ..    1    1   
   H0_jumpdown_0   1    1   ..   ..   ..   ..    1    1   
   H0_jumpdown_1   1    1   ..   ..   ..   ..    1    1   
   H0_jumpdown_2   1    1   ..   ..   ..   ..    1    1   
   H0_jumpdown_3   1    1   ..   ..   ..   ..    1    1   
   H0_jumpdown_4   1    1   ..   ..   ..   ..    1    1   
   H0_jumpdown_5   1    1   ..   ..   ..   ..    1    1   
   H0_jumpdown_6   1    1   ..   ..   ..   ..    1    1   
   H0_jumpdown_7   1    1   ..   ..   ..   ..    1    1   
   H0_jumpdown_8   1    1   ..   ..   ..   ..    1    1   
   H0_jumpdown_9   1    1   ..   ..   ..   ..    1    1   
  H0_jumpdown_10   1    1   ..   ..   ..   ..    1    1   
  H0_jumpdown_11   1    1   ..   ..   ..   ..    1    1   
     H0_jumpup_0  ..   ..   ..   ..   ..   ..    1    1   
     H0_jumpup_1  ..   ..   ..   ..   ..   ..    1    1   
     H0_jumpup_2  ..   ..   ..   ..   ..   ..    1    1   
     H0_jumpup_3  ..   ..   ..   ..   ..   ..    1    1   
     H0_jumpup_4  ..   ..   ..   ..   ..   ..    1    1   
     H0_jumpup_5  ..   ..   ..   ..   ..   ..    1    1   
     H0_jumpup_6  ..   ..   ..   ..   ..   ..    1    1   
     H0_jumpup_7  ..   ..   ..   ..   ..   ..    1    1   
     H0_jumpup_8  ..   ..   ..   ..   ..   ..    1    1   
     H0_jumpup_9  ..   ..   ..   ..   ..   ..    1    1   
    H0_jumpup_10  ..   ..   ..   ..   ..   ..    1    1   
    H0_jumpup_11  ..   ..   ..   ..   ..   ..    1    1   
     H0_countc_0  ..   ..   ..   ..   ..   ..    1    1   
H0_EfficiantDFFRH  ..   ..   ..   ..   ..   ..    1    1   
   H0_LatchDFFRH  ..   ..    1    1   ..   ..   ..   ..