nco.map.eqn

使用QUARTUS 2编译的DDS的源码

--Port A Input: Registered, Port A Output: Un-registered
Q1_q_a[5]_PORT_A_address = BUS(F1_phaseadd[0], F1_phaseadd[1], F1_phaseadd[2], F1_phaseadd[3], F1_phaseadd[4], F1_phaseadd[5]);
Q1_q_a[5]_PORT_A_address_reg = DFFE(Q1_q_a[5]_PORT_A_address, Q1_q_a[5]_clock_0, , , );
Q1_q_a[5]_clock_0 = SYSCLK;
Q1_q_a[5]_PORT_A_data_out = MEMORY(, , Q1_q_a[5]_PORT_A_address_reg, , , , , , Q1_q_a[5]_clock_0, , , , , );
Q1_q_a[5] = Q1_q_a[5]_PORT_A_data_out[0];


--Q1_q_a[6] is sinlup:U_sinlup|romtab:U_romtab|lpm_rom:LPM_ROM_component|altrom:srom|altsyncram:rom_block|altsyncram_86r:auto_generated|q_a[6]
--RAM Block Operation Mode: ROM
--Port A Depth: 64, Port A Width: 1
--Port A Logical Depth: 64, Port A Logical Width: 7
--Port A Input: Registered, Port A Output: Un-registered
Q1_q_a[6]_PORT_A_address = BUS(F1_phaseadd[0], F1_phaseadd[1], F1_phaseadd[2], F1_phaseadd[3], F1_phaseadd[4], F1_phaseadd[5]);
Q1_q_a[6]_PORT_A_address_reg = DFFE(Q1_q_a[6]_PORT_A_address, Q1_q_a[6]_clock_0, , , );
Q1_q_a[6]_clock_0 = SYSCLK;
Q1_q_a[6]_PORT_A_data_out = MEMORY(, , Q1_q_a[6]_PORT_A_address_reg, , , , , , Q1_q_a[6]_clock_0, , , , , );
Q1_q_a[6] = Q1_q_a[6]_PORT_A_data_out[0];


--B1_loadp3 is loadfw:U_loadfw|loadp3
--operation mode is normal

B1_loadp3_lut_out = B1_loadp2 & (!RESETN);
B1_loadp3 = DFFEAS(B1_loadp3_lut_out, SYSCLK, VCC, , , , , , );


--B1_pipefw4[4] is loadfw:U_loadfw|pipefw4[4]
--operation mode is normal

B1_pipefw4[4]_lut_out = FREQWORD[28] & (!RESETN);
B1_pipefw4[4] = DFFEAS(B1_pipefw4[4]_lut_out, SYSCLK, VCC, , B1L41, , , , );


--D1_pipe4[3] is phasea:U_phasea|pipe4[3]
--operation mode is arithmetic

D1_pipe4[3]_carry_eqn = D1L36;
D1_pipe4[3]_lut_out = D1_pipe4[3] $ B1_pipefw4[3] $ !D1_pipe4[3]_carry_eqn;
D1_pipe4[3] = DFFEAS(D1_pipe4[3]_lut_out, SYSCLK, VCC, , , , , RESETN, );

--D1L38 is phasea:U_phasea|pipe4[3]~111
--operation mode is arithmetic

D1L38 = CARRY(D1_pipe4[3] & (B1_pipefw4[3] # !D1L36) # !D1_pipe4[3] & B1_pipefw4[3] & !D1L36);


--C1_pwwrns is loadpw:U_loadpw|pwwrns
--operation mode is normal

C1_pwwrns_lut_out = RESETN # C1_pwwrnm;
C1_pwwrns = DFFEAS(C1_pwwrns_lut_out, SYSCLK, VCC, , , , , , );


--C1_pwwrnm is loadpw:U_loadpw|pwwrnm
--operation mode is normal

C1_pwwrnm_lut_out = RESETN # PWWRN;
C1_pwwrnm = DFFEAS(C1_pwwrnm_lut_out, SYSCLK, VCC, , , , , , );


--C1_phswd[4] is loadpw:U_loadpw|phswd[4]
--operation mode is normal

C1_phswd[4]_lut_out = PHASEWORD[4] & (!RESETN);
C1_phswd[4] = DFFEAS(C1_phswd[4]_lut_out, SYSCLK, VCC, , C1L10, , , , );


--E1_mphsreg[3] is phasemod:U_phasemod|mphsreg[3]
--operation mode is arithmetic

E1_mphsreg[3]_carry_eqn = E1L8;
E1_mphsreg[3]_lut_out = D1_pipe4[3] $ C1_phswd[3] $ E1_mphsreg[3]_carry_eqn;
E1_mphsreg[3] = DFFEAS(E1_mphsreg[3]_lut_out, SYSCLK, VCC, , , , , RESETN, );

--E1L10 is phasemod:U_phasemod|mphsreg[3]~105
--operation mode is arithmetic

E1L10 = CARRY(D1_pipe4[3] & !C1_phswd[3] & !E1L8 # !D1_pipe4[3] & (!E1L8 # !C1_phswd[3]));


--F1_phaseadd[0] is sinlup:U_sinlup|phaseadd[0]
--operation mode is normal

F1_phaseadd[0]_lut_out = E1_mphsreg[0] $ E1_mphsreg[6];
F1_phaseadd[0] = DFFEAS(F1_phaseadd[0]_lut_out, SYSCLK, VCC, , , , , RESETN, );


--F1_phaseadd[1] is sinlup:U_sinlup|phaseadd[1]
--operation mode is normal

F1_phaseadd[1]_lut_out = E1_mphsreg[1] $ E1_mphsreg[6];
F1_phaseadd[1] = DFFEAS(F1_phaseadd[1]_lut_out, SYSCLK, VCC, , , , , RESETN, );


--F1_phaseadd[2] is sinlup:U_sinlup|phaseadd[2]
--operation mode is normal

F1_phaseadd[2]_lut_out = E1_mphsreg[2] $ E1_mphsreg[6];
F1_phaseadd[2] = DFFEAS(F1_phaseadd[2]_lut_out, SYSCLK, VCC, , , , , RESETN, );


--F1_phaseadd[3] is sinlup:U_sinlup|phaseadd[3]
--operation mode is normal

F1_phaseadd[3]_lut_out = E1_mphsreg[3] $ E1_mphsreg[6];
F1_phaseadd[3] = DFFEAS(F1_phaseadd[3]_lut_out, SYSCLK, VCC, , , , , RESETN, );


--F1_phaseadd[4] is sinlup:U_sinlup|phaseadd[4]
--operation mode is normal

F1_phaseadd[4]_lut_out = E1_mphsreg[4] $ E1_mphsreg[6];
F1_phaseadd[4] = DFFEAS(F1_phaseadd[4]_lut_out, SYSCLK, VCC, , , , , RESETN, );


--F1_phaseadd[5] is sinlup:U_sinlup|phaseadd[5]
--operation mode is normal

F1_phaseadd[5]_lut_out = E1_mphsreg[5] $ E1_mphsreg[6];
F1_phaseadd[5] = DFFEAS(F1_phaseadd[5]_lut_out, SYSCLK, VCC, , , , , RESETN, );


--F1_modphase_msb1_ff is sinlup:U_sinlup|modphase_msb1_ff
--operation mode is normal

F1_modphase_msb1_ff_lut_out = E1_mphsreg[7] & (!RESETN);
F1_modphase_msb1_ff = DFFEAS(F1_modphase_msb1_ff_lut_out, SYSCLK, VCC, , , , , , );


--B1_loadp2 is loadfw:U_loadfw|loadp2
--operation mode is normal

B1_loadp2_lut_out = B1_loadp1 & (!RESETN);
B1_loadp2 = DFFEAS(B1_loadp2_lut_out, SYSCLK, VCC, , , , , , );


--B1_pipefw4[3] is loadfw:U_loadfw|pipefw4[3]
--operation mode is normal

B1_pipefw4[3]_lut_out = FREQWORD[27] & (!RESETN);
B1_pipefw4[3] = DFFEAS(B1_pipefw4[3]_lut_out, SYSCLK, VCC, , B1L41, , , , );


--D1_pipe4[2] is phasea:U_phasea|pipe4[2]
--operation mode is arithmetic

D1_pipe4[2]_carry_eqn = D1L34;
D1_pipe4[2]_lut_out = D1_pipe4[2] $ B1_pipefw4[2] $ D1_pipe4[2]_carry_eqn;
D1_pipe4[2] = DFFEAS(D1_pipe4[2]_lut_out, SYSCLK, VCC, , , , , RESETN, );

--D1L36 is phasea:U_phasea|pipe4[2]~115
--operation mode is arithmetic

D1L36 = CARRY(D1_pipe4[2] & !B1_pipefw4[2] & !D1L34 # !D1_pipe4[2] & (!D1L34 # !B1_pipefw4[2]));


--C1_phswd[3] is loadpw:U_loadpw|phswd[3]
--operation mode is normal

C1_phswd[3]_lut_out = PHASEWORD[3] & (!RESETN);
C1_phswd[3] = DFFEAS(C1_phswd[3]_lut_out, SYSCLK, VCC, , C1L10, , , , );


--E1_mphsreg[2] is phasemod:U_phasemod|mphsreg[2]
--operation mode is arithmetic

E1_mphsreg[2]_carry_eqn = E1L6;
E1_mphsreg[2]_lut_out = D1_pipe4[2] $ C1_phswd[2] $ !E1_mphsreg[2]_carry_eqn;
E1_mphsreg[2] = DFFEAS(E1_mphsreg[2]_lut_out, SYSCLK, VCC, , , , , RESETN, );

--E1L8 is phasemod:U_phasemod|mphsreg[2]~109
--operation mode is arithmetic

E1L8 = CARRY(D1_pipe4[2] & (C1_phswd[2] # !E1L6) # !D1_pipe4[2] & C1_phswd[2] & !E1L6);


--E1_mphsreg[0] is phasemod:U_phasemod|mphsreg[0]
--operation mode is arithmetic

E1_mphsreg[0]_lut_out = D1_pipe4[0] $ C1_phswd[0];
E1_mphsreg[0] = DFFEAS(E1_mphsreg[0]_lut_out, SYSCLK, VCC, , , , , RESETN, );

--E1L4 is phasemod:U_phasemod|mphsreg[0]~113
--operation mode is arithmetic

E1L4 = CARRY(D1_pipe4[0] & C1_phswd[0]);


--E1_mphsreg[1] is phasemod:U_phasemod|mphsreg[1]
--operation mode is arithmetic

E1_mphsreg[1]_carry_eqn = E1L4;
E1_mphsreg[1]_lut_out = D1_pipe4[1] $ C1_phswd[1] $ E1_mphsreg[1]_carry_eqn;
E1_mphsreg[1] = DFFEAS(E1_mphsreg[1]_lut_out, SYSCLK, VCC, , , , , RESETN, );

--E1L6 is phasemod:U_phasemod|mphsreg[1]~117
--operation mode is arithmetic

E1L6 = CARRY(D1_pipe4[1] & !C1_phswd[1] & !E1L4 # !D1_pipe4[1] & (!E1L4 # !C1_phswd[1]));


--B1_loadp1 is loadfw:U_loadfw|loadp1
--operation mode is normal

B1_loadp1_lut_out = !B1_fwwrns & B1_fwwrnm;
B1_loadp1 = DFFEAS(B1_loadp1_lut_out, SYSCLK, VCC, , , , , RESETN, );


--B1_pipefw4[2] is loadfw:U_loadfw|pipefw4[2]
--operation mode is normal

B1_pipefw4[2]_lut_out = FREQWORD[26] & (!RESETN);
B1_pipefw4[2] = DFFEAS(B1_pipefw4[2]_lut_out, SYSCLK, VCC, , B1L41, , , , );


--D1_pipe4[1] is phasea:U_phasea|pipe4[1]
--operation mode is arithmetic

D1_pipe4[1]_carry_eqn = D1L31;
D1_pipe4[1]_lut_out = D1_pipe4[1] $ B1_pipefw4[1] $ !D1_pipe4[1]_carry_eqn;
D1_pipe4[1] = DFFEAS(D1_pipe4[1]_lut_out, SYSCLK, VCC, , , , , RESETN, );

--D1L34 is phasea:U_phasea|pipe4[1]~119
--operation mode is arithmetic

D1L34 = CARRY(D1_pipe4[1] & (B1_pipefw4[1] # !D1L31) # !D1_pipe4[1] & B1_pipefw4[1] & !D1L31);


--C1_phswd[2] is loadpw:U_loadpw|phswd[2]
--operation mode is normal

C1_phswd[2]_lut_out = PHASEWORD[2] & (!RESETN);
C1_phswd[2] = DFFEAS(C1_phswd[2]_lut_out, SYSCLK, VCC, , C1L10, , , , );


--D1_pipe4[0] is phasea:U_phasea|pipe4[0]
--operation mode is arithmetic

D1_pipe4[0]_carry_eqn = D1L32;
D1_pipe4[0]_lut_out = D1_pipe4[0] $ B1_pipefw4[0] $ D1_pipe4[0]_carry_eqn;
D1_pipe4[0] = DFFEAS(D1_pipe4[0]_lut_out, SYSCLK, VCC, , , , , RESETN, );

--D1L31 is phasea:U_phasea|pipe4[0]~123
--operation mode is arithmetic

D1L31 = CARRY(D1_pipe4[0] & !B1_pipefw4[0] & !D1L32 # !D1_pipe4[0] & (!D1L32 # !B1_pipefw4[0]));


--C1_phswd[0] is loadpw:U_loadpw|phswd[0]
--operation mode is normal

C1_phswd[0]_lut_out = PHASEWORD[0] & (!RESETN);
C1_phswd[0] = DFFEAS(C1_phswd[0]_lut_out, SYSCLK, VCC, , C1L10, , , , );


--C1_phswd[1] is loadpw:U_loadpw|phswd[1]
--operation mode is normal

C1_phswd[1]_lut_out = PHASEWORD[1] & (!RESETN);
C1_phswd[1] = DFFEAS(C1_phswd[1]_lut_out, SYSCLK, VCC, , C1L10, , , , );


--B1_fwwrns is loadfw:U_loadfw|fwwrns
--operation mode is normal

B1_fwwrns_lut_out = RESETN # B1_fwwrnm;
B1_fwwrns = DFFEAS(B1_fwwrns_lut_out, SYSCLK, VCC, , , , , , );


--B1_fwwrnm is loadfw:U_loadfw|fwwrnm
--operation mode is normal

B1_fwwrnm_lut_out = RESETN # FWWRN;
B1_fwwrnm = DFFEAS(B1_fwwrnm_lut_out, SYSCLK, VCC, , , , , , );


--B1_pipefw4[1] is loadfw:U_loadfw|pipefw4[1]
--operation mode is normal

B1_pipefw4[1]_lut_out = FREQWORD[25] & (!RESETN);
B1_pipefw4[1] = DFFEAS(B1_pipefw4[1]_lut_out, SYSCLK, VCC, , B1L41, , , , );


--B1_pipefw4[0] is loadfw:U_loadfw|pipefw4[0]
--operation mode is normal

B1_pipefw4[0]_lut_out = FREQWORD[24] & (!RESETN);
B1_pipefw4[0] = DFFEAS(B1_pipefw4[0]_lut_out, SYSCLK, VCC, , B1L41, , , , );


--D1L32 is phasea:U_phasea|pipe4[0]~128
--operation mode is arithmetic

D1L32 = CARRY(D1_pipec3);


--D1_pipec3 is phasea:U_phasea|pipec3
--operation mode is normal

D1_pipec3_lut_out = D1_pipe3[7] & B1_pipefw3[7] & (!K8L1) # !D1_pipe3[7] & !B1_pipefw3[7] & (K8L1);
D1_pipec3 = DFFEAS(D1_pipec3_lut_out, SYSCLK, VCC, , , , , RESETN, );


--D1_pipe3[7] is phasea:U_phasea|pipe3[7]
--operation mode is normal

D1_pipe3[7]_lut_out = H3L1 & (!RESETN);
D1_pipe3[7] = DFFEAS(D1_pipe3[7]_lut_out, SYSCLK, VCC, , , , , , );


--B1_pipefw3[7] is loadfw:U_loadfw|pipefw3[7]
--operation mode is normal

B1_pipefw3[7]_lut_out = FREQWORD[23] & (!RESETN);
B1_pipefw3[7] = DFFEAS(B1_pipefw3[7]_lut_out, SYSCLK, VCC, , B1L34, , , , );


--K8L1 is phasea:U_phasea|lpm_add_sub:lpm_add_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~192
--operation mode is normal

K8L1_carry_eqn = K8L3;
K8L1 = !K8L1_carry_eqn;


--B1L34 is loadfw:U_loadfw|pipefw3[5]~139
--operation mode is normal

B1L34 = RESETN # B1_loadp3;


--K8L2 is phasea:U_phasea|lpm_add_sub:lpm_add_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~197
--operation mode is arithmetic

K8L2_carry_eqn = K8L5;
K8L2 = D1_pipe3[6] $ B1_pipefw3[6] $ K8L2_carry_eqn;

--K8L3 is phasea:U_phasea|lpm_add_sub:lpm_add_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~199
--operation mode is arithmetic

K8L3 = CARRY(D1_pipe3[6] & !B1_pipefw3[6] & !K8L5 # !D1_pipe3[6] & (!K8L5 # !B1_pipefw3[6]));


--H3L1 is phasea:U_phasea|lpm_add_sub:lpm_add_3|addcore:adder|unreg_res_node[7]~32
--operation mode is normal

H3L1 = D1_pipe3[7] $ H3L2;


--D1_pipe3[6] is phasea:U_phasea|pipe3[6]
--operation mode is normal

D1_pipe3[6]_lut_out = K8L2 & (!RESETN);
D1_pipe3[6] = DFFEAS(D1_pipe3[6]_lut_out, SYSCLK, VCC, , , , , , );


--B1_pipefw3[6] is loadfw:U_loadfw|pipefw3[6]
--operation mode is normal

B1_pipefw3[6]_lut_out = FREQWORD[22] & (!RESETN);
B1_pipefw3[6] = DFFEAS(B1_pipefw3[6]_lut_out, SYSCLK, VCC, , B1L34, , , , );


--K8L4 is phasea:U_phasea|lpm_add_sub:lpm_add_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~202
--operation mode is arithmetic

K8L4_carry_eqn = K8L7;
K8L4 = D1_pipe3[5] $ B1_pipefw3[5] $ !K8L4_carry_eqn;

--K8L5 is phasea:U_phasea|lpm_add_sub:lpm_add_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~204
--operation mode is arithmetic

K8L5 = CARRY(D1_pipe3[5] & (B1_pipefw3[5] # !K8L7) # !D1_pipe3[5] & B1_pipefw3[5] & !K8L7);


--H3L2 is phasea:U_phasea|lpm_add_sub:lpm_add_3|addcore:adder|unreg_res_node[7]~33
--operation mode is normal

H3L2 = K8L1 $ B1_pipefw3[7];


--D1_pipe3[5] is phasea:U_phasea|pipe3[5]
--operation mode is normal

D1_pipe3[5]_lut_out = K8L4 & (!RESETN);
D1_pipe3[5] = DFFEAS(D1_pipe3[5]_lut_out, SYSCLK, VCC, , , , , , );


--B1_pipefw3[5] is loadfw:U_loadfw|pipefw3[5]
--operation mode is normal

B1_pipefw3[5]_lut_out = FREQWORD[21] & (!RESETN);
B1_pipefw3[5] = DFFEAS(B1_pipefw3[5]_lut_out, SYSCLK, VCC, , B1L34, , , , );


--K8L6 is phasea:U_phasea|lpm_add_sub:lpm_add_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~207
--operation mode is arithmetic

K8L6_carry_eqn = K8L9;
K8L6 = D1_pipe3[4] $ B1_pipefw3[4] $ K8L6_carry_eqn;

--K8L7 is phasea:U_phasea|lpm_add_sub:lpm_add_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~209
--operation mode is arithmetic

K8L7 = CARRY(D1_pipe3[4] & !B1_pipefw3[4] & !K8L9 # !D1_pipe3[4] & (!K8L9 # !B1_pipefw3[4]));


--D1_pipe3[4] is phasea:U_phasea|pipe3[4]
--operation mode is normal

D1_pipe3[4]_lut_out = K8L6 & (!RESETN);
D1_pipe3[4] = DFFEAS(D1_pipe3[4]_lut_out, SYSCLK, VCC, , , , , , );


--B1_pipefw3[4] is loadfw:U_loadfw|pipefw3[4]
--operation mode is normal

B1_pipefw3[4]_lut_out = FREQWORD[20] & (!RESETN);
B1_pipefw3[4] = DFFEAS(B1_pipefw3[4]_lut_out, SYSCLK, VCC, , B1L34, , , , );


--K8L8 is phasea:U_phasea|lpm_add_sub:lpm_add_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~212
--operation mode is arithmetic

K8L8_carry_eqn = K8L11;
K8L8 = D1_pipe3[3] $ B1_pipefw3[3] $ !K8L8_carry_eqn;

--K8L9 is phasea:U_phasea|lpm_add_sub:lpm_add_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~214
--operation mode is arithmetic

K8L9 = CARRY(D1_pipe3[3] & (B1_pipefw3[3] # !K8L11) # !D1_pipe3[3] & B1_pipefw3[3] & !K8L11);


--D1_pipe3[3] is phasea:U_phasea|pipe3[3]
--operation mode is normal

D1_pipe3[3]_lut_out = K8L8 & (!RESETN);
D1_pipe3[3] = DFFEAS(D1_pipe3[3]_lut_out, SYSCLK, VCC, , , , , , );


--B1_pipefw3[3] is loadfw:U_loadfw|pipefw3[3]
--operation mode is normal