nco.fit.eqn

使用QUARTUS 2编译的DDS的源码

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--D1_pipe4[6] is phasea:U_phasea|pipe4[6] at LC_X32_Y24_N7
--operation mode is arithmetic

D1_pipe4[6]_carry_eqn = (!D1L43 & D1L50) # (D1L43 & D1L51);
D1_pipe4[6]_lut_out = D1_pipe4[6] $ B1_pipefw4[6] $ D1_pipe4[6]_carry_eqn;
D1_pipe4[6] = DFFEAS(D1_pipe4[6]_lut_out, GLOBAL(SYSCLK), VCC, , , , , RESETN, );

--D1L53 is phasea:U_phasea|pipe4[6]~95 at LC_X32_Y24_N7
--operation mode is arithmetic

D1L53_cout_0 = D1_pipe4[6] & !B1_pipefw4[6] & !D1L50 # !D1_pipe4[6] & (!D1L50 # !B1_pipefw4[6]);
D1L53 = CARRY(D1L53_cout_0);

--D1L54 is phasea:U_phasea|pipe4[6]~95COUT1_139 at LC_X32_Y24_N7
--operation mode is arithmetic

D1L54_cout_1 = D1_pipe4[6] & !B1_pipefw4[6] & !D1L51 # !D1_pipe4[6] & (!D1L51 # !B1_pipefw4[6]);
D1L54 = CARRY(D1L54_cout_1);


--D1_pipe4[7] is phasea:U_phasea|pipe4[7] at LC_X32_Y24_N8
--operation mode is normal

D1_pipe4[7]_carry_eqn = (!D1L43 & D1L53) # (D1L43 & D1L54);
D1_pipe4[7]_lut_out = B1_pipefw4[7] $ (D1_pipe4[7]_carry_eqn $ !D1_pipe4[7]);
D1_pipe4[7] = DFFEAS(D1_pipe4[7]_lut_out, GLOBAL(SYSCLK), VCC, , , , , RESETN, );


--D1L1 is phasea:U_phasea|COS~0 at LC_X33_Y27_N2
--operation mode is normal

D1L1 = D1_pipe4[6] $ D1_pipe4[7];


--E1_mphsreg[6] is phasemod:U_phasemod|mphsreg[6] at LC_X31_Y24_N6
--operation mode is arithmetic

E1_mphsreg[6]_carry_eqn = (!E1L16 & E1L20) # (E1L16 & E1L21);
E1_mphsreg[6]_lut_out = C1_phswd[6] $ D1_pipe4[6] $ !E1_mphsreg[6]_carry_eqn;
E1_mphsreg[6] = DFFEAS(E1_mphsreg[6]_lut_out, GLOBAL(SYSCLK), VCC, , , , , RESETN, );

--E1L23 is phasemod:U_phasemod|mphsreg[6]~89 at LC_X31_Y24_N6
--operation mode is arithmetic

E1L23_cout_0 = C1_phswd[6] & (D1_pipe4[6] # !E1L20) # !C1_phswd[6] & D1_pipe4[6] & !E1L20;
E1L23 = CARRY(E1L23_cout_0);

--E1L24 is phasemod:U_phasemod|mphsreg[6]~89COUT1_125 at LC_X31_Y24_N6
--operation mode is arithmetic

E1L24_cout_1 = C1_phswd[6] & (D1_pipe4[6] # !E1L21) # !C1_phswd[6] & D1_pipe4[6] & !E1L21;
E1L24 = CARRY(E1L24_cout_1);


--E1_mphsreg[7] is phasemod:U_phasemod|mphsreg[7] at LC_X31_Y24_N7
--operation mode is normal

E1_mphsreg[7]_carry_eqn = (!E1L16 & E1L23) # (E1L16 & E1L24);
E1_mphsreg[7]_lut_out = D1_pipe4[7] $ E1_mphsreg[7]_carry_eqn $ C1_phswd[7];
E1_mphsreg[7] = DFFEAS(E1_mphsreg[7]_lut_out, GLOBAL(SYSCLK), VCC, , , , , RESETN, );


--E1L1 is phasemod:U_phasemod|MCOS~0 at LC_X31_Y22_N0
--operation mode is normal

E1L1 = E1_mphsreg[7] $ E1_mphsreg[6];


--F1_NCOOUT[0] is sinlup:U_sinlup|NCOOUT[0] at LC_X33_Y24_N2
--operation mode is normal

F1_NCOOUT[0]_lut_out = F1_qwavesin_ff[0];
F1_NCOOUT[0] = DFFEAS(F1_NCOOUT[0]_lut_out, GLOBAL(SYSCLK), VCC, , , , , RESETN, );


--F1_NCOOUT[1] is sinlup:U_sinlup|NCOOUT[1] at LC_X29_Y24_N4
--operation mode is normal

F1_NCOOUT[1]_lut_out = F1_modphase_msb3_ff & (F1L1) # !F1_modphase_msb3_ff & F1_qwavesin_ff[1];
F1_NCOOUT[1] = DFFEAS(F1_NCOOUT[1]_lut_out, GLOBAL(SYSCLK), VCC, , , , , RESETN, );


--F1_NCOOUT[2] is sinlup:U_sinlup|NCOOUT[2] at LC_X29_Y24_N5
--operation mode is normal

F1_NCOOUT[2]_lut_out = F1_modphase_msb3_ff & (F1L4) # !F1_modphase_msb3_ff & F1_qwavesin_ff[2];
F1_NCOOUT[2] = DFFEAS(F1_NCOOUT[2]_lut_out, GLOBAL(SYSCLK), VCC, , , , , RESETN, );


--F1_NCOOUT[3] is sinlup:U_sinlup|NCOOUT[3] at LC_X29_Y24_N9
--operation mode is normal

F1_NCOOUT[3]_lut_out = F1_modphase_msb3_ff & (F1L7) # !F1_modphase_msb3_ff & (F1_qwavesin_ff[3]);
F1_NCOOUT[3] = DFFEAS(F1_NCOOUT[3]_lut_out, GLOBAL(SYSCLK), VCC, , , , , RESETN, );


--F1_NCOOUT[4] is sinlup:U_sinlup|NCOOUT[4] at LC_X29_Y24_N6
--operation mode is normal

F1_NCOOUT[4]_lut_out = F1_modphase_msb3_ff & F1L11 # !F1_modphase_msb3_ff & (F1_qwavesin_ff[4]);
F1_NCOOUT[4] = DFFEAS(F1_NCOOUT[4]_lut_out, GLOBAL(SYSCLK), VCC, , , , , RESETN, );


--F1_NCOOUT[5] is sinlup:U_sinlup|NCOOUT[5] at LC_X31_Y24_N8
--operation mode is normal

F1_NCOOUT[5]_lut_out = F1_modphase_msb3_ff & F1L14 # !F1_modphase_msb3_ff & (F1_qwavesin_ff[5]);
F1_NCOOUT[5] = DFFEAS(F1_NCOOUT[5]_lut_out, GLOBAL(SYSCLK), VCC, , , , , RESETN, );


--F1_NCOOUT[6] is sinlup:U_sinlup|NCOOUT[6] at LC_X30_Y24_N8
--operation mode is normal

F1_NCOOUT[6]_lut_out = F1_modphase_msb3_ff & F1L17 # !F1_modphase_msb3_ff & (F1_qwavesin_ff[6]);
F1_NCOOUT[6] = DFFEAS(F1_NCOOUT[6]_lut_out, GLOBAL(SYSCLK), VCC, , , , , RESETN, );


--F1_NCOOUT[7] is sinlup:U_sinlup|NCOOUT[7] at LC_X29_Y24_N7
--operation mode is normal

F1_NCOOUT[7]_lut_out = !RESETN & (F1_modphase_msb3_ff);
F1_NCOOUT[7] = DFFEAS(F1_NCOOUT[7]_lut_out, GLOBAL(SYSCLK), VCC, , , , , , );


--B1_pipefw4[6] is loadfw:U_loadfw|pipefw4[6] at LC_X33_Y24_N9
--operation mode is normal

B1_pipefw4[6]_lut_out = !RESETN & (FREQWORD[30]);
B1_pipefw4[6] = DFFEAS(B1_pipefw4[6]_lut_out, GLOBAL(SYSCLK), VCC, , B1L41, , , , );


--D1_pipe4[5] is phasea:U_phasea|pipe4[5] at LC_X32_Y24_N6
--operation mode is arithmetic

D1_pipe4[5]_carry_eqn = (!D1L43 & D1L47) # (D1L43 & D1L48);
D1_pipe4[5]_lut_out = B1_pipefw4[5] $ D1_pipe4[5] $ !D1_pipe4[5]_carry_eqn;
D1_pipe4[5] = DFFEAS(D1_pipe4[5]_lut_out, GLOBAL(SYSCLK), VCC, , , , , RESETN, );

--D1L50 is phasea:U_phasea|pipe4[5]~103 at LC_X32_Y24_N6
--operation mode is arithmetic

D1L50_cout_0 = B1_pipefw4[5] & (D1_pipe4[5] # !D1L47) # !B1_pipefw4[5] & D1_pipe4[5] & !D1L47;
D1L50 = CARRY(D1L50_cout_0);

--D1L51 is phasea:U_phasea|pipe4[5]~103COUT1_138 at LC_X32_Y24_N6
--operation mode is arithmetic

D1L51_cout_1 = B1_pipefw4[5] & (D1_pipe4[5] # !D1L48) # !B1_pipefw4[5] & D1_pipe4[5] & !D1L48;
D1L51 = CARRY(D1L51_cout_1);


--B1_pipefw4[7] is loadfw:U_loadfw|pipefw4[7] at LC_X33_Y24_N3
--operation mode is normal

B1_pipefw4[7]_lut_out = FREQWORD[31] & !RESETN;
B1_pipefw4[7] = DFFEAS(B1_pipefw4[7]_lut_out, GLOBAL(SYSCLK), VCC, , B1L41, , , , );


--C1_phswd[6] is loadpw:U_loadpw|phswd[6] at LC_X32_Y22_N2
--operation mode is normal

C1_phswd[6]_lut_out = !RESETN & (PHASEWORD[6]);
C1_phswd[6] = DFFEAS(C1_phswd[6]_lut_out, GLOBAL(SYSCLK), VCC, , C1L10, , , , );


--E1_mphsreg[5] is phasemod:U_phasemod|mphsreg[5] at LC_X31_Y24_N5
--operation mode is arithmetic

E1_mphsreg[5]_carry_eqn = (!E1L16 & GND) # (E1L16 & VCC);
E1_mphsreg[5]_lut_out = C1_phswd[5] $ D1_pipe4[5] $ E1_mphsreg[5]_carry_eqn;
E1_mphsreg[5] = DFFEAS(E1_mphsreg[5]_lut_out, GLOBAL(SYSCLK), VCC, , , , , RESETN, );

--E1L20 is phasemod:U_phasemod|mphsreg[5]~97 at LC_X31_Y24_N5
--operation mode is arithmetic

E1L20_cout_0 = C1_phswd[5] & !D1_pipe4[5] & !E1L16 # !C1_phswd[5] & (!E1L16 # !D1_pipe4[5]);
E1L20 = CARRY(E1L20_cout_0);

--E1L21 is phasemod:U_phasemod|mphsreg[5]~97COUT1_124 at LC_X31_Y24_N5
--operation mode is arithmetic

E1L21_cout_1 = C1_phswd[5] & !D1_pipe4[5] & !E1L16 # !C1_phswd[5] & (!E1L16 # !D1_pipe4[5]);
E1L21 = CARRY(E1L21_cout_1);


--C1_phswd[7] is loadpw:U_loadpw|phswd[7] at LC_X32_Y22_N5
--operation mode is normal

C1_phswd[7]_lut_out = !RESETN & (PHASEWORD[7]);
C1_phswd[7] = DFFEAS(C1_phswd[7]_lut_out, GLOBAL(SYSCLK), VCC, , C1L10, , , , );


--F1_qwavesin_ff[0] is sinlup:U_sinlup|qwavesin_ff[0] at LC_X30_Y24_N9
--operation mode is normal

F1_qwavesin_ff[0]_lut_out = !RESETN & Q1_q_a[0];
F1_qwavesin_ff[0] = DFFEAS(F1_qwavesin_ff[0]_lut_out, GLOBAL(SYSCLK), VCC, , , , , , );


--F1_qwavesin_ff[1] is sinlup:U_sinlup|qwavesin_ff[1] at LC_X30_Y24_N0
--operation mode is normal

F1_qwavesin_ff[1]_lut_out = !RESETN & Q1_q_a[1];
F1_qwavesin_ff[1] = DFFEAS(F1_qwavesin_ff[1]_lut_out, GLOBAL(SYSCLK), VCC, , , , , , );


--F1L1 is sinlup:U_sinlup|add~106 at LC_X30_Y24_N2
--operation mode is arithmetic

F1L1 = F1_qwavesin_ff[1] $ !F1L19;

--F1L2 is sinlup:U_sinlup|add~108 at LC_X30_Y24_N2
--operation mode is arithmetic

F1L2_cout_0 = F1_qwavesin_ff[1] # !F1L19;
F1L2 = CARRY(F1L2_cout_0);

--F1L3 is sinlup:U_sinlup|add~108COUT1_143 at LC_X30_Y24_N2
--operation mode is arithmetic

F1L3_cout_1 = F1_qwavesin_ff[1] # !F1L20;
F1L3 = CARRY(F1L3_cout_1);


--F1_modphase_msb3_ff is sinlup:U_sinlup|modphase_msb3_ff at LC_X29_Y24_N3
--operation mode is normal

F1_modphase_msb3_ff_lut_out = F1_modphase_msb2_ff;
F1_modphase_msb3_ff = DFFEAS(F1_modphase_msb3_ff_lut_out, GLOBAL(SYSCLK), VCC, , !RESETN, , , , );


--F1_qwavesin_ff[2] is sinlup:U_sinlup|qwavesin_ff[2] at LC_X29_Y24_N1
--operation mode is normal

F1_qwavesin_ff[2]_lut_out = !RESETN & (Q1_q_a[2]);
F1_qwavesin_ff[2] = DFFEAS(F1_qwavesin_ff[2]_lut_out, GLOBAL(SYSCLK), VCC, , , , , , );


--F1L4 is sinlup:U_sinlup|add~111 at LC_X30_Y24_N3
--operation mode is arithmetic

F1L4 = F1_qwavesin_ff[2] $ (F1L2);

--F1L5 is sinlup:U_sinlup|add~113 at LC_X30_Y24_N3
--operation mode is arithmetic

F1L5_cout_0 = !F1_qwavesin_ff[2] & (!F1L2);
F1L5 = CARRY(F1L5_cout_0);

--F1L6 is sinlup:U_sinlup|add~113COUT1 at LC_X30_Y24_N3
--operation mode is arithmetic

F1L6_cout_1 = !F1_qwavesin_ff[2] & (!F1L3);
F1L6 = CARRY(F1L6_cout_1);


--F1_qwavesin_ff[3] is sinlup:U_sinlup|qwavesin_ff[3] at LC_X29_Y24_N2
--operation mode is normal

F1_qwavesin_ff[3]_lut_out = !RESETN & (Q1_q_a[3]);
F1_qwavesin_ff[3] = DFFEAS(F1_qwavesin_ff[3]_lut_out, GLOBAL(SYSCLK), VCC, , , , , , );


--F1L7 is sinlup:U_sinlup|add~116 at LC_X30_Y24_N4
--operation mode is arithmetic

F1L7 = F1_qwavesin_ff[3] $ !F1L5;

--F1L8 is sinlup:U_sinlup|add~118 at LC_X30_Y24_N4
--operation mode is arithmetic

F1L8 = F1L9;


--F1_qwavesin_ff[4] is sinlup:U_sinlup|qwavesin_ff[4] at LC_X32_Y24_N9
--operation mode is normal

F1_qwavesin_ff[4]_lut_out = !RESETN & (Q1_q_a[4]);
F1_qwavesin_ff[4] = DFFEAS(F1_qwavesin_ff[4]_lut_out, GLOBAL(SYSCLK), VCC, , , , , , );


--F1L11 is sinlup:U_sinlup|add~121 at LC_X30_Y24_N5
--operation mode is arithmetic

F1L11_carry_eqn = (!F1L8 & GND) # (F1L8 & VCC);
F1L11 = F1_qwavesin_ff[4] $ (F1L11_carry_eqn);

--F1L12 is sinlup:U_sinlup|add~123 at LC_X30_Y24_N5
--operation mode is arithmetic

F1L12_cout_0 = !F1_qwavesin_ff[4] & (!F1L8);
F1L12 = CARRY(F1L12_cout_0);

--F1L13 is sinlup:U_sinlup|add~123COUT1_144 at LC_X30_Y24_N5
--operation mode is arithmetic

F1L13_cout_1 = !F1_qwavesin_ff[4] & (!F1L8);
F1L13 = CARRY(F1L13_cout_1);


--F1_qwavesin_ff[5] is sinlup:U_sinlup|qwavesin_ff[5] at LC_X31_Y24_N9
--operation mode is normal

F1_qwavesin_ff[5]_lut_out = !RESETN & (Q1_q_a[5]);
F1_qwavesin_ff[5] = DFFEAS(F1_qwavesin_ff[5]_lut_out, GLOBAL(SYSCLK), VCC, , , , , , );


--F1L14 is sinlup:U_sinlup|add~126 at LC_X30_Y24_N6
--operation mode is arithmetic

F1L14_carry_eqn = (!F1L8 & F1L12) # (F1L8 & F1L13);
F1L14 = F1_qwavesin_ff[5] $ !F1L14_carry_eqn;

--F1L15 is sinlup:U_sinlup|add~128 at LC_X30_Y24_N6
--operation mode is arithmetic

F1L15_cout_0 = F1_qwavesin_ff[5] # !F1L12;
F1L15 = CARRY(F1L15_cout_0);

--F1L16 is sinlup:U_sinlup|add~128COUT1_145 at LC_X30_Y24_N6
--operation mode is arithmetic

F1L16_cout_1 = F1_qwavesin_ff[5] # !F1L13;
F1L16 = CARRY(F1L16_cout_1);


--F1_qwavesin_ff[6] is sinlup:U_sinlup|qwavesin_ff[6] at LC_X33_Y24_N5
--operation mode is normal

F1_qwavesin_ff[6]_lut_out = !RESETN & (Q1_q_a[6]);
F1_qwavesin_ff[6] = DFFEAS(F1_qwavesin_ff[6]_lut_out, GLOBAL(SYSCLK), VCC, , , , , , );


--F1L17 is sinlup:U_sinlup|add~131 at LC_X30_Y24_N7
--operation mode is normal

F1L17_carry_eqn = (!F1L8 & F1L15) # (F1L8 & F1L16);
F1L17 = F1L17_carry_eqn $ F1_qwavesin_ff[6];


--B1_loadp4 is loadfw:U_loadfw|loadp4 at LC_X33_Y24_N0
--operation mode is normal

B1_loadp4_lut_out = !RESETN & (B1_loadp3);
B1_loadp4 = DFFEAS(B1_loadp4_lut_out, GLOBAL(SYSCLK), VCC, , , , , , );


--B1L41 is loadfw:U_loadfw|pipefw4[2]~133 at LC_X33_Y24_N4
--operation mode is normal

B1L41 = RESETN # B1_loadp4;


--B1_pipefw4[5] is loadfw:U_loadfw|pipefw4[5] at LC_X33_Y24_N1
--operation mode is normal

B1_pipefw4[5]_lut_out = !RESETN & (FREQWORD[29]);
B1_pipefw4[5] = DFFEAS(B1_pipefw4[5]_lut_out, GLOBAL(SYSCLK), VCC, , B1L41, , , , );


--D1_pipe4[4] is phasea:U_phasea|pipe4[4] at LC_X32_Y24_N5
--operation mode is arithmetic

D1_pipe4[4]_carry_eqn = (!D1L43 & GND) # (D1L43 & VCC);
D1_pipe4[4]_lut_out = B1_pipefw4[4] $ D1_pipe4[4] $ D1_pipe4[4]_carry_eqn;
D1_pipe4[4] = DFFEAS(D1_pipe4[4]_lut_out, GLOBAL(SYSCLK), VCC, , , , , RESETN, );

--D1L47 is phasea:U_phasea|pipe4[4]~107 at LC_X32_Y24_N5
--operation mode is arithmetic

D1L47_cout_0 = B1_pipefw4[4] & !D1_pipe4[4] & !D1L43 # !B1_pipefw4[4] & (!D1L43 # !D1_pipe4[4]);
D1L47 = CARRY(D1L47_cout_0);

--D1L48 is phasea:U_phasea|pipe4[4]~107COUT1_137 at LC_X32_Y24_N5
--operation mode is arithmetic

D1L48_cout_1 = B1_pipefw4[4] & !D1_pipe4[4] & !D1L43 # !B1_pipefw4[4] & (!D1L43 # !D1_pipe4[4]);
D1L48 = CARRY(D1L48_cout_1);


--C1_load is loadpw:U_loadpw|load at LC_X32_Y22_N0
--operation mode is normal