hdpdeps.ref

it describe how to develop the field programmable gate array

V1 34
FL W:/marial/v5/labs/flow/./vhdl/pn_correlation_fsm.vhd 2002/01/30.11:30:26
EN work/PN_CORRELATION_FSM \
      FL W:/marial/v5/labs/flow/./vhdl/pn_correlation_fsm.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED \
      PB work/CH_FIFO_PACK
AR work/PN_CORRELATION_FSM/RTL \
      FL W:/marial/v5/labs/flow/./vhdl/pn_correlation_fsm.vhd \
      EN work/PN_CORRELATION_FSM
FL W:/marial/v5/labs/flow/./vhdl/ch_fifo.vhd 2002/07/11.11:27:48
EN work/CH_FIFO         FL W:/marial/v5/labs/flow/./vhdl/ch_fifo.vhd \
      PB ieee/STD_LOGIC_1164
AR work/CH_FIFO/STRUCTURE FL W:/marial/v5/labs/flow/./vhdl/ch_fifo.vhd \
      EN work/CH_FIFO   CP MYDCM          CP PN_CORRELATOR  CP FIFO_STATUS \
      CP FIFO_2048X8
FL W:/marial/v5/labs/flow/MyDCM.vhd 2002/07/11.11:20:29
EN work/MYDCM           FL W:/marial/v5/labs/flow/MyDCM.vhd \
      PB ieee/STD_LOGIC_1164 PH ieee/NUMERIC_STD
AR work/MYDCM/STRUCT    FL W:/marial/v5/labs/flow/MyDCM.vhd EN work/MYDCM CP DCM \
      CP IBUFG          CP BUFG
FL W:/marial/v5/labs/flow/./vhdl/fifo_2048x8.vhd 2001/08/22.15:33:38
EN work/FIFO_2048X8     FL W:/marial/v5/labs/flow/./vhdl/fifo_2048x8.vhd \
      PB ieee/STD_LOGIC_1164
AR work/FIFO_2048X8/STRUCTURE FL W:/marial/v5/labs/flow/./vhdl/fifo_2048x8.vhd \
      EN work/FIFO_2048X8 CP RAMB16_S9_S9
FL W:/marial/v5/labs/flow/./vhdl/fifo_status.vhd 2001/06/20.14:06:26
EN work/FIFO_STATUS     FL W:/marial/v5/labs/flow/./vhdl/fifo_status.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/FIFO_STATUS/RTL FL W:/marial/v5/labs/flow/./vhdl/fifo_status.vhd \
      EN work/FIFO_STATUS
FL W:/marial/v5/labs/flow/./vhdl/pn_correlation.vhd 2002/01/30.11:30:10
EN work/PN_CORRELATION  FL W:/marial/v5/labs/flow/./vhdl/pn_correlation.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED \
      PB work/CH_FIFO_PACK
AR work/PN_CORRELATION/RTL FL W:/marial/v5/labs/flow/./vhdl/pn_correlation.vhd \
      EN work/PN_CORRELATION
FL W:/marial/v5/labs/flow/./vhdl/pn_correlator.vhd 2001/06/20.13:03:58
EN work/PN_CORRELATOR   FL W:/marial/v5/labs/flow/./vhdl/pn_correlator.vhd \
      PB ieee/STD_LOGIC_1164
AR work/PN_CORRELATOR/STRUCTURE \
      FL W:/marial/v5/labs/flow/./vhdl/pn_correlator.vhd EN work/PN_CORRELATOR \
      CP PN_CORRELATION CP PN_CORRELATION_FSM
FL W:/marial/v5/labs/flow/./vhdl/ch_fifo_pack.vhd 2002/01/30.11:28:48
PH work/CH_FIFO_PACK    FL W:/marial/v5/labs/flow/./vhdl/ch_fifo_pack.vhd \
      PB ieee/STD_LOGIC_1164
PB work/CH_FIFO_PACK    FL W:/marial/v5/labs/flow/./vhdl/ch_fifo_pack.vhd \
      PH work/CH_FIFO_PACK