ch_fifo.twx

it describe how to develop the field programmable gate array

<!ATTLIST twDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
<!ELEMENT twSite (#PCDATA)>
<!ELEMENT twDelType (#PCDATA)>
<!ELEMENT twFanCnt (#PCDATA)>
<!ELEMENT twComp (#PCDATA)>
<!ELEMENT twNet (#PCDATA)>
<!ELEMENT twBEL (#PCDATA)>
<!ELEMENT twLogDel (#PCDATA)>
<!ELEMENT twRouteDel (#PCDATA)>
<!ELEMENT twDestClk (#PCDATA)>
<!ATTLIST twDestClk twEdge (twRising | twFalling) "twRising">
<!ATTLIST twDestClk twArriveTime CDATA #IMPLIED>
<!ATTLIST twDestClk twClkRes CDATA #IMPLIED>
<!ELEMENT twPctLog (#PCDATA)>
<!ELEMENT twPctRoute (#PCDATA)>
<!ELEMENT twNetRpt (twDelNet | twSlackNet | twSkewNet)>
<!ELEMENT twDelNet (twDel, twNet, twDetNet?)>
<!ELEMENT twSlackNet (twSlack, twNet, twDel, twNotMet?, twTimeConst, twAbsSlack, twDetNet?)>
<!ELEMENT twTimeConst (#PCDATA)>
<!ELEMENT twAbsSlack (#PCDATA)>
<!ELEMENT twSkewNet (twSlack, twNet, twSkew, twNotMet?, twTimeConst, twAbsSlack, twDetSkewNet?)>
<!ELEMENT twSkew (#PCDATA)>
<!ELEMENT twDetNet (twNetDel*)>
<!ELEMENT twNetDel (twSrc, twDest, twNetDelInfo)>
<!ELEMENT twNetDelInfo (#PCDATA)>
<!ATTLIST twNetDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
<!ELEMENT twDetSkewNet (twNetSkew*)>
<!ELEMENT twNetSkew (twSrc, twDest, twNetDelInfo, twSkew)>
<!ELEMENT twConstList (twConstListItem)*>
<!ELEMENT twConstListItem (twConstName, twNotMet?, twReqVal?, twActVal?, twLogLvls?)> 
<!ATTLIST twConstListItem twUnits (twTime | twFreq) "twTime">
<!ELEMENT twNotMet EMPTY>
<!ELEMENT twReqVal (#PCDATA)>
<!ELEMENT twActVal (#PCDATA)>
<!ELEMENT twTimeGrp (twTimeGrpName, twCompList?, twSigList?, twBELList?, twMacList?, twPinList?)>
<!ELEMENT twTimeGrpName (#PCDATA)>
<!ELEMENT twCompList (twCompName+)>
<!ELEMENT twCompName (#PCDATA)>
<!ELEMENT twSigList (twSigName+)>
<!ELEMENT twSigName (#PCDATA)>
<!ELEMENT twBELList (twBELName+)>
<!ELEMENT twBELName (#PCDATA)>
<!ELEMENT twMacList (twMacName+)>
<!ELEMENT twMacName (#PCDATA)>
<!ELEMENT twPinList (twPinName+)>
<!ELEMENT twPinName (#PCDATA)>
<!ELEMENT twUnmetConstCnt (#PCDATA)>
<!ELEMENT twDataSheet (twSUH2ClkList*, twClk2PadList*, twClk2SUList*, twPad2PadList?)>
<!ATTLIST twDataSheet twNameLen CDATA #REQUIRED>
<!ELEMENT twSUH2ClkList (twDest, twSUH2Clk+)>
<!ELEMENT twSUH2Clk (twSrc, twSUHTime, twSUHTime?)>
<!ELEMENT twSUHTime (twSU2ClkTime?,twH2ClkTime?)>
<!ELEMENT twSU2ClkTime (#PCDATA)>
<!ATTLIST twSU2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twH2ClkTime (#PCDATA)>
<!ATTLIST twH2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twClk2PadList (twSrc, twClk2Pad+)>
<!ELEMENT twClk2Pad (twDest, twTime)>
<!ELEMENT twTime (#PCDATA)>
<!ATTLIST twTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
<!ELEMENT twClk2SUList (twDest, twClk2SU+)>
<!ELEMENT twClk2SU (twSrc, twRiseRise?, twFallRise?, twRiseFall?, twFallFall?)>
<!ELEMENT twRiseRise (#PCDATA)>
<!ELEMENT twFallRise (#PCDATA)>
<!ELEMENT twRiseFall (#PCDATA)>
<!ELEMENT twFallFall (#PCDATA)>
<!ELEMENT twPad2PadList (twPad2Pad+)>
<!ELEMENT twPad2Pad (twSrc, twDest, twDel)>
<!ELEMENT twNonDedClks ((twWarn | twInfo), twNonDedClk+)>
<!ELEMENT twNonDedClk (#PCDATA)>
<!ELEMENT twSum ( twErrCnt, twScore, twConstCov, twStats)>
<!ELEMENT twScore (#PCDATA)>
<!ELEMENT twConstCov (twPathCnt, twNetCnt, twConnCnt, twPct)>
<!ELEMENT twPathCnt (#PCDATA)>
<!ELEMENT twNetCnt (#PCDATA)>
<!ELEMENT twConnCnt (#PCDATA)>
<!ELEMENT twPct (#PCDATA)>
<!ELEMENT twStats ( twMinPer?, twMaxFreq?, twMaxCombDel?, twMaxFromToDel?, twMaxNetDel?, twMaxNetSkew?, twMaxInAfterClk?, twMinInBeforeClk?, twMaxOutBeforeClk?, twMinOutAfterClk?, (twInfo | twWarn)*)>
<!ELEMENT twMaxCombDel (#PCDATA)>
<!ELEMENT twMaxFromToDel (#PCDATA)>
<!ELEMENT twMaxNetDel (#PCDATA)>
<!ELEMENT twMaxNetSkew (#PCDATA)>
<!ELEMENT twMaxInAfterClk (#PCDATA)>
<!ELEMENT twMinInBeforeClk (#PCDATA)>
<!ELEMENT twMaxOutBeforeClk (#PCDATA)>
<!ELEMENT twMinOutAfterClk (#PCDATA)>
<!ELEMENT twFoot (twTimestamp)>
<!ELEMENT twTimestamp (#PCDATA)>
<!ELEMENT twClientInfo (twClientName, twAttrList?)>
<!ELEMENT twClientName (#PCDATA)>
<!ELEMENT twAttrList (twAttrListItem)*>
<!ELEMENT twAttrListItem (twName, twValue*)>
<!ELEMENT twName (#PCDATA)>
<!ELEMENT twValue (#PCDATA)>
]>
<twReport><twHead><twExecVer>Release 5.1i - Trace F.22</twExecVer><twCopyright>Copyright (c) 1995-2002 Xilinx, Inc.  All rights reserved.</twCopyright><twCmdLine>Y:/XILI/QualityPartnerBuild3/bin/nt/trce.exe -quiet -e 3 -l 3 -xml ch_fifo
ch_fifo.ncd -o ch_fifo.twr ch_fifo.pcf
</twCmdLine><twDesign>ch_fifo.ncd</twDesign><twPCF>ch_fifo.pcf</twPCF><twDevInfo><twDevName>xc2v40</twDevName><twSpeedGrade>-4</twSpeedGrade><twSpeedVer>ADVANCED 1.108 2002-06-12, STEPPING level 1</twSpeedVer></twDevInfo><twRptInfo twRptLvl="twErr"></twRptInfo><twEnvVar name="NONE" description="No environment variables were set" /></twHead><twWarn>WARNING:Timing:2721 - The clock MyDCM_inst_CLKIN_IBUFG is the input to DCM MyDCM_inst_MyDCM_inst.  MyDCM_inst_CLKIN_IBUFG has a low pulse width of 12500 ps and a high pulse width of 12500 ps.  This violates the pulse width of MyDCM_inst_MyDCM_inst which has a maximum low pulse width of 1050 ps and a maximum high pulse width of 1050 ps.</twWarn><twWarn>WARNING:Timing:2721 - The clock MyDCM_inst_CLKIN_IBUFG is the input to DCM MyDCM_inst_MyDCM_inst.  MyDCM_inst_CLKIN_IBUFG has a low pulse width of 12500 ps and a high pulse width of 12500 ps.  This violates the pulse width of MyDCM_inst_MyDCM_inst which has a maximum low pulse width of 1050 ps and a maximum high pulse width of 1050 ps.</twWarn><twBody><twErrRpt><twConst twConstType="twPathConst"><twConstHead><twConstName>TS_wr_clk_in = PERIOD TIMEGRP &quot;wr_clk_in&quot;  25 nS   HIGH 50.000000 % ;
</twConstName><twItemCnt>0</twItemCnt><twErrCntSetup>0</twErrCntSetup><twErrCntHold>0</twErrCntHold></twConstHead></twConst><twConst twConstType="twPathConst"><twConstHead><twConstName>TS_MyDCM_inst_CLK0_BUF = PERIOD TIMEGRP &quot;MyDCM_inst_CLK0_BUF&quot; TS_wr_clk_in * 
1.000000 HIGH 50.000 % ;
</twConstName><twItemCnt>743</twItemCnt><twErrCntSetup>0</twErrCntSetup><twErrCntHold>0</twErrCntHold><twMinPer>6.767</twMinPer></twConstHead></twConst><twConst twConstType="twPathConst"><twConstHead><twConstName>TS_MyDCM_inst_CLK2X_BUF = PERIOD TIMEGRP &quot;MyDCM_inst_CLK2X_BUF&quot; TS_wr_clk_in / 
2.000000 HIGH 50.000 % ;
</twConstName><twItemCnt>381</twItemCnt><twErrCntSetup>0</twErrCntSetup><twErrCntHold>0</twErrCntHold><twMinPer>6.317</twMinPer></twConstHead></twConst><twConst twConstType="twPathConst"><twConstHead><twConstName>OFFSET = IN 4.500 nS  BEFORE COMP &quot;wr_clk_in&quot; ;
</twConstName><twItemCnt>15</twItemCnt><twErrCntSetup>2</twErrCntSetup><twErrCntHold>0</twErrCntHold><twMinOff>5.540</twMinOff></twConstHead><twPathRpt><twConstOffIn><twSlack>-1.040</twSlack><twSrc BELType="PAD">reset</twSrc><twDest BELType="RAM">fifo_2048x8_inst_FIFO_BRAM.A</twDest><twClkDel>-0.617</twClkDel><twClkSrc>wr_clk_in</twClkSrc><twClkDest>fifo_2048x8_inst_FIFO_BRAM</twClkDest><twOff>4.500</twOff><twOffSrc>reset</twOffSrc><twOffDest>wr_clk_in</twOffDest><twDataPath><twSrc BELType="PAD">reset</twSrc><twDest BELType="RAM">fifo_2048x8_inst_FIFO_BRAM.A</twDest><twLogLvls>1</twLogLvls><twSrcSite>D12.PAD</twSrcSite><twPathDel><twSite>D12.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twRising">0.825</twDelInfo><twComp>reset</twComp><twBEL>reset</twBEL><twBEL>reset_IBUF</twBEL></twPathDel><twPathDel><twSite>RAMB16_X1Y1.SSRA</twSite><twDelType>net</twDelType><twFanCnt>53</twFanCnt><twDelInfo twEdge="twRising">2.448</twDelInfo><twComp>reset_IBUF</twComp></twPathDel><twPathDel><twSite>RAMB16_X1Y1.CLKA</twSite><twDelType>Tbrck</twDelType><twDelInfo twEdge="twRising">1.650</twDelInfo><twComp>fifo_2048x8_inst_FIFO_BRAM</twComp><twBEL>fifo_2048x8_inst_FIFO_BRAM.A</twBEL></twPathDel><twLogDel>2.475</twLogDel><twRouteDel>2.448</twRouteDel><twTotDel>4.923</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="0.000">wr_clk</twDestClk><twPctLog>50.3</twPctLog><twPctRoute>49.7</twPctRoute></twDataPath><twClkPath><twSrc BELType="PAD">wr_clk_in</twSrc><twDest BELType="">fifo_2048x8_inst_FIFO_BRAM.A</twDest><twLogLvls>3</twLogLvls><twSrcSite>A8.PAD</twSrcSite><twPathDel><twSite>A8.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twRising">0.783</twDelInfo><twComp>wr_clk_in</twComp><twBEL>wr_clk_in</twBEL><twBEL>MyDCM_inst_CLKIN_IBUFG_INST</twBEL></twPathDel><twPathDel><twSite>DCM_X1Y1.CLKIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.758</twDelInfo><twComp>MyDCM_inst_CLKIN_IBUFG</twComp></twPathDel><twPathDel><twSite>DCM_X1Y1.CLK0</twSite><twDelType>Tdcmino</twDelType><twDelInfo twEdge="twRising">-3.976</twDelInfo><twComp>MyDCM_inst_MyDCM_inst</twComp><twBEL>MyDCM_inst_MyDCM_inst</twBEL></twPathDel><twPathDel><twSite>BUFGMUX5P.I0</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.809</twDelInfo><twComp>MyDCM_inst_CLK0_BUF</twComp></twPathDel><twPathDel><twSite>BUFGMUX5P.O</twSite><twDelType>Tgi0o</twDelType><twDelInfo twEdge="twRising">0.559</twDelInfo><twComp>MyDCM_inst_CLK0_BUFG_INST</twComp><twBEL>MyDCM_inst_CLK0_BUFG_INST.GCLKMUX</twBEL><twBEL>MyDCM_inst_CLK0_BUFG_INST</twBEL></twPathDel><twPathDel><twSite>RAMB16_X1Y1.CLKA</twSite><twDelType>net</twDelType><twFanCnt>27</twFanCnt><twDelInfo twEdge="twRising">0.450</twDelInfo><twComp>wr_clk</twComp></twPathDel><twLogDel>-2.634</twLogDel><twRouteDel>2.017</twRouteDel><twTotDel>-0.617</twTotDel></twClkPath></twConstOffIn></twPathRpt><twPathRpt><twConstOffIn><twSlack>-1.039</twSlack><twSrc BELType="PAD">reset</twSrc><twDest BELType="RAM">fifo_2048x8_inst_FIFO_BRAM.B</twDest><twClkDel>-0.617</twClkDel><twClkSrc>wr_clk_in</twClkSrc><twClkDest>fifo_2048x8_inst_FIFO_BRAM</twClkDest><twOff>4.500</twOff><twOffSrc>reset</twOffSrc><twOffDest>wr_clk_in</twOffDest><twDataPath><twSrc BELType="PAD">reset</twSrc><twDest BELType="RAM">fifo_2048x8_inst_FIFO_BRAM.B</twDest><twLogLvls>1</twLogLvls><twSrcSite>D12.PAD</twSrcSite><twPathDel><twSite>D12.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twRising">0.825</twDelInfo><twComp>reset</twComp><twBEL>reset</twBEL><twBEL>reset_IBUF</twBEL></twPathDel><twPathDel><twSite>RAMB16_X1Y1.SSRB</twSite><twDelType>net</twDelType><twFanCnt>53</twFanCnt><twDelInfo twEdge="twRising">2.447</twDelInfo><twComp>reset_IBUF</twComp></twPathDel><twPathDel><twSite>RAMB16_X1Y1.CLKB</twSite><twDelType>Tbrck</twDelType><twDelInfo twEdge="twRising">1.650</twDelInfo><twComp>fifo_2048x8_inst_FIFO_BRAM</twComp><twBEL>fifo_2048x8_inst_FIFO_BRAM.B</twBEL></twPathDel><twLogDel>2.475</twLogDel><twRouteDel>2.447</twRouteDel><twTotDel>4.922</twTotDel><twDestClk twEdge ="twRising" twArriveTime ="0.000">rd_clk</twDestClk><twPctLog>50.3</twPctLog><twPctRoute>49.7</twPctRoute></twDataPath><twClkPath><twSrc BELType="PAD">wr_clk_in</twSrc><twDest BELType="">fifo_2048x8_inst_FIFO_BRAM.B</twDest><twLogLvls>3</twLogLvls><twSrcSite>A8.PAD</twSrcSite><twPathDel><twSite>A8.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twRising">0.783</twDelInfo><twComp>wr_clk_in</twComp><twBEL>wr_clk_in</twBEL><twBEL>MyDCM_inst_CLKIN_IBUFG_INST</twBEL></twPathDel><twPathDel><twSite>DCM_X1Y1.CLKIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.758</twDelInfo><twComp>MyDCM_inst_CLKIN_IBUFG</twComp></twPathDel><twPathDel><twSite>DCM_X1Y1.CLK2X</twSite><twDelType>Tdcmino</twDelType><twDelInfo twEdge="twRising">-3.976</twDelInfo><twComp>MyDCM_inst_MyDCM_inst</twComp><twBEL>MyDCM_inst_MyDCM_inst</twBEL></twPathDel><twPathDel><twSite>BUFGMUX7P.I0</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.809</twDelInfo><twComp>MyDCM_inst_CLK2X_BUF</twComp></twPathDel><twPathDel><twSite>BUFGMUX7P.O</twSite><twDelType>Tgi0o</twDelType><twDelInfo twEdge="twRising">0.559</twDelInfo><twComp>MyDCM_inst_CLK2X_BUFG_INST</twComp><twBEL>MyDCM_inst_CLK2X_BUFG_INST.GCLKMUX</twBEL><twBEL>MyDCM_inst_CLK2X_BUFG_INST</twBEL></twPathDel><twPathDel><twSite>RAMB16_X1Y1.CLKB</twSite><twDelType>net</twDelType><twFanCnt>27</twFanCnt><twDelInfo twEdge="twRising">0.450</twDelInfo><twComp>rd_clk</twComp></twPathDel><twLogDel>-2.634</twLogDel><twRouteDel>2.017</twRouteDel><twTotDel>-0.617</twTotDel></twClkPath></twConstOffIn></twPathRpt></twConst><twConst twConstType="twPathConst"><twConstHead><twConstName>OFFSET = OUT 9 nS  AFTER COMP &quot;wr_clk_in&quot; ;
</twConstName><twItemCnt>13</twItemCnt><twErrCntSetup>8</twErrCntSetup><twErrCntHold>0</twErrCntHold><twMinOff>9.431</twMinOff></twConstHead><twPathRpt><twConstOffOut><twSlack>-0.431</twSlack><twSrc BELType="PAD">wr_clk_in</twSrc><twDest BELType="PAD">rd_data&lt;0&gt;</twDest><twClkDel>-0.648</twClkDel><twClkSrc>wr_clk_in</twClkSrc><twClkDest>fifo_2048x8_inst_FIFO_BRAM</twClkDest><twDataDel>10.079</twDataDel><twDataSrc>fifo_2048x8_inst_FIFO_BRAM</twDataSrc><twDataDest>rd_data&lt;0&gt;</twDataDest><twOff>9.000</twOff><twOffSrc>wr_clk_in</twOffSrc><twOffDest>rd_data&lt;0&gt;</twOffDest><twClkPath><twSrc BELType="PAD">wr_clk_in</twSrc><twDest BELType="">fifo_2048x8_inst_FIFO_BRAM.B</twDest><twLogLvls>3</twLogLvls><twSrcSite>A8.PAD</twSrcSite><twPathDel><twSite>A8.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twRising">0.825</twDelInfo><twComp>wr_clk_in</twComp><twBEL>wr_clk_in</twBEL><twBEL>MyDCM_inst_CLKIN_IBUFG_INST</twBEL></twPathDel><twPathDel><twSite>DCM_X1Y1.CLKIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.798</twDelInfo><twComp>MyDCM_inst_CLKIN_IBUFG</twComp></twPathDel><twPathDel><twSite>DCM_X1Y1.CLK2X</twSite><twDelType>Tdcmino</twDelType><twDelInfo twEdge="twRising">-4.186</twDelInfo><twComp>MyDCM_inst_MyDCM_inst</twComp><twBEL>MyDCM_inst_MyDCM_inst</twBEL></twPathDel><twPathDel><twSite>BUFGMUX7P.I0</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.852</twDelInfo><twComp>MyDCM_inst_CLK2X_BUF</twComp></twPathDel><twPathDel><twSite>BUFGMUX7P.O</twSite><twDelType>Tgi0o</twDelType><twDelInfo twEdge="twRising">0.589</twDelInfo><twComp>MyDCM_inst_CLK2X_BUFG_INST</twComp><twBEL>MyDCM_inst_CLK2X_BUFG_INST.GCLKMUX</twBEL><twBEL>MyDCM_inst_CLK2X_BUFG_INST</twBEL></twPathDel><twPathDel><twSite>RAMB16_X1Y1.CLKB</twSite><twDelType>net</twDelType><twFanCnt>27</twFanCnt><twDelInfo twEdge="twRising">0.474</twDelInfo><twComp>rd_clk</twComp></twPathDel><twLogDel>-2.772</twLogDel><twRouteDel>2.124</twRouteDel><twTotDel>-0.648</twTotDel></twClkPath><twDataPath><twSrc BELType="RAM">fifo_2048x8_inst_FIFO_BRAM.B</twSrc><twDest BELType="PAD">rd_data&lt;0&gt;</twDest><twLogLvls>1</twLogLvls><twSrcSite>RAMB16_X1Y1.CLKB</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">rd_clk</twSrcClk><twPathDel><twSite>RAMB16_X1Y1.DOB0</twSite><twDelType>Tbcko</twDelType><twDelInfo twEdge="twRising">2.647</twDelInfo><twComp>fifo_2048x8_inst_FIFO_BRAM</twComp><twBEL>fifo_2048x8_inst_FIFO_BRAM.B</twBEL></twPathDel><twPathDel><twSite>C16.O1</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">1.325</twDelInfo><twComp>rd_data_0_OBUF</twComp></twPathDel><twPathDel><twSite>C16.PAD</twSite><twDelType>Tioop</twDelType><twDelInfo twEdge="twRising">6.107</twDelInfo><twComp>rd_data&lt;0&gt;</twComp><twBEL>rd_data_0_OBUF</twBEL><twBEL>rd_data&lt;0&gt;</twBEL></twPathDel><twLogDel>8.754</twLogDel><twRouteDel>1.325</twRouteDel><twTotDel>10.079</twTotDel><twPctLog>86.9</twPctLog><twPctRoute>13.1</twPctRoute></twDataPath></twConstOffOut></twPathRpt><twPathRpt><twConstOffOut><twSlack>-0.379</twSlack><twSrc BELType="PAD">wr_clk_in</twSrc><twDest BELType="PAD">rd_data&lt;1&gt;</twDest><twClkDel>-0.648</twClkDel><twClkSrc>wr_clk_in</twClkSrc><twClkDest>fifo_2048x8_inst_FIFO_BRAM</twClkDest><twDataDel>10.027</twDataDel><twDataSrc>fifo_2048x8_inst_FIFO_BRAM</twDataSrc><twDataDest>rd_data&lt;1&gt;</twDataDest><twOff>9.000</twOff><twOffSrc>wr_clk_in</twOffSrc><twOffDest>rd_data&lt;1&gt;</twOffDest><twClkPath><twSrc BELType="PAD">wr_clk_in</twSrc><twDest BELType="">fifo_2048x8_inst_FIFO_BRAM.B</twDest><twLogLvls>3</twLogLvls><twSrcSite>A8.PAD</twSrcSite><twPathDel><twSite>A8.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twRising">0.825</twDelInfo><twComp>wr_clk_in</twComp><twBEL>wr_clk_in</twBEL><twBEL>MyDCM_inst_CLKIN_IBUFG_INST</twBEL></twPathDel><twPathDel><twSite>DCM_X1Y1.CLKIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.798</twDelInfo><twComp>MyDCM_inst_CLKIN_IBUFG</twComp></twPathDel><twPathDel><twSite>DCM_X1Y1.CLK2X</twSite><twDelType>Tdcmino</twDelType><twDelInfo twEdge="twRising">-4.186</twDelInfo><twComp>MyDCM_inst_MyDCM_inst</twComp><twBEL>MyDCM_inst_MyDCM_inst</twBEL></twPathDel><twPathDel><twSite>BUFGMUX7P.I0</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.852</twDelInfo><twComp>MyDCM_inst_CLK2X_BUF</twComp></twPathDel><twPathDel><twSite>BUFGMUX7P.O</twSite><twDelType>Tgi0o</twDelType><twDelInfo twEdge="twRising">0.589</twDelInfo><twComp>MyDCM_inst_CLK2X_BUFG_INST</twComp><twBEL>MyDCM_inst_CLK2X_BUFG_INST.GCLKMUX</twBEL><twBEL>MyDCM_inst_CLK2X_BUFG_INST</twBEL></twPathDel><twPathDel><twSite>RAMB16_X1Y1.CLKB</twSite><twDelType>net</twDelType><twFanCnt>27</twFanCnt><twDelInfo twEdge="twRising">0.474</twDelInfo><twComp>rd_clk</twComp></twPathDel><twLogDel>-2.772</twLogDel><twRouteDel>2.124</twRouteDel><twTotDel>-0.648</twTotDel></twClkPath><twDataPath><twSrc BELType="RAM">fifo_2048x8_inst_FIFO_BRAM.B</twSrc><twDest BELType="PAD">rd_data&lt;1&gt;</twDest><twLogLvls>1</twLogLvls><twSrcSite>RAMB16_X1Y1.CLKB</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">rd_clk</twSrcClk><twPathDel><twSite>RAMB16_X1Y1.DOB1</twSite><twDelType>Tbcko</twDelType><twDelInfo twEdge="twRising">2.647</twDelInfo><twComp>fifo_2048x8_inst_FIFO_BRAM</twComp><twBEL>fifo_2048x8_inst_FIFO_BRAM.B</twBEL></twPathDel><twPathDel><twSite>D16.O1</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">1.273</twDelInfo><twComp>rd_data_1_OBUF</twComp></twPathDel><twPathDel><twSite>D16.PAD</twSite><twDelType>Tioop</twDelType><twDelInfo twEdge="twRising">6.107</twDelInfo><twComp>rd_data&lt;1&gt;</twComp><twBEL>rd_data_1_OBUF</twBEL><twBEL>rd_data&lt;1&gt;</twBEL></twPathDel><twLogDel>8.754</twLogDel><twRouteDel>1.273</twRouteDel><twTotDel>10.027</twTotDel><twPctLog>87.3</twPctLog><twPctRoute>12.7</twPctRoute></twDataPath></twConstOffOut></twPathRpt><twPathRpt><twConstOffOut><twSlack>-0.379</twSlack><twSrc BELType="PAD">wr_clk_in</twSrc><twDest BELType="PAD">rd_data&lt;2&gt;</twDest><twClkDel>-0.648</twClkDel><twClkSrc>wr_clk_in</twClkSrc><twClkDest>fifo_2048x8_inst_FIFO_BRAM</twClkDest><twDataDel>10.027</twDataDel><twDataSrc>fifo_2048x8_inst_FIFO_BRAM</twDataSrc><twDataDest>rd_data&lt;2&gt;</twDataDest><twOff>9.000</twOff><twOffSrc>wr_clk_in</twOffSrc><twOffDest>rd_data&lt;2&gt;</twOffDest><twClkPath><twSrc BELType="PAD">wr_clk_in</twSrc><twDest BELType="">fifo_2048x8_inst_FIFO_BRAM.B</twDest><twLogLvls>3</twLogLvls><twSrcSite>A8.PAD</twSrcSite><twPathDel><twSite>A8.I</twSite><twDelType>Tiopi</twDelType><twDelInfo twEdge="twRising">0.825</twDelInfo><twComp>wr_clk_in</twComp><twBEL>wr_clk_in</twBEL><twBEL>MyDCM_inst_CLKIN_IBUFG_INST</twBEL></twPathDel><twPathDel><twSite>DCM_X1Y1.CLKIN</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.798</twDelInfo><twComp>MyDCM_inst_CLKIN_IBUFG</twComp></twPathDel><twPathDel><twSite>DCM_X1Y1.CLK2X</twSite><twDelType>Tdcmino</twDelType><twDelInfo twEdge="twRising">-4.186</twDelInfo><twComp>MyDCM_inst_MyDCM_inst</twComp><twBEL>MyDCM_inst_MyDCM_inst</twBEL></twPathDel><twPathDel><twSite>BUFGMUX7P.I0</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">0.852</twDelInfo><twComp>MyDCM_inst_CLK2X_BUF</twComp></twPathDel><twPathDel><twSite>BUFGMUX7P.O</twSite><twDelType>Tgi0o</twDelType><twDelInfo twEdge="twRising">0.589</twDelInfo><twComp>MyDCM_inst_CLK2X_BUFG_INST</twComp><twBEL>MyDCM_inst_CLK2X_BUFG_INST.GCLKMUX</twBEL><twBEL>MyDCM_inst_CLK2X_BUFG_INST</twBEL></twPathDel><twPathDel><twSite>RAMB16_X1Y1.CLKB</twSite><twDelType>net</twDelType><twFanCnt>27</twFanCnt><twDelInfo twEdge="twRising">0.474</twDelInfo><twComp>rd_clk</twComp></twPathDel><twLogDel>-2.772</twLogDel><twRouteDel>2.124</twRouteDel><twTotDel>-0.648</twTotDel></twClkPath><twDataPath><twSrc BELType="RAM">fifo_2048x8_inst_FIFO_BRAM.B</twSrc><twDest BELType="PAD">rd_data&lt;2&gt;</twDest><twLogLvls>1</twLogLvls><twSrcSite>RAMB16_X1Y1.CLKB</twSrcSite><twSrcClk twEdge ="twRising" twArriveTime ="0.000">rd_clk</twSrcClk><twPathDel><twSite>RAMB16_X1Y1.DOB2</twSite><twDelType>Tbcko</twDelType><twDelInfo twEdge="twRising">2.647</twDelInfo><twComp>fifo_2048x8_inst_FIFO_BRAM</twComp><twBEL>fifo_2048x8_inst_FIFO_BRAM.B</twBEL></twPathDel><twPathDel><twSite>D15.O1</twSite><twDelType>net</twDelType><twFanCnt>1</twFanCnt><twDelInfo twEdge="twRising">1.273</twDelInfo><twComp>rd_data_2_OBUF</twComp></twPathDel><twPathDel><twSite>D15.PAD</twSite><twDelType>Tioop</twDelType><twDelInfo twEdge="twRising">6.107</twDelInfo><twComp>rd_data&lt;2&gt;</twComp><twBEL>rd_data_2_OBUF</twBEL><twBEL>rd_data&lt;2&gt;</twBEL></twPathDel><twLogDel>8.754</twLogDel><twRouteDel>1.273</twRouteDel><twTotDel>10.027</twTotDel><twPctLog>87.3</twPctLog><twPctRoute>12.7</twPctRoute></twDataPath></twConstOffOut></twPathRpt></twConst><twUnmetConstCnt>2</twUnmetConstCnt><twDataSheet twNameLen="15"><twSUH2ClkList><twDest>wr_clk_in</twDest><twSUH2Clk><twSrc>data_ch</twSrc><twSUHTime><twSU2ClkTime twEdge="twRising">1.840</twSU2ClkTime><twH2ClkTime twEdge="twRising">-0.765</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk><twSrc>rd</twSrc><twSUHTime><twSU2ClkTime twEdge="twRising">3.690</twSU2ClkTime><twH2ClkTime twEdge="twRising">-3.007</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk><twSrc>reset</twSrc><twSUHTime><twSU2ClkTime twEdge="twRising">5.540</twSU2ClkTime><twH2ClkTime twEdge="twRising">-4.982</twH2ClkTime></twSUHTime></twSUH2Clk></twSUH2ClkList><twClk2PadList><twSrc>wr_clk_in</twSrc><twClk2Pad><twDest>almost_empty</twDest><twTime twEdge ="twRising">5.873</twTime></twClk2Pad><twClk2Pad><twDest>almost_full</twDest><twTime twEdge ="twRising">5.882</twTime></twClk2Pad><twClk2Pad><twDest>empty</twDest><twTime twEdge ="twRising">5.883</twTime></twClk2Pad><twClk2Pad><twDest>full</twDest><twTime twEdge ="twRising">5.871</twTime></twClk2Pad><twClk2Pad><twDest>pn_lock_rd_clk</twDest><twTime twEdge ="twRising">6.997</twTime></twClk2Pad><twClk2Pad><twDest>rd_data&lt;0&gt;</twDest><twTime twEdge ="twRising">9.431</twTime></twClk2Pad><twClk2Pad><twDest>rd_data&lt;1&gt;</twDest><twTime twEdge ="twRising">9.379</twTime></twClk2Pad><twClk2Pad><twDest>rd_data&lt;2&gt;</twDest><twTime twEdge ="twRising">9.379</twTime></twClk2Pad><twClk2Pad><twDest>rd_data&lt;3&gt;</twDest><twTime twEdge ="twRising">9.083</twTime></twClk2Pad><twClk2Pad><twDest>rd_data&lt;4&gt;</twDest><twTime twEdge ="twRising">9.083</twTime></twClk2Pad><twClk2Pad><twDest>rd_data&lt;5&gt;</twDest><twTime twEdge ="twRising">9.083</twTime></twClk2Pad><twClk2Pad><twDest>rd_data&lt;6&gt;</twDest><twTime twEdge ="twRising">9.345</twTime></twClk2Pad><twClk2Pad><twDest>rd_data&lt;7&gt;</twDest><twTime twEdge ="twRising">9.378</twTime></twClk2Pad></twClk2PadList><twClk2SUList><twDest>wr_clk_in</twDest><twClk2SU><twSrc>wr_clk_in</twSrc><twRiseRise>6.767</twRiseRise></twClk2SU></twClk2SUList></twDataSheet></twErrRpt></twBody><twSum><twErrCnt>10</twErrCnt><twScore>4240</twScore><twConstCov><twPathCnt>1152</twPathCnt><twNetCnt>0</twNetCnt><twConnCnt>488</twConnCnt><twPct>90.538033</twPct></twConstCov><twStats><twMinPer>6.767</twMinPer><twMaxFreq>147.776</twMaxFreq><twMinInBeforeClk>5.540</twMinInBeforeClk><twMinOutAfterClk>9.431</twMinOutAfterClk></twStats></twSum><twFoot><twTimestamp>Thu Jul 18 14:59:44 2002</twTimestamp></twFoot></twReport>