📄 ch_fifo._sprj

📁 it describe how to develop the field programmable gate array

💻 _SPRJ

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set p_VhdlLibrary  {}
set VHDLSources {./vhdl/fifo_2048x8.vhd ./vhdl/fifo_status.vhd MyDCM.vhd ./vhdl/pn_correlation.vhd ./vhdl/pn_correlation_fsm.vhd ./vhdl/pn_correlator.vhd ./vhdl/ch_fifo.vhd  ./vhdl/ch_fifo_pack.vhd}

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