top.ll

FPGA向SRAM中写入数据

Revision 3
; Created by bitgen G.28 at Wed Oct 25 17:53:59 2006
; Bit lines have the following form:
; <offset> <frame address> <frame offset> <information>
; <information> may be zero or more <kw>=<value> pairs
; Block=<blockname     specifies the block associated with this
;                      memory cell.
;
; Latch=<name>         specifies the latch associated with this memory cell.
;
; Net=<netname>        specifies the user net associated with this
;                      memory cell.
;
; COMPARE=[YES | NO]   specifies whether or not it is appropriate
;                      to compare this bit position between a
;                      "program" and a "readback" bitstream.
;                      If not present the default is NO.
;
; Ram=<ram id>:<bit>   This is used in cases where a CLB function
; Rom=<ram id>:<bit>   generator is used as RAM (or ROM).  <Ram id>
;                      will be either 'F', 'G', or 'M', indicating
;                      that it is part of a single F or G function
;                      generator used as RAM, or as a single RAM
;                      (or ROM) built from both F and G.  <Bit> is
;                      a decimal number.
;
; Info lines have the following form:
; Info <name>=<value>  specifies a bit associated with the LCA
;                      configuration options, and the value of
;                      that bit.  The names of these bits may have
;                      special meaning to software reading the .ll file.
;
Info STARTSEL0=1
Info Persist=1
Info Readback=Used
Bit   565327 0x001e0600     79 Block=P185 Latch=I Net=empty_flag_IBUF
Bit   644767 0x00220200     31 Block=P182 Latch=O2 Net=slrd_OBUF
Bit   644784 0x00220200     48 Block=P181 Latch=O2 Net=GLOBAL_LOGIC1_3
Bit   644807 0x00220200     71 Block=P180 Latch=O2 Net=GLOBAL_LOGIC1_3
Bit   651304 0x00220600   2152 Block=P80 Latch=I Net=clk_BUFGP/IBUFG
Bit   854938 0x002c0200    442 Block=SLICE_X38Y52 Latch=YQ Net=insloe
Bit   855738 0x002c0200   1242 Block=SLICE_X38Y27 Latch=YQ Net=i<3>
Bit   856282 0x002c0200   1786 Block=SLICE_X38Y10 Latch=YQ Net=count<5>
Bit   856285 0x002c0200   1789 Block=SLICE_X38Y10 Latch=XQ Net=count<4>
Bit   856314 0x002c0200   1818 Block=SLICE_X38Y9 Latch=YQ Net=count<3>
Bit   856317 0x002c0200   1821 Block=SLICE_X38Y9 Latch=XQ Net=count<2>
Bit   856346 0x002c0200   1850 Block=SLICE_X38Y8 Latch=YQ Net=count<1>
Bit   856349 0x002c0200   1853 Block=SLICE_X38Y8 Latch=XQ Net=count<0>
Bit   857562 0x002c0400    858 Block=SLICE_X39Y39 Latch=YQ Net=i<31>
Bit   857565 0x002c0400    861 Block=SLICE_X39Y39 Latch=XQ Net=i<30>
Bit   857594 0x002c0400    890 Block=SLICE_X39Y38 Latch=YQ Net=i<29>
Bit   857597 0x002c0400    893 Block=SLICE_X39Y38 Latch=XQ Net=i<28>
Bit   857626 0x002c0400    922 Block=SLICE_X39Y37 Latch=YQ Net=i<27>
Bit   857629 0x002c0400    925 Block=SLICE_X39Y37 Latch=XQ Net=i<26>
Bit   857658 0x002c0400    954 Block=SLICE_X39Y36 Latch=YQ Net=i<25>
Bit   857661 0x002c0400    957 Block=SLICE_X39Y36 Latch=XQ Net=i<24>
Bit   857690 0x002c0400    986 Block=SLICE_X39Y35 Latch=YQ Net=i<23>
Bit   857693 0x002c0400    989 Block=SLICE_X39Y35 Latch=XQ Net=i<22>
Bit   857722 0x002c0400   1018 Block=SLICE_X39Y34 Latch=YQ Net=i<21>
Bit   857725 0x002c0400   1021 Block=SLICE_X39Y34 Latch=XQ Net=i<20>
Bit   857754 0x002c0400   1050 Block=SLICE_X39Y33 Latch=YQ Net=i<19>
Bit   857757 0x002c0400   1053 Block=SLICE_X39Y33 Latch=XQ Net=i<18>
Bit   857786 0x002c0400   1082 Block=SLICE_X39Y32 Latch=YQ Net=i<17>
Bit   857789 0x002c0400   1085 Block=SLICE_X39Y32 Latch=XQ Net=i<16>
Bit   857818 0x002c0400   1114 Block=SLICE_X39Y31 Latch=YQ Net=i<15>
Bit   857821 0x002c0400   1117 Block=SLICE_X39Y31 Latch=XQ Net=i<14>
Bit   857850 0x002c0400   1146 Block=SLICE_X39Y30 Latch=YQ Net=i<13>
Bit   857853 0x002c0400   1149 Block=SLICE_X39Y30 Latch=XQ Net=i<12>
Bit   857882 0x002c0400   1178 Block=SLICE_X39Y29 Latch=YQ Net=i<11>
Bit   857885 0x002c0400   1181 Block=SLICE_X39Y29 Latch=XQ Net=i<10>
Bit   857914 0x002c0400   1210 Block=SLICE_X39Y28 Latch=YQ Net=i<9>
Bit   857917 0x002c0400   1213 Block=SLICE_X39Y28 Latch=XQ Net=i<8>
Bit   857946 0x002c0400   1242 Block=SLICE_X39Y27 Latch=YQ Net=i<7>
Bit   857949 0x002c0400   1245 Block=SLICE_X39Y27 Latch=XQ Net=i<6>
Bit   857978 0x002c0400   1274 Block=SLICE_X39Y26 Latch=YQ Net=i<5>
Bit   857981 0x002c0400   1277 Block=SLICE_X39Y26 Latch=XQ Net=i<4>
Bit   858013 0x002c0400   1309 Block=SLICE_X39Y25 Latch=XQ Net=i<2>
Bit   858042 0x002c0400   1338 Block=SLICE_X39Y24 Latch=YQ Net=i<1>
Bit   858045 0x002c0400   1341 Block=SLICE_X39Y24 Latch=XQ Net=i<0>
Bit  1064327 0x00360200     71 Block=P165 Latch=O2 Net=slrd_OBUF
Bit  1233927 0x003e0200   1863 Block=P111 Latch=O2 Net=GLOBAL_LOGIC1