init_code.asm

BF533 上面Multiple DXE启动代码

#include "defbf533.h"

.section program;

	[--SP] = ASTAT;
	[--SP] = RETS;
	[--SP] = (r7:0);
	[--SP] = (p5:0);
	
//Save external pointer into R1
	R4 = R0;						//R0 currently points to DXE1							

/*******Initialize Flags************/

//Set PF as input
	P2.L = FIO_DIR & 0xffff;
	P2.H = FIO_DIR >> 16;
	R0 = W[P2](Z);
	BITCLR(R0,8);					//Set PF8 as input
	BITCLR(R0,9);					//Set PF9 as input
	W[P2] = R0;
	
//Enable Interrupts for PFs
	P2.L = FIO_MASKA_S & 0xFFFF;
	P2.H = FIO_MASKA_S >> 16;
	R0 = W[P2](Z);
	BITSET(R0,8);					//Enable interrupt for PF8
	BITSET(R0,9);					//Enable interrupt for PF9
	W[P2] = R0;
	
//Set Active High Polarity
	P2.H = FIO_POLAR >> 16;
	P2.L = FIO_POLAR & 0xFFFF;
	R0 = W[P2](Z);
	BITCLR(R0,8);					//Set active high polarity for PF8
	BITCLR(R0,9);					//Set active high polarity for PF9
	W[P2] = R0;
	
//Set Edge Sensitivity
	P2.H = FIO_EDGE >> 16;
	P2.L = FIO_EDGE & 0xFFFF;
	R0 = W[P2](Z);
	BITSET(R0,8);					//Set edge sensitivity for PF8
	BITSET(R0,9);					//Set edge sensitivity for PF9
	W[P2] = R0;
		
//Enable Interrupts on System Level for PFs
	P2.L = SIC_IMASK & 0xFFFF;
	P2.H = SIC_IMASK >> 16;
	R0 = [P2];
	BITSET(R0,19);
	[P2] = R0;


//Enable Interrupts on Core Level for PFs
	P2.L = IMASK & 0xFFFF;
	P2.H = IMASK >> 16;
	R0 = [P2];
	BITSET(R0,12);
	[P2] = R0;
	
//Set PF interrupt address within EVT table
	P2.H = 0xFFE0;
	P2.L = 0x2030;
	R0.H = FLAG_INT;
	R0.L = FLAG_INT;
	[P2] = R0;
	
//Enable PF
	P2.H = FIO_INEN >> 16;
	P2.L = FIO_INEN & 0xFFFF;
	R0 = W[P2](Z);
	BITSET(R0,8);					//Enable PF8
	BITSET(R0,9);					//Enable PF9
	W[P2] = R0;

/***********************************/
	
	JUMP 0;							//Wait here until PF8 or PF9 are asserted
	
/***********************************/

FLAG_INT:							//We will vector here if PF8 or PF9 are asserted

//Read Flag Register
	P2.H = FIO_FLAG_D >> 16;
	P2.L = FIO_FLAG_D & 0xFFFF;
	R0 = W[P2](Z);					//Read the FLAG register
	CC = BITTST(R0,9);				//Check if PF9 was asserted
	IF CC JUMP PF9_ASSERTED;

//Clear Interrupt
PF8_ASSERTED:						//If PF8 was asserted, Boot DXE1
	P2.H = FIO_FLAG_C >> 16;
	P2.L = FIO_FLAG_C & 0xFFFF;
	R0 = 0x0100(Z);
	W[P2] = R0;						//Clear PF8 Interrupt
	R7 = 0x0;						//R7 = 0x0 if PF8 was asserted (we want to boot in DXE1)
	JUMP BOOT_DXE;

PF9_ASSERTED:						//If PF9 was asserted, Boot DXE2
	P2.H = FIO_FLAG_C >> 16;
	P2.L = FIO_FLAG_C & 0xFFFF;
	R0 = 0x0200(Z);
	W[P2] = R0;						//Clear PF9 Interrupt
	R7 = 0x1;						//R7 = 0x1 if PF9 was asserted (we want to boot in DXE2)
	

BOOT_DXE:
//Skip over 10-byte header and read in DXE Count
	R0.H = 0x2000;					//P0 = start of ASYNC Bank 0
	R0.L = 0x0000;

	P1 = 2;							//Number of DXEs to jump over
									//After first iteration, R0 will point to DXE1
									//After second iteration, R0 will point to DXE2
LSETUP(ADD_DXE_COUNT_BEGIN, ADD_DXE_COUNT_END) LC0 = P1;
ADD_DXE_COUNT_BEGIN:
	R1 = 0xA;						//Skip over 10 bytes for the 10-byte header
	R1 = R1 << 1;					//Multiply by 2 since we are booting from a 16-bit flash (compensate for zero padding)
	R0 = R0 + R1;
	P0 = R0;						//P0 points to DXE COUNT
	R0 = W[P0++](Z);				//R0 = 00 | Bits[7:0] of DXE COUNT
	R1 = W[P0++](Z);				//R1 = 00 | Bits[15:8] of DXE COUNT
	R1 = R1 << 8;
	R2 = W[P0++](Z);				//R2 = 00 | Bits[23:16] of DXE COUNT
	R2 = R2 << 16;
	R3 = W[P0++](Z);				//R3 = 00 | Bits[31:24] of DXE COUNT
	R3 = R3 << 24;

	R0 = R0 | R1;					//R0 = Bits[15:0] of DXE COUNT
	R2 = R2 | R3;					//R2 = Bits[31:16] of DXE COUNT
	R3 = R0 | R2;					//R3 = DXE COUNT
	R0 = P0;
	R0 = R0 + R3;					//Modify pointer by the DXE COUNT so now R0 points to next DXE
	P0 = R0;
ADD_DXE_COUNT_END: NOP;

//point to DXE2 if PF8 was asserted
	CC = BITTST(R7,0);				//Test if PF8 was asserted
	IF !CC R0 = R4;					//If PF8 was asserted, set R0 to point to DXE1
	
/******************************/

DONE:
	(p5:0) = [SP++];  		// Restore Regs
	(r7:1) = [SP++];		//----->DO NOT RESTORE R0<-------
	RETS = [SP++];			//Modify SP by one for R0 case
	RETS = [SP++];			//Pop off the real value of RETS
	ASTAT = [SP++];

	RTS;