📄 init.c
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#include "init.h"
void Init_PLL(void)
{
volatile int test=0;
sysreg_write(reg_SYSCFG, 0x32); //Initialize System Configuration Register
*pSIC_IWR = 0x1;
*pPLL_CTL = 0x2C00;
ssync();
idle();
}//end Init_PLL
//Setup of the async interface
void Init_EBIU(void)
{
*pEBIU_AMBCTL0 = 0x7bb07bb0; // <--|Write access time = 7 cycles, read access time = 11 cycles, no ARDY
*pEBIU_AMBCTL1 = 0x7bb07bb0; // |Hold time = 2 cycles, setup time = 3 cycles, transition time = 4 cycles
*pEBIU_AMGCTL = 0x000F; // |Enable all memory banks
}//end Init_EBIU
EX_INTERRUPT_HANDLER(DMA0_PPI_ISR) // <--|declaration in exception.h -->
{ // |declaration with _pragma(interrupt) the ISR Startaddress
//disable the interrupt request
*pDMA0_IRQ_STATUS = 0x1;
printf( "\nThe DMA0 PPI Interrupt has been entered!\n" );
}//end DMA0_PPI_ISR
void Init_Interrupts(void)
{
// configure interrupt
*pSIC_IAR0 = *pSIC_IAR0 & 0xffffffff | 0x00000000;
*pSIC_IAR1 = *pSIC_IAR1 & 0xffffffff | 0x00000001; // map DMA0 PPI Interrupt -> IVG8
*pSIC_IAR2 = *pSIC_IAR2 & 0xffffffff | 0x00000000;
register_handler(ik_ivg8, DMA0_PPI_ISR); // assign DMA0 PPI ISR to interrupt vector 8
*pSIC_IMASK=0x00000100; // all interrupts 0=disabled but DMA0 PPI interrupt enabled
}//end Init_Interrupts
//SDRAM Setup
void Init_SDRAM(void)
{
if (*pEBIU_SDSTAT & SDRS) {
//SDRAM Refresh Rate Control Register
*pEBIU_SDRRC = 0x00000817;
//SDRAM Memory Bank Control Register
*pEBIU_SDBCTL = 0x00000013;
//SDRAM Memory Global Control Register
*pEBIU_SDGCTL = 0x0091998d;
ssync();
}
}//end Init_SDRAM
void Init_DMA(void)
{
//Target address of the DMA
*pDMA0_START_ADDR = 0x0;
//Line_Length 16bit transfers will be executed
*pDMA0_X_COUNT = Line_Length;
//The modifier is set to 2 because of the 16bit transfers
*pDMA0_X_MODIFY = 0x1;
//Frame_Length 16bit transfers will be executed
*pDMA0_Y_COUNT = Frame_Length;
//The modifier is set to 2 because of the 16bit transfers
*pDMA0_Y_MODIFY = 0x1;
//PPI Peripheral is used
*pDMA0_PERIPHERAL_MAP = 0x0;
//DMA Config: Enable DMA | Memory write DMA | 2-D DMA | Discard DMA FIFO before start | enable assertation of interrupt | NDSIZE for stop mode | Enable STOP DMA
//*pDMA0_CONFIG = DMAEN | DI_EN | WNR | WDSIZE_16| DMA2D | RESTART | DI_EN;
*pDMA0_CONFIG = DMAEN | DI_EN | WNR | DMA2D | RESTART | DI_EN;
}//end Init_DMA
void Init_PPI(void)
{
//The PPI is set to receive 525 lines for each frame
*pPPI_FRAME = 525;
//PPI enabled, input mode, active video only, receive field 1&2,
//packing enabled, skipping disabled, 8bit data bus, nothing inverted
*pPPI_CONTROL = PORT_EN | FLD_SEL | PACK_EN | DLEN_8 ;
}//end Init_PPI
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