fpga313czkz.hier_info

windowsxp/2000下驱动程序开发软件winddriver6.0

q[2] <= q[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[3] <= q[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[4] <= q[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[5] <= q[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[6] <= q[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[7] <= q[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|fpga313czkz|search_panel:m1|scan_reg8:scan6
clk => q[6]~reg0.CLK
clk => q[5]~reg0.CLK
clk => q[4]~reg0.CLK
clk => q[3]~reg0.CLK
clk => q[2]~reg0.CLK
clk => q[1]~reg0.CLK
clk => q[0]~reg0.CLK
clk => q[7]~reg0.CLK
d[0] => q[0]~reg0.DATAIN
d[1] => q[1]~reg0.DATAIN
d[2] => q[2]~reg0.DATAIN
d[3] => q[3]~reg0.DATAIN
d[4] => q[4]~reg0.DATAIN
d[5] => q[5]~reg0.DATAIN
d[6] => q[6]~reg0.DATAIN
d[7] => q[7]~reg0.DATAIN
ena => q[6]~reg0.ENA
ena => q[5]~reg0.ENA
ena => q[4]~reg0.ENA
ena => q[3]~reg0.ENA
ena => q[2]~reg0.ENA
ena => q[1]~reg0.ENA
ena => q[0]~reg0.ENA
ena => q[7]~reg0.ENA
q[0] <= q[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[1] <= q[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[2] <= q[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[3] <= q[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[4] <= q[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[5] <= q[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[6] <= q[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[7] <= q[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|fpga313czkz|search_panel:m1|scan_reg8:scan7
clk => q[6]~reg0.CLK
clk => q[5]~reg0.CLK
clk => q[4]~reg0.CLK
clk => q[3]~reg0.CLK
clk => q[2]~reg0.CLK
clk => q[1]~reg0.CLK
clk => q[0]~reg0.CLK
clk => q[7]~reg0.CLK
d[0] => q[0]~reg0.DATAIN
d[1] => q[1]~reg0.DATAIN
d[2] => q[2]~reg0.DATAIN
d[3] => q[3]~reg0.DATAIN
d[4] => q[4]~reg0.DATAIN
d[5] => q[5]~reg0.DATAIN
d[6] => q[6]~reg0.DATAIN
d[7] => q[7]~reg0.DATAIN
ena => q[6]~reg0.ENA
ena => q[5]~reg0.ENA
ena => q[4]~reg0.ENA
ena => q[3]~reg0.ENA
ena => q[2]~reg0.ENA
ena => q[1]~reg0.ENA
ena => q[0]~reg0.ENA
ena => q[7]~reg0.ENA
q[0] <= q[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[1] <= q[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[2] <= q[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[3] <= q[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[4] <= q[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[5] <= q[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[6] <= q[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[7] <= q[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|fpga313czkz|search_panel:m1|scan_reg8:scan8
clk => q[6]~reg0.CLK
clk => q[5]~reg0.CLK
clk => q[4]~reg0.CLK
clk => q[3]~reg0.CLK
clk => q[2]~reg0.CLK
clk => q[1]~reg0.CLK
clk => q[0]~reg0.CLK
clk => q[7]~reg0.CLK
d[0] => q[0]~reg0.DATAIN
d[1] => q[1]~reg0.DATAIN
d[2] => q[2]~reg0.DATAIN
d[3] => q[3]~reg0.DATAIN
d[4] => q[4]~reg0.DATAIN
d[5] => q[5]~reg0.DATAIN
d[6] => q[6]~reg0.DATAIN
d[7] => q[7]~reg0.DATAIN
ena => q[6]~reg0.ENA
ena => q[5]~reg0.ENA
ena => q[4]~reg0.ENA
ena => q[3]~reg0.ENA
ena => q[2]~reg0.ENA
ena => q[1]~reg0.ENA
ena => q[0]~reg0.ENA
ena => q[7]~reg0.ENA
q[0] <= q[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[1] <= q[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[2] <= q[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[3] <= q[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[4] <= q[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[5] <= q[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[6] <= q[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
q[7] <= q[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|fpga313czkz|search_panel:m1|ttl128bit_dq:ttl_ram
address[0] => address[0]~6.IN1
address[1] => address[1]~5.IN1
address[2] => address[2]~4.IN1
address[3] => address[3]~3.IN1
address[4] => address[4]~2.IN1
address[5] => address[5]~1.IN1
address[6] => address[6]~0.IN1
we => we~0.IN1
inclock => inclock~0.IN1
data[0] => data[0]~0.IN1
q[0] <= lpm_ram_dq:lpm_ram_dq_component.q


|fpga313czkz|search_panel:m1|ttl128bit_dq:ttl_ram|lpm_ram_dq:lpm_ram_dq_component
data[0] => altram:sram.data[0]
address[0] => altram:sram.address[0]
address[1] => altram:sram.address[1]
address[2] => altram:sram.address[2]
address[3] => altram:sram.address[3]
address[4] => altram:sram.address[4]
address[5] => altram:sram.address[5]
address[6] => altram:sram.address[6]
inclock => altram:sram.clocki
outclock => ~NO_FANOUT~
we => altram:sram.we
q[0] <= altram:sram.q[0]


|fpga313czkz|search_panel:m1|ttl128bit_dq:ttl_ram|lpm_ram_dq:lpm_ram_dq_component|altram:sram
we => segment[0][0].WE
data[0] => segment[0][0].DATAIN
address[0] => segment[0][0].WADDR
address[0] => segment[0][0].RADDR
address[1] => segment[0][0].WADDR1
address[1] => segment[0][0].RADDR1
address[2] => segment[0][0].WADDR2
address[2] => segment[0][0].RADDR2
address[3] => segment[0][0].WADDR3
address[3] => segment[0][0].RADDR3
address[4] => segment[0][0].WADDR4
address[4] => segment[0][0].RADDR4
address[5] => segment[0][0].WADDR5
address[5] => segment[0][0].RADDR5
address[6] => segment[0][0].WADDR6
address[6] => segment[0][0].RADDR6
clocki => segment[0][0].CLK0
clocko => ~NO_FANOUT~
be => ~NO_FANOUT~
q[0] <= segment[0][0].DATAOUT


|fpga313czkz|main:m2
clk => backbyte[7].CLK
clk => backbyte[6].CLK
clk => backbyte[5].CLK
clk => backbyte[4].CLK
clk => backbyte[3].CLK
clk => backbyte[2].CLK
clk => backbyte[1].CLK
clk => backbyte[0].CLK
clk => ResetStrobe.CLK
clk => reset_cnt[4].CLK
clk => reset_cnt[3].CLK
clk => reset_cnt[2].CLK
clk => reset_cnt[1].CLK
clk => reset_cnt[0].CLK
clk => SelfCheck.CLK
clk => SendAll.CLK
clk => ReSend.CLK
clk => SearchStart.CLK
clk => SearchStop.CLK
clk => lamp_wr~reg0.CLK
clk => ParallelTransmitBuffer[7].CLK
clk => ParallelTransmitBuffer[6].CLK
clk => ParallelTransmitBuffer[5].CLK
clk => ParallelTransmitBuffer[4].CLK
clk => ParallelTransmitBuffer[3].CLK
clk => ParallelTransmitBuffer[2].CLK
clk => ParallelTransmitBuffer[1].CLK
clk => ParallelTransmitBuffer[0].CLK
clk => ControlByteTransmitFlag.CLK
clk => parallel_send~reg0.CLK
clk => reset_reg.CLK
clk => sw_ack~reg0.CLK
clk => ControlByte[7].CLK
clk => ControlByte[6].CLK
clk => ControlByte[5].CLK
clk => ControlByte[4].CLK
clk => ControlByte[3].CLK
clk => ControlByte[2].CLK
clk => ControlByte[1].CLK
clk => ControlByte[0].CLK
clk => parallel_ack~reg0.CLK
clk => mach_next~14.IN1
sw_code[0] => ControlByte[0].DATAIN
sw_code[1] => ControlByte[1].DATAIN
sw_code[2] => ControlByte[2].DATAIN
sw_code[3] => ControlByte[3].DATAIN
sw_code[4] => ControlByte[4].DATAIN
sw_code[5] => ControlByte[5].DATAIN
sw_code[6] => ControlByte[6].DATAIN
sw_code[7] => ControlByte[7].DATAIN
sw_int => ControlByteTransmitFlag~8.OUTPUTSELECT
sw_int => mach_next~2.DATAB
sw_int => Select~33.IN1
sw_int => Select~2.IN19
sw_ack <= sw_ack~reg0.DB_MAX_OUTPUT_PORT_TYPE
lamp_wr <= lamp_wr~reg0.DB_MAX_OUTPUT_PORT_TYPE
lamp_data[0] <= backbyte[0].DB_MAX_OUTPUT_PORT_TYPE
lamp_data[1] <= backbyte[1].DB_MAX_OUTPUT_PORT_TYPE
lamp_data[2] <= backbyte[2].DB_MAX_OUTPUT_PORT_TYPE
lamp_data[3] <= backbyte[3].DB_MAX_OUTPUT_PORT_TYPE
lamp_data[4] <= backbyte[4].DB_MAX_OUTPUT_PORT_TYPE
lamp_data[5] <= backbyte[5].DB_MAX_OUTPUT_PORT_TYPE
lamp_data[6] <= backbyte[6].DB_MAX_OUTPUT_PORT_TYPE
lamp_data[7] <= backbyte[7].DB_MAX_OUTPUT_PORT_TYPE
parallel_rd[0] => Select~10.IN1
parallel_rd[1] => Select~9.IN1
parallel_rd[2] => Select~8.IN1
parallel_rd[3] => Select~7.IN1
parallel_rd[4] => Select~6.IN1
parallel_rd[5] => Select~5.IN1
parallel_rd[6] => Select~4.IN1
parallel_rd[7] => Select~3.IN1
parallel_busy => Select~2.IN2
parallel_busy => ParallelTransmitBuffer~0.OUTPUTSELECT
parallel_busy => ParallelTransmitBuffer~1.OUTPUTSELECT
parallel_busy => ParallelTransmitBuffer~2.OUTPUTSELECT
parallel_busy => ParallelTransmitBuffer~3.OUTPUTSELECT
parallel_busy => ParallelTransmitBuffer~4.OUTPUTSELECT
parallel_busy => ParallelTransmitBuffer~5.OUTPUTSELECT
parallel_busy => ParallelTransmitBuffer~6.OUTPUTSELECT
parallel_busy => ParallelTransmitBuffer~7.OUTPUTSELECT
parallel_busy => ControlByteTransmitFlag~0.OUTPUTSELECT
parallel_busy => mach_next~9.DATAB
parallel_full => Select~0.IN1
parallel_full => mach_next~13.DATAB
parallel_full => mach_next~12.DATAB
parallel_tr[0] <= ParallelTransmitBuffer[0].DB_MAX_OUTPUT_PORT_TYPE
parallel_tr[1] <= ParallelTransmitBuffer[1].DB_MAX_OUTPUT_PORT_TYPE
parallel_tr[2] <= ParallelTransmitBuffer[2].DB_MAX_OUTPUT_PORT_TYPE
parallel_tr[3] <= ParallelTransmitBuffer[3].DB_MAX_OUTPUT_PORT_TYPE
parallel_tr[4] <= ParallelTransmitBuffer[4].DB_MAX_OUTPUT_PORT_TYPE
parallel_tr[5] <= ParallelTransmitBuffer[5].DB_MAX_OUTPUT_PORT_TYPE
parallel_tr[6] <= ParallelTransmitBuffer[6].DB_MAX_OUTPUT_PORT_TYPE
parallel_tr[7] <= ParallelTransmitBuffer[7].DB_MAX_OUTPUT_PORT_TYPE
parallel_send <= parallel_send~reg0.DB_MAX_OUTPUT_PORT_TYPE
parallel_ack <= parallel_ack~reg0.DB_MAX_OUTPUT_PORT_TYPE
reset_n <= reset_reg.DB_MAX_OUTPUT_PORT_TYPE
search_start_cmd <= SearchStart.DB_MAX_OUTPUT_PORT_TYPE
search_stop_cmd <= SearchStop.DB_MAX_OUTPUT_PORT_TYPE


|fpga313czkz|lamp:m3
clk => clk~0.IN1
lamp_wr_cmd => lamp_wr_cmd~0.IN1
reset_n => reset_n~0.IN1
lamp_test => lamp_out~0.OUTPUTSELECT
lamp_test => lamp_out~1.OUTPUTSELECT
lamp_test => lamp_out~2.OUTPUTSELECT
lamp_test => lamp_out~3.OUTPUTSELECT
lamp_test => lamp_out~4.OUTPUTSELECT
lamp_test => lamp_out~5.OUTPUTSELECT
lamp_test => lamp_out~6.OUTPUTSELECT
lamp_test => lamp_out~7.OUTPUTSELECT
lamp_test => lamp_out~8.OUTPUTSELECT
lamp_test => lamp_out~9.OUTPUTSELECT
lamp_test => lamp_out~10.OUTPUTSELECT
lamp_test => lamp_out~11.OUTPUTSELECT
lamp_test => lamp_out~12.OUTPUTSELECT
lamp_test => lamp_out~13.OUTPUTSELECT
lamp_test => lamp_out~14.OUTPUTSELECT
lamp_test => lamp_out~15.OUTPUTSELECT
lamp_test => lamp_out~16.OUTPUTSELECT
lamp_test => lamp_out~17.OUTPUTSELECT
lamp_test => lamp_out~18.OUTPUTSELECT
lamp_test => lamp_out~19.OUTPUTSELECT
lamp_test => lamp_out~20.OUTPUTSELECT
lamp_test => lamp_out~21.OUTPUTSELECT
lamp_test => lamp_out~22.OUTPUTSELECT
lamp_test => lamp_out~23.OUTPUTSELECT
lamp_test => lamp_out~24.OUTPUTSELECT
lamp_test => lamp_out~25.OUTPUTSELECT
lamp_test => lamp_out~26.OUTPUTSELECT
lamp_test => lamp_out~27.OUTPUTSELECT
lamp_test => lamp_out~28.OUTPUTSELECT
lamp_test => lamp_out~29.OUTPUTSELECT
lamp_test => lamp_out~30.OUTPUTSELECT
lamp_test => lamp_out~31.OUTPUTSELECT
lamp_test => lamp_out~32.OUTPUTSELECT
lamp_test => lamp_out~33.OUTPUTSELECT
lamp_test => lamp_out~34.OUTPUTSELECT
lamp_test => lamp_out~35.OUTPUTSELECT
lamp_test => lamp_out~36.OUTPUTSELECT
lamp_test => lamp_out~37.OUTPUTSELECT
lamp_test => lamp_out~38.OUTPUTSELECT
lamp_test => lamp_out~39.OUTPUTSELECT
lamp_test => lamp_out~40.OUTPUTSELECT
lamp_test => lamp_out~41.OUTPUTSELECT
lamp_test => lamp_out~42.OUTPUTSELECT
lamp_test => lamp_out~43.OUTPUTSELECT
lamp_test => lamp_out~44.OUTPUTSELECT
lamp_test => lamp_out~45.OUTPUTSELECT
lamp_test => lamp_out~46.OUTPUTSELECT
lamp_test => lamp_out~47.OUTPUTSELECT
lamp_test => lamp_out~48.OUTPUTSELECT
lamp_test => lamp_out~49.OUTPUTSELECT
lamp_test => lamp_out~50.OUTPUTSELECT
lamp_test => lamp_out~51.OUTPUTSELECT
lamp_test => lamp_out~52.OUTPUTSELECT
lamp_test => lamp_out~53.OUTPUTSELECT
lamp_test => lamp_out~54.OUTPUTSELECT
lamp_test => lamp_out~55.OUTPUTSELECT
lamp_test => lamp_out~56.OUTPUTSELECT
lamp_test => lamp_out~57.OUTPUTSELECT
lamp_test => lamp_out~58.OUTPUTSELECT
lamp_test => lamp_out~59.OUTPUTSELECT
lamp_test => lamp_out~60.OUTPUTSELECT
lamp_test => lamp_out~61.OUTPUTSELECT
lamp_test => lamp_out~62.OUTPUTSELECT
lamp_test => lamp_out~63.OUTPUTSELECT
lamp_test => lamp_out~64.OUTPUTSELECT
lamp_in[0] => lamp_address[0].IN1
lamp_in[1] => lamp_address[1].IN1
lamp_in[2] => lamp_address[2].IN1
lamp_in[3] => lamp_address[3].IN1
lamp_in[4] => lamp_address[4].IN1
lamp_in[5] => lamp_address[5].IN1
lamp_in[6] => lamp_address[6].IN1
lamp_in[7] => lamp_state.IN1
lamp_out[1] <= lamp_out~64.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[2] <= lamp_out~63.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[3] <= lamp_out~62.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[4] <= lamp_out~61.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[5] <= lamp_out~60.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[6] <= lamp_out~59.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[7] <= lamp_out~58.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[8] <= lamp_out~57.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[9] <= lamp_out~56.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[10] <= lamp_out~55.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[11] <= lamp_out~54.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[12] <= lamp_out~53.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[13] <= lamp_out~52.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[14] <= lamp_out~51.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[15] <= lamp_out~50.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[16] <= lamp_out~49.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[17] <= lamp_out~48.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[18] <= lamp_out~47.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[19] <= lamp_out~46.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[20] <= lamp_out~45.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[21] <= lamp_out~44.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[22] <= lamp_out~43.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[23] <= lamp_out~42.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[24] <= lamp_out~41.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[25] <= lamp_out~40.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[26] <= lamp_out~39.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[27] <= lamp_out~38.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[28] <= lamp_out~37.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[29] <= lamp_out~36.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[30] <= lamp_out~35.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[31] <= lamp_out~34.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[32] <= lamp_out~33.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[33] <= lamp_out~32.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[34] <= lamp_out~31.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[35] <= lamp_out~30.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[36] <= lamp_out~29.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[37] <= lamp_out~28.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[38] <= lamp_out~27.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[39] <= lamp_out~26.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[40] <= lamp_out~25.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[41] <= lamp_out~24.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[42] <= lamp_out~23.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[43] <= lamp_out~22.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[44] <= lamp_out~21.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[45] <= lamp_out~20.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[46] <= lamp_out~19.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[47] <= lamp_out~18.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[48] <= lamp_out~17.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[49] <= lamp_out~16.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[50] <= lamp_out~15.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[51] <= lamp_out~14.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[52] <= lamp_out~13.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[53] <= lamp_out~12.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[54] <= lamp_out~11.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[55] <= lamp_out~10.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[56] <= lamp_out~9.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[57] <= lamp_out~8.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[58] <= lamp_out~7.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[59] <= lamp_out~6.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[60] <= lamp_out~5.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[61] <= lamp_out~4.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[62] <= lamp_out~3.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[63] <= lamp_out~2.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[64] <= lamp_out~1.DB_MAX_OUTPUT_PORT_TYPE
lamp_out[65] <= lamp_out~0.DB_MAX_OUTPUT_PORT_TYPE


|fpga313czkz|lamp:m3|lighten_en:u1
lamp_wr => lamp_en~0.IN0
lamp_wr => lamp_en~1.IN0
lamp_wr => lamp_en~2.IN0
lamp_wr => lamp_en~3.IN0
lamp_wr => lamp_en~4.IN0
lamp_wr => lamp_en~5.IN0
lamp_wr => lamp_en~6.IN0
lamp_wr => lamp_en~7.IN0
lamp_wr => lamp_en~8.IN0