fpga313czkz.tan.qmsg

windowsxp/2000下驱动程序开发软件winddriver6.0

{ "Info" "ITAN_SLACK_ANALYSIS" "" "Info: Found timing assignments -- calculating delays" {  } {  } 0}
{ "Info" "ITAN_CLOCK_OFFSET_DETECTED" "clk_in clk_1us 6.4 ns " "Info: Using auto detected offset of 6.4 ns between base clock \"clk_in\" and derived clock \"clk_1us\" because no offset is specified" {  } {  } 0}
{ "Info" "ITDB_FULL_SLACK_RESULT" "clk_1us register search_panel:m1\|scan_reg8:scan2\|q\[0\] register search_panel:m1\|key_reg 961.4 ns " "Info: Slack time is 961.4 ns for clock \"clk_1us\" between source register \"search_panel:m1\|scan_reg8:scan2\|q\[0\]\" and destination register \"search_panel:m1\|key_reg\"" { { "Info" "ITDB_SIMPLE_FMAX_RESULT" "25.91 MHz 38.6 ns " "Info: Fmax is 25.91 MHz (period= 38.6 ns)" {  } {  } 0} { "Info" "ITDB_FULL_P2P_REQUIREMENT_RESULT" "996.400 ns + Largest register register " "Info: + Largest register to register requirement is 996.400 ns" { { "Info" "ITDB_FULL_SETUP_REQUIREMENT" "1000.000 ns + " "Info: + Setup relationship between source and destination is 1000.000 ns" { { "Info" "ITDB_EDGE_RESULT" "+ Latch 1006.400 ns " "Info: + Latch edge is 1006.400 ns" { { "Info" "ITDB_CLOCK_SETTING_RESULT" "Destination clk_1us 1000.000 ns 6.400 ns  50 " "Info: Clock period of Destination clock \"clk_1us\" is 1000.000 ns with  offset of 6.400 ns and duty cycle of 50" {  } {  } 0} { "Info" "ITDB_MULTICYCLE_RESULT" "Destination Setup 1 " "Info: Multicycle Setup factor for Destination register is 1" {  } {  } 0}  } {  } 0} { "Info" "ITDB_EDGE_RESULT" "- Launch 6.400 ns " "Info: - Launch edge is 6.400 ns" { { "Info" "ITDB_CLOCK_SETTING_RESULT" "Source clk_1us 1000.000 ns 6.400 ns  50 " "Info: Clock period of Source clock \"clk_1us\" is 1000.000 ns with  offset of 6.400 ns and duty cycle of 50" {  } {  } 0} { "Info" "ITDB_MULTICYCLE_RESULT" "Source Setup 1 " "Info: Multicycle Setup factor for Source register is 1" {  } {  } 0}  } {  } 0}  } {  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns + Largest " "Info: + Largest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk_1us destination 6.000 ns + Shortest register " "Info: + Shortest clock path from clock \"clk_1us\" to destination register is 6.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns clk_1us 1 CLK LC1_E13 370 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC1_E13; Fanout = 370; CLK Node = 'clk_1us'" {  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "" { clk_1us } "NODE_NAME" } "" } } { "fpga313czkz.v" "" { Text "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/fpga313czkz.v" 88 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(6.000 ns) + CELL(0.000 ns) 6.000 ns search_panel:m1\|key_reg 2 REG LC3_D2 8 " "Info: 2: + IC(6.000 ns) + CELL(0.000 ns) = 6.000 ns; Loc. = LC3_D2; Fanout = 8; REG Node = 'search_panel:m1\|key_reg'" {  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "6.000 ns" { clk_1us search_panel:m1|key_reg } "NODE_NAME" } "" } } { "search_panel.v" "" { Text "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/search_panel.v" 169 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.000 ns 100.00 % " "Info: Total interconnect delay = 6.000 ns ( 100.00 % )" {  } {  } 0}  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "6.000 ns" { clk_1us search_panel:m1|key_reg } "NODE_NAME" } "" } } { "d:/quartus5.0/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus5.0/bin/Technology_Viewer.qrui" "6.000 ns" { clk_1us search_panel:m1|key_reg } { 0.000ns 6.000ns } { 0.000ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk_1us source 6.000 ns - Longest register " "Info: - Longest clock path from clock \"clk_1us\" to source register is 6.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns clk_1us 1 CLK LC1_E13 370 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC1_E13; Fanout = 370; CLK Node = 'clk_1us'" {  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "" { clk_1us } "NODE_NAME" } "" } } { "fpga313czkz.v" "" { Text "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/fpga313czkz.v" 88 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(6.000 ns) + CELL(0.000 ns) 6.000 ns search_panel:m1\|scan_reg8:scan2\|q\[0\] 2 REG LC1_C18 2 " "Info: 2: + IC(6.000 ns) + CELL(0.000 ns) = 6.000 ns; Loc. = LC1_C18; Fanout = 2; REG Node = 'search_panel:m1\|scan_reg8:scan2\|q\[0\]'" {  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "6.000 ns" { clk_1us search_panel:m1|scan_reg8:scan2|q[0] } "NODE_NAME" } "" } } { "scan_reg8.v" "" { Text "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/scan_reg8.v" 5 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.000 ns 100.00 % " "Info: Total interconnect delay = 6.000 ns ( 100.00 % )" {  } {  } 0}  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "6.000 ns" { clk_1us search_panel:m1|scan_reg8:scan2|q[0] } "NODE_NAME" } "" } } { "d:/quartus5.0/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus5.0/bin/Technology_Viewer.qrui" "6.000 ns" { clk_1us search_panel:m1|scan_reg8:scan2|q[0] } { 0.000ns 6.000ns } { 0.000ns 0.000ns } } }  } 0}  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "6.000 ns" { clk_1us search_panel:m1|key_reg } "NODE_NAME" } "" } } { "d:/quartus5.0/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus5.0/bin/Technology_Viewer.qrui" "6.000 ns" { clk_1us search_panel:m1|key_reg } { 0.000ns 6.000ns } { 0.000ns 0.000ns } } } { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "6.000 ns" { clk_1us search_panel:m1|scan_reg8:scan2|q[0] } "NODE_NAME" } "" } } { "d:/quartus5.0/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus5.0/bin/Technology_Viewer.qrui" "6.000 ns" { clk_1us search_panel:m1|scan_reg8:scan2|q[0] } { 0.000ns 6.000ns } { 0.000ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.100 ns - " "Info: - Micro clock to output delay of source is 1.100 ns" {  } { { "scan_reg8.v" "" { Text "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/scan_reg8.v" 5 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "2.500 ns - " "Info: - Micro setup delay of destination is 2.500 ns" {  } { { "search_panel.v" "" { Text "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/search_panel.v" 169 -1 0 } }  } 0}  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "6.000 ns" { clk_1us search_panel:m1|key_reg } "NODE_NAME" } "" } } { "d:/quartus5.0/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus5.0/bin/Technology_Viewer.qrui" "6.000 ns" { clk_1us search_panel:m1|key_reg } { 0.000ns 6.000ns } { 0.000ns 0.000ns } } } { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "6.000 ns" { clk_1us search_panel:m1|scan_reg8:scan2|q[0] } "NODE_NAME" } "" } } { "d:/quartus5.0/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus5.0/bin/Technology_Viewer.qrui" "6.000 ns" { clk_1us search_panel:m1|scan_reg8:scan2|q[0] } { 0.000ns 6.000ns } { 0.000ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "35.000 ns - Longest register register " "Info: - Longest register to register delay is 35.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns search_panel:m1\|scan_reg8:scan2\|q\[0\] 1 REG LC1_C18 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC1_C18; Fanout = 2; REG Node = 'search_panel:m1\|scan_reg8:scan2\|q\[0\]'" {  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "" { search_panel:m1|scan_reg8:scan2|q[0] } "NODE_NAME" } "" } } { "scan_reg8.v" "" { Text "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/scan_reg8.v" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.700 ns) + CELL(1.800 ns) 5.500 ns search_panel:m1\|Mux~558 2 COMB LC8_D23 1 " "Info: 2: + IC(3.700 ns) + CELL(1.800 ns) = 5.500 ns; Loc. = LC8_D23; Fanout = 1; COMB Node = 'search_panel:m1\|Mux~558'" {  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "5.500 ns" { search_panel:m1|scan_reg8:scan2|q[0] search_panel:m1|Mux~558 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.600 ns) + CELL(2.300 ns) 8.400 ns search_panel:m1\|Mux~559 3 COMB LC1_D23 1 " "Info: 3: + IC(0.600 ns) + CELL(2.300 ns) = 8.400 ns; Loc. = LC1_D23; Fanout = 1; COMB Node = 'search_panel:m1\|Mux~559'" {  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "2.900 ns" { search_panel:m1|Mux~558 search_panel:m1|Mux~559 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.000 ns) + CELL(2.300 ns) 14.700 ns search_panel:m1\|Mux~562 4 COMB LC6_C5 1 " "Info: 4: + IC(4.000 ns) + CELL(2.300 ns) = 14.700 ns; Loc. = LC6_C5; Fanout = 1; COMB Node = 'search_panel:m1\|Mux~562'" {  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "6.300 ns" { search_panel:m1|Mux~559 search_panel:m1|Mux~562 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.600 ns) + CELL(2.300 ns) 17.600 ns search_panel:m1\|Mux~565 5 COMB LC1_C5 1 " "Info: 5: + IC(0.600 ns) + CELL(2.300 ns) = 17.600 ns; Loc. = LC1_C5; Fanout = 1; COMB Node = 'search_panel:m1\|Mux~565'" {  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "2.900 ns" { search_panel:m1|Mux~562 search_panel:m1|Mux~565 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.800 ns) + CELL(1.800 ns) 22.200 ns search_panel:m1\|Mux~566 6 COMB LC6_C20 1 " "Info: 6: + IC(2.800 ns) + CELL(1.800 ns) = 22.200 ns; Loc. = LC6_C20; Fanout = 1; COMB Node = 'search_panel:m1\|Mux~566'" {  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "4.600 ns" { search_panel:m1|Mux~565 search_panel:m1|Mux~566 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.600 ns) + CELL(2.300 ns) 25.100 ns search_panel:m1\|Mux~577 7 COMB LC1_C20 1 " "Info: 7: + IC(0.600 ns) + CELL(2.300 ns) = 25.100 ns; Loc. = LC1_C20; Fanout = 1; COMB Node = 'search_panel:m1\|Mux~577'" {  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "2.900 ns" { search_panel:m1|Mux~566 search_panel:m1|Mux~577 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.900 ns) + CELL(1.800 ns) 30.800 ns search_panel:m1\|Select~5360 8 COMB LC2_D2 1 " "Info: 8: + IC(3.900 ns) + CELL(1.800 ns) = 30.800 ns; Loc. = LC2_D2; Fanout = 1; COMB Node = 'search_panel:m1\|Select~5360'" {  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "5.700 ns" { search_panel:m1|Mux~577 search_panel:m1|Select~5360 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.600 ns) + CELL(1.800 ns) 33.200 ns search_panel:m1\|Select~5290 9 COMB LC4_D2 1 " "Info: 9: + IC(0.600 ns) + CELL(1.800 ns) = 33.200 ns; Loc. = LC4_D2; Fanout = 1; COMB Node = 'search_panel:m1\|Select~5290'" {  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "2.400 ns" { search_panel:m1|Select~5360 search_panel:m1|Select~5290 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.600 ns) + CELL(1.200 ns) 35.000 ns search_panel:m1\|key_reg 10 REG LC3_D2 8 " "Info: 10: + IC(0.600 ns) + CELL(1.200 ns) = 35.000 ns; Loc. = LC3_D2; Fanout = 8; REG Node = 'search_panel:m1\|key_reg'" {  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "1.800 ns" { search_panel:m1|Select~5290 search_panel:m1|key_reg } "NODE_NAME" } "" } } { "search_panel.v" "" { Text "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/search_panel.v" 169 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "17.600 ns 50.29 % " "Info: Total cell delay = 17.600 ns ( 50.29 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "17.400 ns 49.71 % " "Info: Total interconnect delay = 17.400 ns ( 49.71 % )" {  } {  } 0}  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "35.000 ns" { search_panel:m1|scan_reg8:scan2|q[0] search_panel:m1|Mux~558 search_panel:m1|Mux~559 search_panel:m1|Mux~562 search_panel:m1|Mux~565 search_panel:m1|Mux~566 search_panel:m1|Mux~577 search_panel:m1|Select~5360 search_panel:m1|Select~5290 search_panel:m1|key_reg } "NODE_NAME" } "" } } { "d:/quartus5.0/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus5.0/bin/Technology_Viewer.qrui" "35.000 ns" { search_panel:m1|scan_reg8:scan2|q[0] search_panel:m1|Mux~558 search_panel:m1|Mux~559 search_panel:m1|Mux~562 search_panel:m1|Mux~565 search_panel:m1|Mux~566 search_panel:m1|Mux~577 search_panel:m1|Select~5360 search_panel:m1|Select~5290 search_panel:m1|key_reg } { 0.000ns 3.700ns 0.600ns 4.000ns 0.600ns 2.800ns 0.600ns 3.900ns 0.600ns 0.600ns } { 0.000ns 1.800ns 2.300ns 2.300ns 2.300ns 1.800ns 2.300ns 1.800ns 1.800ns 1.200ns } } }  } 0}  } { { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "6.000 ns" { clk_1us search_panel:m1|key_reg } "NODE_NAME" } "" } } { "d:/quartus5.0/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus5.0/bin/Technology_Viewer.qrui" "6.000 ns" { clk_1us search_panel:m1|key_reg } { 0.000ns 6.000ns } { 0.000ns 0.000ns } } } { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "6.000 ns" { clk_1us search_panel:m1|scan_reg8:scan2|q[0] } "NODE_NAME" } "" } } { "d:/quartus5.0/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus5.0/bin/Technology_Viewer.qrui" "6.000 ns" { clk_1us search_panel:m1|scan_reg8:scan2|q[0] } { 0.000ns 6.000ns } { 0.000ns 0.000ns } } } { "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" "" { Report "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz_cmp.qrpt" Compiler "fpga313czkz" "UNKNOWN" "V1" "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/db/fpga313czkz.quartus_db" { Floorplan "E:/my_work/313/操作控制板_归档/HARDWARE/EPLD/CPV3 FIREWARE/ver6.0/" "" "35.000 ns" { search_panel:m1|scan_reg8:scan2|q[0] search_panel:m1|Mux~558 search_panel:m1|Mux~559 search_panel:m1|Mux~562 search_panel:m1|Mux~565 search_panel:m1|Mux~566 search_panel:m1|Mux~577 search_panel:m1|Select~5360 search_panel:m1|Select~5290 search_panel:m1|key_reg } "NODE_NAME" } "" } } { "d:/quartus5.0/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/quartus5.0/bin/Technology_Viewer.qrui" "35.000 ns" { search_panel:m1|scan_reg8:scan2|q[0] search_panel:m1|Mux~558 search_panel:m1|Mux~559 search_panel:m1|Mux~562 search_panel:m1|Mux~565 search_panel:m1|Mux~566 search_panel:m1|Mux~577 search_panel:m1|Select~5360 search_panel:m1|Select~5290 search_panel:m1|key_reg } { 0.000ns 3.700ns 0.600ns 4.000ns 0.600ns 2.800ns 0.600ns 3.900ns 0.600ns 0.600ns } { 0.000ns 1.800ns 2.300ns 2.300ns 2.300ns 1.800ns 2.300ns 1.800ns 1.800ns 1.200ns } } }  } 0}