📄 syslib.c
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if (IS_PCI_ADDRESS(adrs)) status = sysPciProbe (adrs, mode, length, pVal); /* Handle local bus in architecture-specific manner */ else status = vxMemArchProbe (adrs, mode, length, pVal); /* Clear any errors/exceptions before exiting */ sysProbeErrClr (); return (status); }#ifdef INCLUDE_ATA/******************************************************************************* sysInByteString - reads a string of bytes from an io address.** This function reads a byte string from a specified o address.** RETURNS: N/A*/void sysInByteString ( ULONG ioAddr, char * bufPtr, int nBytes ) { int loopCtr; for (loopCtr = 0; loopCtr < nBytes; loopCtr++) *bufPtr++ = *(char *)ioAddr; }/******************************************************************************* sysOutByteString - writes a string of bytes to an io address.** This function writes a byte string to a specified io address.** RETURNS: N/A*/void sysOutByteString ( ULONG ioAddr, char * bufPtr, int nBytes ) { int loopCtr; for (loopCtr = 0; loopCtr < nBytes; loopCtr++) *(char *)ioAddr = *bufPtr++; EIEIO; }/******************************************************************************* sysInWordString - reads a string of words from an io address.** This function reads a word string from a specified io address.** RETURNS: N/A*/void sysInWordString ( ULONG ioAddr, UINT16 * bufPtr, int nWords ) { int loopCtr; for (loopCtr = 0; loopCtr < nWords; loopCtr++) *bufPtr++ = *(short *)ioAddr; }/******************************************************************************* sysInWordStringRev - reads a string of words that are byte reversed** This function reads a string of words that are byte reversed from a* specified io address.** RETURNS: N/A*/void sysInWordStringRev ( ULONG ioAddr, UINT16 * bufPtr, int nWords ) { int loopCtr; for (loopCtr = 0; loopCtr < nWords; loopCtr++) *bufPtr++ = PCI_IN_WORD(ioAddr); }/******************************************************************************* sysOutWordString - writes a string of words to an io address.** This function writes a word string from a specified io address.** RETURNS: N/A*/void sysOutWordString ( ULONG ioAddr, UINT16 * bufPtr, int nWords ) { int loopCtr; for (loopCtr = 0; loopCtr < nWords; loopCtr++) *(short *)ioAddr = *bufPtr++; EIEIO; }/******************************************************************************* sysInLongString - reads a string of longwords from an io address.** This function reads a longword string from a specified io address.** RETURNS: N/A*/void sysInLongString ( ULONG ioAddr, ULONG * bufPtr, int nLongs ) { int loopCtr; for (loopCtr = 0; loopCtr < nLongs; loopCtr++) *bufPtr++ = *(int *)ioAddr; }/******************************************************************************* sysOutLongString - writes a string of longwords to an io address.** This function writes a longword string from a specified io address.** RETURNS: N/A*/void sysOutLongString ( ULONG ioAddr, ULONG * bufPtr, int nLongs ) { int loopCtr; for (loopCtr = 0; loopCtr < nLongs; loopCtr++) *(int *)ioAddr = *bufPtr++; EIEIO; }#endif /* INCLUDE_ATA *//****************************************************************************** sysDynEnetFind - Find ethernet network device dynamically** This function dynamically finds the ethernet network device. The* encoded identification structure, 'pciId' is returned if the* device is found. The constraints of the search require that the* device found be on the PCI bus number which matches the 'bus',* 'device' and 'function' input parameters. ** RETURNS: OK if ethernet device is found, ERROR otherwise*/STATUS sysDynEnetFind ( UINT bus, /* input: bus number on which to look */ UINT device, /* input: device number to match */ UINT function, /* input: function number to match */ PCI_ID * pciId /* output: encoded identification structure */ ) { UINT findClass; UINT pciBus; UINT pciDevice; UINT pciFunc; UINT devVend; UINT index = 0; STATUS status = ERROR; findClass = (UINT)((PCI_CLASS_NETWORK_CTLR << 16) | (PCI_SUBCLASS_NET_ETHERNET << 8) | (0 << 0) /* Prog I/F = 0 */ ); while (pciFindClass(findClass, index, (int *)&pciBus, (int *)&pciDevice, (int *)&pciFunc) == OK) { if ((pciBus == bus) && (pciDevice == device) && (pciFunc == function)) { pciConfigInLong (pciBus, pciDevice, pciFunc, PCI_CFG_VENDOR_ID, &devVend); pciId->loc.bus = pciBus; pciId->loc.device = pciDevice; pciId->loc.function = pciFunc; pciId->devVend = devVend; status = OK; break; } index++; } return (status); }/******************************************************************************* sysPciInsertLong - Insert field into PCI data long** This function writes a field into a PCI data long without altering any bits* not present in the field. It does this by first doing a PCI long read* (into a temporary location) of the PCI data long which contains the field* to be altered. It then alters the bits in the temporary location to match* the desired value of the field. It then writes back the temporary location* with a PCI long write. All PCI accesses are byte and the field to alter is* specified by the "1" bits in the 'bitMask' parameter.** RETURNS: N/A*/void sysPciInsertLong ( UINT32 adrs, /* PCI address */ UINT32 bitMask, /* Mask which defines field to alter */ UINT32 data /* data written to the offset */ ) { UINT32 temp; int key; key = intLock (); temp = sysPciInLong (adrs); temp = (temp & ~bitMask) | (data & bitMask); sysPciOutLong (adrs, temp); intUnlock (key); }/******************************************************************************* sysPciInsertWord - Insert field into PCI data word** This function writes a field into a PCI data word without altering any bits* not present in the field. It does this by first doing a PCI word read* (into a temporary location) of the PCI data word which contains the field* to be altered. It then alters the bits in the temporary location to match* the desired value of the field. It then writes back the temporary location* with a PCI word write. All PCI accesses are word and the field to alter is* specified by the "1" bits in the 'bitMask' parameter.** RETURNS: N/A*/void sysPciInsertWord ( UINT32 adrs, /* PCI address */ UINT16 bitMask, /* Mask which defines field to alter */ UINT16 data /* data written to the offset */ ) { UINT16 temp; int key; key = intLock (); temp = sysPciInWord (adrs); temp = (temp & ~bitMask) | (data & bitMask); sysPciOutWord (adrs, temp); intUnlock (key); }/******************************************************************************* sysPciInsertByte - Insert field into PCI data byte** This function writes a field into a PCI data byte without altering any bits* not present in the field. It does this by first doing a PCI byte read* (into a temporary location) of the PCI data byte which contains the field* to be altered. It then alters the bits in the temporary location to match* the desired value of the field. It then writes back the temporary location* with a PCI byte write. All PCI accesses are byte and the field to alter is* specified by the "1" bits in the 'bitMask' parameter.** RETURNS: N/A*/void sysPciInsertByte ( UINT32 adrs, /* PCI address */ UINT8 bitMask, /* Mask which defines field to alter */ UINT8 data /* data written to the offset */ ) { UINT8 temp; int key; key = intLock (); temp = sysPciInByte (adrs); temp = (temp & ~bitMask) | (data & bitMask); sysPciOutByte (adrs, temp); intUnlock (key); }/******************************************************************************* sysPciOutByteConfirm - Byte out to PCI memory space and flush buffers.** This function outputs a byte to PCI memory space and then flushes the PCI* write posting buffers by reading from the target address. Since the PCI* spec requires the completion of posted writes before the completion of delayed* reads, when the read completes, the write posting buffers have been flushed.** NOTE: If the write is performed through a PCI-to-PCI bridge to a shared* location that is subject to unprotected access by multiple simultaneous* processors, there is the possibility that the bridge will deliver a delayed* read completion to a PCI bus master which was not the original initiator of* the delayed read. When this occurs, it appears as if a PCI delayed read had* passed a posted write, which would violate PCI transaction ordering rules.* If this is a concern, an additional read must be performed outside of this* routine to guarantee that the confirming read performed in this routine was* not aliased.** RETURNS: N/A*/void sysPciOutByteConfirm ( UINT32 adrs, /* PCI address */ UINT8 data /* data to be written */ ) { UINT8 temp; sysPciOutByte (adrs, data); temp = sysPciInByte (adrs); }/******************************************************************************* sysPciOutWordConfirm - Word out to PCI memory space and flush buffers.** This function outputs a word to PCI memory space and then flushes the PCI* write posting buffers by reading from the target address. Since the PCI* spec requires the completion of posted writes before the completion of delayed* reads, when the read completes, the write posting buffers have been flushed.** NOTE: If the write is performed through a PCI-to-PCI bridge to a shared* location that is subject to unprotected access by multiple simultaneous* processors, there is the possibility that the bridge will deliver a delayed* read completion to a PCI bus master which was not the original initiator of* the delayed read. When this occurs, it appears as if a PCI delayed read had* passed a posted write, which would violate PCI transaction ordering rules.* If this is a concern, an additional read must be performed outside of this* routine to guarantee that the confirming read performed in this routine was* not aliased.** RETURNS: N/A*/void sysPciOutWordConfirm ( UINT32 adrs, /* PCI address */ UINT16 data /* data to be written */ ) { UINT16 temp; sysPciOutWord (adrs, data); temp = sysPciInWord (adrs); }/******************************************************************************* sysPciOutLongConfirm - Long word out to PCI memory space and flush buffers.** This function outputs a long word to PCI memory space and then flushes the* PCI write posting buffers by reading from the target address. Since the PCI* spec requires the completion of posted writes before the completion of delayed* reads, when the read completes, the write posting buffers have been flushed.** NOTE: If the write is performed through a PCI-to-PCI bridge to a shared* location that is subject to unprotected access by multiple simultaneous* processors, there is the possibility that the bridge will deliver a delayed* read completion to a PCI bus master which was not the original initiator of* the delayed read. When this occurs, it appears as if a PCI delayed read had* passed a posted write, which would violate PCI transaction ordering rules.* If this is a concern, an additional read must be performed outside of this* routine to guarantee that the confirming read performed in this routine was* not aliased.** RETURNS: N/A*/void sysPciOutLongConfirm ( UINT32 adrs, /* PCI address */ UINT32 data /* data to be written */ ) { UINT32 temp; sysPciOutLong (adrs, data); temp = sysPciInLong (adrs); }#ifdef INCLUDE_DPE/******************************************************************************* sysConfigDpe - configure processor bus data parity** This function configures processor data parity checking. Parity checking must* be enabled in 3 places: 1) Processor, 2) Falcon pair, and 3) Raven. It assumes* that the default VxWorks machine check exception handler is installed to catch* and display processor data bus parity errors.** RETURNS: OK if parity enabled, ERROR otherwise.*/STATUS sysConfigDpe(void) { UINT8 ravenRev; UINT8 parEna; UINT16 meren; /* verify that the raven version is correct */ ravenRev = sysInByte (RAVEN_ADDR(RAVEN_MPC_REVID)); if ( ravenRev < RAVEN_MIN_DPE_REV ) return (ERROR); /* * clear falcon and raven processor data bus parity errors to prevent * a trigger due to a pre-existing error. */ sysOutByte (FALCON_ADDR(FALCON_DPE_LOG_REG), FALCON_DPELOG); sysOutByte (RAVEN_ADDR(RAVEN_MPC_MERST), RAVEN_MPC_MERST_MDPE); /* * enable machine check exceptions here so a processor detected error * will cause a machine check instead of a check stop. */ vxMsrSet ( vxMsrGet () | _PPC_MSR_ME); /* enable CPU processor parity generation */ vxHid0Set ( vxHid0Get () & ~_PPC_HID0_DBP ); /* * enable CPU processor data bus parity checking and the machine check * pin. */ vxHid0Set ( vxHid0Get () | (_PPC_HID0_EBD | _PPC_HID0_EMCP) ); /* enable falcon processor data bus parity checking */ parEna = sysInByte (FALCON_ADDR(FALCON_DPE_ENA_REG)); parEna |= (FALCON_DPE_CKALL | FALCON_DPE_ME); sysOutByte (FALCON_ADDR(FALCON_DPE_ENA_REG), parEna); /* enable raven processor data bus parity checking */ meren = sysIn16 ((UINT16 *)RAVEN_ADDR(RAVEN_MPC_MEREN)); meren |= RAVEN_MPC_MEREN_MDPEM; sysOut16 ((UINT16 *)RAVEN_ADDR(RAVEN_MPC_MEREN), meren); /* indicate success */ return (OK); }#endif /* INCLUDE_DPE */
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