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📄 sysscsi.c

📁 mtx604在vxworks下的bsp源代码
💻 C
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/* sysScsi.c - Motorola MVME2600 series SCSI-2 initialization for sysLib.c *//* Copyright 1984-2000 Wind River Systems, Inc. *//* Copyright 1996,1997,1998,1999 Motorola, Inc., All Rights Reserved */#include "copyright_wrs.h"/*modification history--------------------01a,09nov00,dat  new version just for MTX, (from mcp750, ver 01p)*//* DescriptionThis file contains the sysScsiInit() and related routines necessary forinitializing the SCSI subsystem. It also contains BSP-specific SCSI I/O routines required by the ncr810 driver.The constant PCI2DRAM_BASE_ADRS must be defined in the BSP.*/#ifdef	INCLUDE_SCSI/* includes */#include "drv/scsi/ncr810.h"#include "tapeFsLib.h"/* external declarations */extern int   ncr810PciMemOffset;extern int   ncr810DelayCount;extern ULONG NCR810_INSTRUCTIONS;extern ULONG ncr810Wait[];extern BOOL  scsiDebug;extern void  eieioExecute();extern void  vxEieio ();extern UCHAR sysInByte (ULONG);extern void  sysOutByte (ULONG,UCHAR);#ifdef  INCLUDE_SECONDARY_SCSI/* global declarations */SCSI_CTRL * pSysScsiCtrl2;#endif  /* INCLUDE_SECONDARY_SCSI *//* function declarations */LOCAL void swapScript (UINT32 * start, UINT32 * end);struct ncr810Params {	int devType;  		/* 0 for dynamic detection */	int clockCode;		/* clock speed */	NCR810_HW_REGS hwRegs;  /* register bits */    };    /* * This structure contains the information to setup two  * NCR 8xx controllers.  Each device is a separate entry. * The code below will scan for NCR SCSI controllers and * the first one found will be device 0, and use data from * element 0 of this table.  The second device found will * use data from element 1 of this table. */struct ncr810Params scsiCtlrParams[] = {	{	/* Data for device #0 */#ifdef SCSI_WIDE_ENABLE	0,			/* allow any wide/narrow connection */#else	NCR810_DEVICE_ID,	/* Force a narrow-only connection */#endif	NCR810_40MHZ,	SYS_REG_SIOP_HW_REGS	}#ifdef INCLUDE_SECONDARY_SCSI	/* Data for Device #1 */	,{	0, 			/* Device 1 can be any narrow or wide */	NCR810_40MHZ,	SYS_REG_SIOP_HW_REGS	/* uses same params as device 0 ? */	}#endif    };#define NCR_VENDOR_ID	0x1000		/* NCR Vendor ID */#define SCSI_CTLR_CLASS_ID 0x10000	/* SCSI Ctlr Class ID *//********************************************************************************* sysScsiInit - initialize an on-board SCSI port** This routine creates and initializes an NCR 53C8\f2xx\f1 SCSI I/O* processor (SIOP) structure(s), enabling use of the on-board SCSI port.  It* connects the proper interrupt service routine to the desired vector, and* enables the interrupt at the desired level.** RETURNS: OK, or ERROR if the SIOP structure cannot be created, the* controller cannot be initialized, valid values cannot be set up in the* SIOP registers, or the interrupt service routine cannot be connected.*/ STATUS sysScsiInit ()    {    int			pciBusNo;    int			pciDevNo;    int			pciFuncNo;    UINT16		devType;    static BOOL		firstTime = TRUE;    UINT32 		iobaseCsr;    char 		irq;    NCR_810_SCSI_CTRL *	pScsiCtrl;    int			instance; /* ncr device instance */    int 		ix;	/* index for find class */     /* Set CPU <-> PCI address offset */    ncr810PciMemOffset = PCI2DRAM_BASE_ADRS;    /*      * Since the PCI bus is little endian, and the PPC CPU's are big endian,     * the ncr8xx scripts need to be byte swapped in memory. However, they     * should only be swapped the first time that sysScsiInit() is invoked.     */    if (firstTime)	{        swapScript ((UINT32 *) &ncr810Wait, (UINT32 *) 		    ((UINT32) &ncr810Wait + 		     (UINT32)(NCR810_INSTRUCTIONS * 8)));	firstTime = FALSE;	}    ncr810DelayCount = (sysGetBusSpd () * NCR810_DELAY_MULT);    instance = ix = 0;    while (pciFindClass (SCSI_CTLR_CLASS_ID, ix++, &pciBusNo, &pciDevNo,	    &pciFuncNo) == OK)	{	USHORT vendor;	USHORT deviceId;	if (pciConfigInWord (pciBusNo, pciDevNo, pciFuncNo,				PCI_CFG_VENDOR_ID, &vendor) == OK	 && vendor == NCR_VENDOR_ID)	    {	    pciConfigInWord (pciBusNo, pciDevNo, pciFuncNo,				PCI_CFG_DEVICE_ID, &deviceId);	    SCSI_DEBUG_MSG ("Found SCSI Controller - Ven/Dev ID = 0x%x 0x%x\n",				vendor,deviceId,0,0,0,0);	    /* use forced devType, or read from PCI header */	    devType = scsiCtlrParams[instance].devType;	    if (devType == 0)		devType = deviceId;	    /* read the configuration parameters */	    pciConfigInLong(pciBusNo, pciDevNo, pciFuncNo,				PCI_CFG_BASE_ADDRESS_0, &iobaseCsr);    	    pciConfigInByte(pciBusNo, pciDevNo, pciFuncNo,				PCI_CFG_DEV_INT_LINE, &irq);	    /* Translate bus physical to virtual address */	    iobaseCsr  &= PCI_IOBASE_MASK;	    iobaseCsr  |= ISA_MSTR_IO_LOCAL;	    /* Create the SCSI controller */	    if ((pScsiCtrl = ncr810CtrlCreate 				      (				      (UINT8 *) iobaseCsr,				      scsiCtlrParams[instance].clockCode,				      devType      				      )) == NULL)		{		logMsg ("sysScsiInit: error returned by ncr810CtrlCreate\n",			0,0,0,0,0,0);		return (ERROR);		}	    if (ncr810SetHwRegister (pScsiCtrl,			    &(scsiCtlrParams[instance].hwRegs)) == ERROR)		{		logMsg ("sysScsiInit: error returned by ncr810SetHwRegister\n",			0,0,0,0,0,0);		return (ERROR);		}	    /* connect the SCSI controller's interrupt service routine */	 	    if (intConnect (INUM_TO_IVEC ((int)irq),			    ncr810Intr, (int) pScsiCtrl) == ERROR)		{		logMsg ("sysScsiInit: error returned by intConnect\n",			0,0,0,0,0,0);		return (ERROR);		}	 	    /* Enable SCSI interrupts */	    intEnable (irq);	    /* activate the controller */	    if (ncr810CtrlInit (pScsiCtrl, SCSI_DEF_CTRL_BUS_ID) == ERROR)		{		logMsg ("sysScsiInit: error returned by ncr810CtrlInit\n",			0,0,0,0,0,0);		return (ERROR);		}#if (USER_D_CACHE_MODE &  CACHE_SNOOP_ENABLE)	    scsiCacheSnoopEnable ((SCSI_CTRL *) pScsiCtrl);#else 	    scsiCacheSnoopDisable ((SCSI_CTRL *) pScsiCtrl);#endif	    /* init the global pointer if this is the first */	    if (pSysScsiCtrl == NULL)		pSysScsiCtrl = (SCSI_CTRL *)pScsiCtrl;	    /* Stop searching if we have no more data */	    if (++instance >= NELEMENTS(scsiCtlrParams))		break;	    }	}    /* Include tape support if configured in config.h */ #ifdef  INCLUDE_TAPEFS    tapeFsInit ();                     /* initialise tapeFs */#endif  /* INCLUDE_TAPEFS */     return (OK);    }/********************************************************************************* swapScript - byte swaps the 32 bit NCR8XX scripts** This routine byte swaps 4 byte (32 bit) long scripts instructions due to* the fact that the PPC processor is big endian and the PCI SCSI device is* little endian. ** The two parameters supplied <start> and <end> denote the start of scripts* in memory and the end of the scripts in memory. Note that both these* values are assumed to be on 4 byte boundaries. It is further assumed that* the instructions are located in a writable area of memory.** RETURNS: N/A*/LOCAL void swapScript     (    UINT32 * start,    UINT32 * end    )    {    int size;    UINT32 i;    UINT32 val;    /* determine the size (length) of the scripts */    size = (int) end - (int) start;    if (size % 4)	printf ("Incorrect length (start - end) mod 4 != 0 size: %d\n", size);    /* swap each 4 byte word in memory */    for (i=0; i < (size/4); i ++)	{	val = BYTE_SWAP_32_BIT ( (UINT32) *((UINT32 *) (start + i)) );        *((UINT32 *) start + i) = val;	}    }/********************************************************************************* inOrderExecute - enforce in-order execution of PowerPC accesses** This routine enforces in-order execution of register accesses to the SCSI* I/O processor (SIOP).  It is invoked by the SCSI-2 driver, and is a* wrapper to a PowerPC assembler instruction.** RETURNS: N/A.*/void inOrderExecute ()    {    vxEieio ();  /* defined in vxALib.s */    }/* Data for example code in sysScsiConfig, modify as needed */SCSI_PHYS_DEV *	pSpd20;SCSI_PHYS_DEV *	pSpd31;         /* SCSI_PHYS_DEV ptrs (suffix == ID, LUN) */SCSI_PHYS_DEV *	pSpd40;BLK_DEV *	pSbd0;BLK_DEV *	pSbd1;BLK_DEV *	pSbd2;          /* SCSI_BLK_DEV ptrs for Winchester */BLK_DEV *	pSbdFloppy;     /* ptr to SCSI floppy block device */

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