syslib.c

mtx603在vxworks下的bsp模板源代码

/*******************************************************************************
*
* sysBspRev - return the BSP version and revision number
*
* This routine returns a pointer to a BSP version and revision number, for
* example, 1.1/0. BSP_REV is concatenated to BSP_VERSION and returned.
*
* RETURNS: A pointer to the BSP version/revision string.
*/

char * sysBspRev (void)
    {
    return (BSP_VERSION BSP_REV);
    }


/******************************************************************************
*
* sysHwInit - initialize the system hardware
*
* This routine initializes various features of the CPU board.  It is called
* by usrInit() in usrConfig.c.  This routine sets up the control registers
* and initializes various devices if they are present.
*
* NOTE: This routine should not be called directly by the user application.  It
* cannot be used to initialize interrupt vectors.
*
* RETURNS: N/A
*/

void sysHwInit (void)
    {
#ifdef	INCLUDE_ATA
    int         pciBusNo;       /* PCI bus number */
    int         pciDevNo;       /* PCI device number */
    int         pciFuncNo;      /* PCI function number */
#endif /* INCLUDE_ATA */

    /* Validate CPU type */

    sysCpuCheck ();

    /* Raven init */

    sysRavenInit ();

    /* Super I/O init */

    ns8730xSuperIoInit ();

    /* Initialize PCI driver library. */

    if (pciConfigLibInit (PCI_MECHANISM_1, PCI_PRIMARY_CAR, PCI_PRIMARY_CDR, 0)
        != OK)
        {
        sysToMonitor (BOOT_NO_AUTOBOOT);
        }

    /*
     * Test to determine if we need to configure the PCI busses with
     * sysPciAutoConfig() or if we just need to recreate the configuration
     * list without reconfiguring the busses (pciAutoListCreate()).  If
     * we are coming up from a ROM-based image then we need to reconfigure.
     * If we have been booted from a ROM image then we don't need to
     * reconfigure since the bootrom will already have reconfigured the
     * PCI busses.  We must avoid configuring the PCI busses twice on
     * startup.
     */

    if ( !PCI_AUTOCONFIG_DONE )
	{
        /* in ROM boot phase, OK to continue and configure PCI busses. */

        sysPciAutoConfig ();
        PCI_AUTOCONFIG_FLAG++;	/* Remember that PCI is configured */
	}

    sysDec21x40UpdateLoadStr ();

#ifdef	INCLUDE_ATA
    /*
     *  Initialize the Standard PCI Header of the ATA/EIDE device
     *  if present.
     */

    if (pciFindDevice ((PCI_ID_IDE & 0xFFFF), (PCI_ID_IDE >> 16) & 0xFFFF,
        0, &pciBusNo, &pciDevNo, &pciFuncNo) != ERROR)
        {

	/*
	 *  Due to pciDevConfig() limited ability to program the BARs
	 *  in the PCI Config Header, we will use the 4 default
	 *  (ISA Legacy) BARs.
	 */

        sysAtaInit (pciBusNo, pciDevNo, pciFuncNo);

        }
#endif /* INCLUDE_ATA */
 
    /*
     *  Initialize the extended portion of the Raven's PCI Header.
     *	The non-PCI Config Space registers have already been
     *	initialized in the initial startup code.
     */

    if (pciFindDevice ((PCI_ID_RAVEN & 0xFFFF), (PCI_ID_RAVEN >> 16) & 0xFFFF,
		       0, &sysRavPciBusNo, &sysRavPciDevNo,
                       &sysRavPciFuncNo) != ERROR)
	{
	sysRavenInitPciExt (sysRavPciBusNo, sysRavPciDevNo, 
                                  sysRavPciFuncNo);
	}

#ifndef INCLUDE_MPIC

    /* Initialize the extended portion of the IBC's PCI Header.  */

    if (pciFindDevice ((PCI_ID_IBC & 0xFFFF), (PCI_ID_IBC >> 16) & 0xFFFF, 0,
                       &sysRavPciBusNo, &sysRavPciDevNo, &sysRavPciFuncNo) != ERROR)
        {
        (void)sysPciExtIbcInit(sysRavPciBusNo, sysRavPciDevNo, sysRavPciFuncNo);
        }
#endif /* INCLUDE_MPIC */

    /*
     *  Initialize the non-PCI Config Space registers of the
     *  IBC which doesn't have a true device driver.
     */

    sysIbcInit();

    /*
     *  Reset the MPIC.
     */

    sysPciWrite32( MPIC_ADDR(MPIC_GLOBAL_CONFIG_REG), RESET_CNTRLR );
 
#ifdef INCLUDE_MPIC

    /*
     *  Initialize the non-PCI Config Space registers of the
     *  Raven Mpic.
     */

    sysMpicInit();
#endif /* INCLUDE_MPIC */

    /*
     *	The LANCE has a real driver associated with it, so
     *	no additional initialization is done here.  It's done
     *	at kernel init time.
     *
     *	The SCSI has a real driver associated with it, so
     *	no additional initialization is done here.  It's done
     *	at kernel init time.
     */

    /* set pointer to bus probing hook */

    _func_vxMemProbeHook = (FUNCPTR)sysBusProbe;

    /* Initialize COM1 and COM2 serial channels */

    sysSerialHwInit();

    /*
     * Extract the Ethernet address out of non-volatile RAM.
     * The Motorola convention for the Ethernet address is that they only
     * save the low 3 bytes in BBRAM.  The high three bytes are the
     * manufacturers code, and Motorola software knows its own.
     * The Motorola code is 0x08003Exxx.
     */

    sysNvRamGet ((char *)lnEnetAddr, 6, ((int) BB_ENET - NV_BOOT_OFFSET));

    /* Disable the watchdog timer */

    sysNvWrite ((ULONG)WD_TIMER, 0);

    /*
     * If mmu tables are used, this is where we would dynamically
     * update the entry describing main memory, using sysPhysMemTop().
     * We must call sysPhysMemTop () at sysHwInit() time to do
     * the memory autosizing if available.
     */

    sysPhysMemTop ();

    /* clear Raven error conditions */

    sysRavenErrClr ();

    /* Upon completion, clear BFL (Board Fail) LED */

    *(UINT8 *)z8536_PORTA_DATA &= ~z8536_PORTA_BRDFAIL;
    }


/*******************************************************************************
*
* sysPhysMemTop - get the address of the top of physical memory
*
* This routine returns the address of the first missing byte of memory,
* which indicates the top of memory.
*
* Normally, the user specifies the amount of physical memory with the
* macro LOCAL_MEM_SIZE in config.h.  BSPs that support run-time
* memory sizing do so only if the macro LOCAL_MEM_AUTOSIZE is defined.
* If not defined, then LOCAL_MEM_SIZE is assumed to be, and must be, the
* true size of physical memory.
*
* NOTE: Do no adjust LOCAL_MEM_SIZE to reserve memory for application
* use.  See sysMemTop() for more information on reserving memory.
*
* RETURNS: The address of the top of physical memory.
*
* SEE ALSO: sysMemTop()
*/

char * sysPhysMemTop (void)
    {
    static char * sysPhysMemSize = NULL;	/* ptr to top of mem + 1 */
#ifdef LOCAL_MEM_AUTOSIZE
    UINT32	  dramAttr;
    UINT32	  dramIndex;
    int 	  i;
    static UINT32 dramSize[8] =

    /*
     *   0,         16MB,       32MB,       64MB,
     * 128MB,      256MB,        1GB,         0
     */

    {0x00000000, 0x01000000, 0x02000000, 0x04000000,
     0x08000000, 0x10000000, 0x40000000, 0x00000000};
#endif /* LOCAL_MEM_AUTOSIZE */

    if (sysPhysMemSize == NULL)
	{
#ifdef LOCAL_MEM_AUTOSIZE

	/*
	 * Do dynamic memory sizing.
	 *
	 * Since Falcon memory controller chip has already been set to
	 * control all memory, just read and interpret its DRAM Attributes
	 * Register.
	 */

	dramAttr = sysIn32 ((UINT32 *)FALCON_DRAM_ATTR);
	for (i = 0; i < 4; ++i)
	    {
	    if ((dramAttr & 0x80) != 0)
	        {
		dramIndex = dramAttr & 0x07;
		sysPhysMemSize = (char *)((UINT32)sysPhysMemSize + 
                                  dramSize [dramIndex]);
		}
	    dramAttr >>= 8;
	    }

        /* Adjust initial DRAM size to actual physical memory. */

        sysPhysMemDesc[1].len = (ULONG)sysPhysMemSize -
			        (ULONG)sysPhysMemDesc[1].physicalAddr;

#else /* not LOCAL_MEM_AUTOSIZE */

	/* Don't do auto-sizing, use defined constants. */

	sysPhysMemSize = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE);

#endif /* LOCAL_MEM_AUTOSIZE */
	}

    return sysPhysMemSize;
    }


/*******************************************************************************
*
* sysMemTop - get the address of the top of VxWorks memory
*
* This routine returns a pointer to the first byte of memory not
* controlled or used by VxWorks.
*
* The user can reserve memory space by defining the macro USER_RESERVED_MEM
* in config.h.  This routine returns the address of the reserved memory
* area.  The value of USER_RESERVED_MEM is in bytes.
*
* RETURNS: The address of the top of VxWorks memory.
*/

char * sysMemTop (void)
    {
    static char * memTop = NULL;

    if (memTop == NULL)
	{
	memTop = sysPhysMemTop () - USER_RESERVED_MEM;
	}

    return memTop;
    }


/******************************************************************************
*
* sysToMonitor - transfer control to the ROM monitor
*
* This routine transfers control to the ROM monitor.  Normally, it is called
* only by reboot()--which services ^X--and by bus errors at interrupt level.
* However, in some circumstances, the user may wish to introduce a
* <startType> to enable special boot ROM facilities.
*
* RETURNS: Does not return.
*/

STATUS sysToMonitor
    (
    int startType	/* parameter passed to ROM to tell it how to boot */
    )
    {
    FUNCPTR pRom = (FUNCPTR) (ROM_TEXT_ADRS + 4); /* Warm reboot */

#if defined(INCLUDE_CACHE_SUPPORT) && defined(INCLUDE_CACHE_L2)
    sysL2CacheDisable();	/* Disable the L2 Cache */
#endif
    cacheDisable (0);   	/* Disable the Instruction Cache */
    cacheDisable (1);   	/* Disable the Data Cache */

#if     (CPU == PPC604)
    vxHid0Set (vxHid0Get () & ~_PPC_HID0_SIED);	/* Enable Serial Instr Exec */
#endif  /* (CPU == PPC604) */

    sysSerialReset ();		/* reset serial devices */
    sysRavenErrClr ();		/* clear Raven error conditions */

    /* Clear the MSR */

    vxMsrSet (0);

    (*pRom) (startType);

    return (OK);	/* in case we ever continue from ROM monitor */
    }


/******************************************************************************
*
* sysHwInit2 - initialize additional system hardware
*
* This routine connects system interrupt vectors and configures any 
* required features not configured by sysHwInit().
*
* RETURNS: N/A
*/

void sysHwInit2 (void)
    {
    static BOOL configured = FALSE;

    /* Int connects for various devices */

    if (!configured)
        {
        sysZ8536Init();
        intConnect (INUM_TO_IVEC(Z8536_INT_VEC), sysClkIntCIO, 0);
        intEnable (Z8536_INT_LVL);

#ifdef INCLUDE_RAVEN_AUXCLK
        sysAuxClkInit();
        intConnect (INUM_TO_IVEC(TIMER0_INT_VEC), sysAuxClkInt, 0);
        intEnable(TIMER0_INT_LVL);
#endif /* INCLUDE_RAVEN_AUXCLK */

        /* initialize serial interrupts */

        sysSerialHwInit2();

        /* connect a dummy routine for the spurious interrupt (0x07) */

        intConnect (INUM_TO_IVEC(PP_INT_LVL), sysSpuriousIntHandler, 0);

#ifdef INCLUDE_CACHE_L2
#ifdef INCLUDE_CACHE_SUPPORT
#ifdef USER_L2_CACHE_ENABLE
        /* initialize the L2 cache */

        sysL2CacheInit();
#else
        sysL2CacheDisable();
#endif
#endif
#endif

        configured = TRUE;
        }
    }


/******************************************************************************
*
* sysProcNumGet - get the processor number
*
* This routine returns the processor number for the CPU board, which is
* set with sysProcNumSet().
*
* RETURNS: The processor number for the CPU board.
*
* SEE ALSO: sysProcNumSet()
*/

int sysProcNumGet (void)
    {
    return (sysProcNum);
    }


/******************************************************************************
*
* sysProcNumSet - set the processor number
*
* This routine sets the processor number for the CPU board.  Processor numbers
* should be unique on a single backplane.
*
* RETURNS: N/A
*
* SEE ALSO: sysProcNumGet()
*
*/

void sysProcNumSet
    (
    int 	procNum			/* processor number */
    )
    {

    /*
     *	Init global variable - this needs to be done before
     *	calling sysUniverseInit2() because it calls sysProcNumGet()
     *	via the MACRO definition.
     */

    sysProcNum = procNum;
    }


#ifdef	INCLUDE_ATA
/*******************************************************************************
*
* sysIntEnablePIC - enable an ISA/PCI interrupt
*
* This function call is used to enable an ISA/PCI interrupt.
*
* RETURNS: OK, always.
*/

STATUS sysIntEnablePIC
    (
    int intNum
    )
    {
    return (intEnable (intNum));
    }
#endif	/* INCLUDE_ATA */


/******************************************************************************
*
* sysLanIntEnable - enable the LAN interrupt
*
* This routine enables interrupts at a specified level for the on-board LAN
* chip.  LAN interrupts are controlled by the ISA Bridge Control (IBC)
* chip.  The LANCE chip on this board is on the Peripheral Component
* Interconnect (PCI) bus.  The PCI interrupts should be routed through the
* IBC to the processor.  The LANCE chip asserts PCI IRQ0 which is routed
* to the IBC.  The IBC must be programmed to generate an ISA IRQ10.
*
* RETURNS: OK, or ERROR if network support not included.
*
* SEE ALSO: sysLanIntDisable()
*/

STATUS sysLanIntEnable
    (
    int intLevel 		/* interrupt level to enable */
    )
    {
    intEnable (intLevel);
    return (OK);
    }


/******************************************************************************
*
* sysLanIntDisable - disable the LAN interrupt
*