sysbuspci.c

mtx603在vxworks下的bsp模板源代码

/* sysBusPci.c - mv2400 autoconfig support */

/* Copyright 1997-1999 Wind River Systems, Inc. All Rights Reserved */
/* Copyright 1999 Motorola, Inc. All Rights Reserved */

/*
modification history
--------------------
01d,17jul99,dmw   Modifications for MTX board family.
01c,02mar99,dmw   Fixed size allocation for 32 bit prefetchable memory,
                  base allocation for non-prefetchable memory, and updated 
                  comment memory map.
01b,21jan99,dmw   Fixed allocation for 16-bit I/O, extended address
                  support and turned on device 20 (PMC-Span) by default.
01a,14jan99,dmw   Adapted to mv2400 based on mp750 WRS version

*/
/*
DESCRIPTION

This module contains the "non-generic" or "board specific" PCI-PCI
bridge initialization code.  The module contains code to:

  1.  Determine if a particular function is to be excluded from the
          automatic configuration process.
  2.  Program the "interrupt line" field of the PCI configuration header.

*/

/* includes */

#include "vxWorks.h"
#include "logLib.h"
#include "taskLib.h"
#include "config.h"

#include "drv/pci/pciConfigLib.h"
#include "drv/pci/pciAutoConfigLib.h"

/* defines */

/* typedefs */

/* globals */

PCI_SYSTEM sysParams;

static UCHAR intLine [][4] =
    {
	{ 0xff, 0xff, 0xff, 0xff },  /* device number 0, PCI Host bridge */
	{ 0xff, 0xff, 0xff, 0xff },  /* device number 1 */
	{ 0xff, 0xff, 0xff, 0xff },  /* device number 2 */
	{ 0xff, 0xff, 0xff, 0xff },  /* device number 3 */
	{ 0xff, 0xff, 0xff, 0xff },  /* device number 4 */
	{ 0xff, 0xff, 0xff, 0xff },  /* device number 5 */
	{ 0xff, 0xff, 0xff, 0xff },  /* device number 6 */
	{ 0xff, 0xff, 0xff, 0xff },  /* device number 7 */
	{ 0xff, 0xff, 0xff, 0xff },  /* device number 8 */
	{ 0xff, 0xff, 0xff, 0xff },  /* device number 9 */
	{ 0xff, 0xff, 0xff, 0xff },  /* device number 10 */
	{ 0xff, 0xff, 0xff, 0xff },  /* device number 11, PCI-ISA/IDE/USB brg */

	{ SCSI_INT_VEC, 
          0xff, 
          0xff, 
          0xff },  /* device number 12, SCSI */

	{ 0xff, 0xff, 0xff, 0xff },  /* device number 13 */

	{ LN_INT_LVL, 
          0xff, 
          0xff, 
          0xff },  /* device number 14, Primary Ethernet */

	{ 0xff, 0xff, 0xff, 0xff },  /* device number 15 */

	{ PCI_INT_LVL1, 
          PCI_INT_LVL2, 
          PCI_INT_LVL3, 
          PCI_INT_LVL4 },  /* device number 16, PCI Primary Slot 1 */

	{ PCI_INT_LVL2, 
          PCI_INT_LVL3, 
          PCI_INT_LVL4, 
          PCI_INT_LVL1 },  /* device number 17, PCI Primary Slot 2 */

	{ PCI_INT_LVL3, 
          PCI_INT_LVL4, 
          PCI_INT_LVL1, 
          PCI_INT_LVL2 },  /* device number 18, PCI Primary Slot 3 */

	{ LN2_INT_LVL,     /* PCI_INT_LVL2 on MPIC, IRQ15 on 8259 */    
          PCI_INT_LVL3,    
          PCI_INT_LVL4, 
          PCI_INT_LVL1 },  /* device number 19, Secondary Ethernet */

	{ PCI_INT_LVL6, 
          PCI_INT_LVL7, 
          PCI_INT_LVL4, 
          PCI_INT_LVL5 }   /* device number 20, DEC 21154 Bridge */
    };

/* locals */

/* forward declarations */

LOCAL UCHAR sysPciAutoConfigIntAsgn ( PCI_SYSTEM * pSys, PCI_LOC * pFunc,
    UCHAR intPin );
LOCAL STATUS sysPciAutoConfigInclude ( PCI_SYSTEM *pSys, PCI_LOC *pciLoc,
    UINT devVend );

/******************************************************************************
*
* sysPciAutoConfigInclude - Determine if function is to be autoConfigured
*
* This function is called with PCI bus, device, function, and vendor 
* information.  It returns an indication of whether or not the particular
* function should be included in the automatic configuration process.
* This capability is useful if it is desired that a particular function
* NOT be automatically configured.  Of course, if the device is not
* included in automatic configuration, it will be unusable unless the
* user's code made provisions to configure the function outside of the
* the automatic process.
*
* RETURNS: TRUE if function is to be included in automatic configuration,
* FALSE otherwise.
*/
 
LOCAL STATUS sysPciAutoConfigInclude
    (
    PCI_SYSTEM *pSys,		/* input: AutoConfig system information */
    PCI_LOC *pciLoc,		/* input: PCI address of this function */
    UINT     devVend		/* input: Device/vendor ID number      */
    )
    {
    BOOL retVal = OK;
    
    /* If it's the host bridge then exclude it */

    if ((pciLoc->bus == 0) && (pciLoc->device == 0) && (pciLoc->function == 0))
	return ERROR;

    switch(devVend)
	{

	/* EXCLUDED Devices */

	case PCI_ID_RAVEN:
	    retVal = ERROR;
            PCI_AUTO_DEBUG_MSG("sysPciAutoconfigInclude: Excluding Raven\n",
		    0, 0, 0, 0, 0, 0);
	    break;
	case PCI_ID_IBC:
	    retVal = ERROR;
            PCI_AUTO_DEBUG_MSG("sysPciAutoconfigInclude: Excluding IBC\n",
		    0, 0, 0, 0, 0, 0);
	    break;
        case PCI_ID_IDE:
	    retVal = ERROR;
            PCI_AUTO_DEBUG_MSG("sysPciAutoconfigInclude: Excluding IDE\n",
		    0, 0, 0, 0, 0, 0);
	    break;

	/* INCLUDED Devices */

	case PCI_ID_LN_DEC21143:
	case PCI_ID_LN_DEC21140:
	    retVal = OK;
            PCI_AUTO_DEBUG_MSG("sysPciAutoconfigInclude: Including DEC 2114x\n",
		    0, 0, 0, 0, 0, 0);
	    break;

	case PCI_ID_BR_DEC21150:
	    retVal = OK;
            PCI_AUTO_DEBUG_MSG("sysPciAutoconfigInclude: Including DEC 21150 bridge\n",
		    0, 0, 0, 0, 0, 0);
	    break;

	case PCI_ID_NCR875:
	    retVal = OK;
            PCI_AUTO_DEBUG_MSG("sysPciAutoconfigInclude: Including NCR 875\n",
		    0, 0, 0, 0, 0, 0);
	    break;

	default:
	    retVal = OK;
            PCI_AUTO_DEBUG_MSG("sysPciAutoconfigInclude: Including unknown device\n",
		    0, 0, 0, 0, 0, 0);
	    break;
	}

    return retVal;
    }

/******************************************************************************
*
* sysPciAutoConfigIntAssign - Assign the "interrupt line" value
*
* RETURNS: "interrupt line" value.
*
*/

LOCAL UCHAR sysPciAutoConfigIntAsgn
    ( 
    PCI_SYSTEM * pSys,		/* input: AutoConfig system information */
    PCI_LOC * pFunc,
    UCHAR intPin 		/* input: interrupt pin number */
    )
    {
    UCHAR irqValue = 0xff;    /* Calculated value                */


    if (intPin == 0) 
	return irqValue;

    irqValue = intLine [(pFunc->device)][(intPin - 1)];

    PCI_AUTO_DEBUG_MSG("intAssign called for device [%d %d %d] IRQ: %d\n",
		pFunc->bus, pFunc->device, pFunc->function,
		irqValue, 0, 0 );

    return (irqValue);
    }

/*******************************************************************************
*
* sysPciAutoConfig - PCI autoConfig support routine
*
* This routine instantiates the PCI_SYSTEM structure needed to configure
* the system. This consists of assigning address ranges to each category
* of PCI system resource: Prefetchable and Non-Prefetchable 32-bit Memory, and
* 16- and 32-bit I/O. 
* Global values for the Cache Line Size and Maximum Latency are also specified.
* Finally, the four supplemental routines for device inclusion/exclusion, 
* interrupt assignment, and pre- and post-enumeration bridge initialization are * specified. 
*
* RETURNS: N/A
*/

void sysPciAutoConfig (void)

    {
    /*
     * 32-bit Non-prefetchable Memory Space
     * offset by 0x10 so that it doesn't start at PCI address 0x0
     */

    sysParams.pciMemIo32 = (PCI_MSTR_MEMIO_BUS + 0x10);
    sysParams.pciMemIo32Size = PCI_MSTR_MEMIO_SIZE;

    PCI_AUTO_DEBUG_MSG("sysPciAutoConfig: pciMemIo32   = 0x%08x (0x%08x)\n",
                       sysParams.pciMemIo32,
                       TRANSLATE(sysParams.pciMemIo32,PCI_MSTR_MEMIO_BUS,
                                 PCI_MSTR_MEMIO_LOCAL),0,0,0,0);
    PCI_AUTO_DEBUG_MSG("sysPciAutoConfig: pciMemIo32Size = 0x%08x\n",
                       sysParams.pciMemIo32Size,0,0,0,0,0);
    PCI_AUTO_DEBUG_MSG("sysPciAutoConfig: pciMemIo32End= 0x%08x (0x%08x)\n",
                       sysParams.pciMemIo32+sysParams.pciMemIo32Size,
                       TRANSLATE(
                          sysParams.pciMemIo32+sysParams.pciMemIo32Size,
                          PCI_MSTR_MEMIO_BUS, PCI_MSTR_MEMIO_LOCAL),
                          0,0,0,0);

    /* 32-bit Prefetchable Memory Space */

    sysParams.pciMem32 = PCI_MSTR_MEM_BUS;
    sysParams.pciMem32Size = PCI_MSTR_MEM_SIZE;

    PCI_AUTO_DEBUG_MSG("sysPciAutoConfig: pciMem32     = 0x%08x (0x%08x)\n",
                       sysParams.pciMem32,
                       TRANSLATE(sysParams.pciMem32,PCI_MSTR_MEM_BUS,
                                 PCI_MSTR_MEM_LOCAL),0,0,0,0);
    PCI_AUTO_DEBUG_MSG("sysPciAutoConfig: pciMem32Size = 0x%08x\n",
                       sysParams.pciMem32Size,0,0,0,0,0);
    PCI_AUTO_DEBUG_MSG("sysPciAutoConfig: pciMem32End  = 0x%08x (0x%08x)\n",
                        sysParams.pciMem32+sysParams.pciMem32Size,
                       TRANSLATE(sysParams.pciMem32+sysParams.pciMem32Size,
                                 PCI_MSTR_MEM_BUS,PCI_MSTR_MEM_LOCAL),
                       0,0,0,0);

    /* 16-bit ISA I/O Space - start after legacy devices, kbd, com1, ...  */

    sysParams.pciIo16 = (ISA_MSTR_IO_BUS + ISA_LEGACY_SIZE);
    sysParams.pciIo16Size = (ISA_MSTR_IO_SIZE - ISA_LEGACY_SIZE);


    PCI_AUTO_DEBUG_MSG("sysPciAutoConfig: pciIo16      = 0x%08x (0x%08x)\n",
                       sysParams.pciIo16,
                       TRANSLATE(sysParams.pciIo16,ISA_MSTR_IO_BUS,
                                 ISA_MSTR_IO_LOCAL),
                       0,0,0,0);
    PCI_AUTO_DEBUG_MSG("sysPciAutoConfig: pciIo16Size  = 0x%08x\n",
                       sysParams.pciIo16Size,0,0,0,0,0);
    PCI_AUTO_DEBUG_MSG("sysPciAutoConfig: pciIo16End   = 0x%08x (0x%08x)\n",
                       sysParams.pciIo16+sysParams.pciIo16Size,
                       TRANSLATE(sysParams.pciIo16+sysParams.pciIo16Size,
                                 ISA_MSTR_IO_BUS, ISA_MSTR_IO_LOCAL),
                       0,0,0,0);

    /* 32-bit PCI I/O Space */

    sysParams.pciIo32 = PCI_MSTR_IO_BUS;
    sysParams.pciIo32Size = PCI_MSTR_IO_SIZE;

    PCI_AUTO_DEBUG_MSG("sysPciAutoConfig: pciIo32      = 0x%08x (0x%08x)\n",
                       sysParams.pciIo32,
                       TRANSLATE(sysParams.pciIo32,PCI_MSTR_IO_BUS,
                                 PCI_MSTR_IO_LOCAL),
                       0,0,0,0);
    PCI_AUTO_DEBUG_MSG("sysPciAutoConfig: pciIo32Size  = 0x%08x\n",
                       sysParams.pciIo32Size,0,0,0,0,0);
    PCI_AUTO_DEBUG_MSG("sysPciAutoConfig: pciIo32End   = 0x%08x (0x%08x)\n",
                       sysParams.pciIo32+sysParams.pciIo32Size,
                       TRANSLATE(sysParams.pciIo32+sysParams.pciIo32Size,
                                 PCI_MSTR_IO_BUS, PCI_MSTR_IO_LOCAL),
                       0,0,0,0);

    /* Configuration space parameters */
 
    sysParams.cacheSize = (_CACHE_ALIGN_SIZE/4);
    sysParams.maxLatency = PCI_LAT_TIMER;
    sysParams.autoIntRouting = TRUE;
    sysParams.includeRtn = sysPciAutoConfigInclude;
    sysParams.intAssignRtn = sysPciAutoConfigIntAsgn;
    sysParams.bridgePreConfigInit = NULL;
    sysParams.bridgePostConfigInit = NULL;
 
    /* Perform AutoConfig */

    pciAutoConfig (&sysParams);

    return;
    }