rtl8019.h

Pic Nic 16f877/18f452控制 rtl8019as 原代码

/*
 * rtl8019.h
 *
 * NIC Register Definitions
 * All from Realtek Datasheet
 *
 */


// NIC Page 0 read register assignments
#define CR  0x00      // Command
#define CLDA0 0x01    // Current Local DMA Address 0
#define CLDA1 0x02    // Current Local DMA Address 1
#define BNDRY 0x03    // Boundary Pointer
#define TSR 0x04      // Transmit Status Register
#define NCR 0x05      // Number of Collisions Register
#define FIFO  0x06    // FIFO
#define ISR 0x07      // Interupt Status Register
#define CRDA0 0x08    // Current Remote DMA Address 0
#define CRDA1 0x09    // Current Remote DMA Address 1
#define RES1  0x0A    // Reserved
#define RES2  0x0B    // Reserved
#define RSR 0x0C      // Receive Status Register
#define CNTR0 0x0D    // Tally Counter 0 (Frame Alignment Errors)
#define CNTR1 0x0E    // Tally Counter 1 (CRC Errors)
#define CNTR2 0x0F    // Tally Counter 2 (Missed Packet Errors)

// NIC Page 0 write register assignments
#define PSTART  0x01    // Page Start Register
#define PSTOP 0x02      // Page Stop Register
#define TPSR  0x04      // Transmit Page Start Address
#define TBCR0 0x05      // Transmit Byte Count Register 0
#define TBCR1 0x06      // Transmit Byte Count Register 1
#define RSAR0 0x08      // Remote Start Address Register 0
#define RSAR1 0x09      // Remote Start Address Register 1
#define RBCR0 0x0A      // Remote Byte Count Register 0
#define RBCR1 0x0B      // Remote Byte Count Register 1
#define RCR 0x0C        // Receive Configuration Register
#define TCR 0x0D        // Transmit Configuration Register
#define DCR 0x0E        // Data Configuration Register
#define IMR 0x0F        // Interrupt Mask Register

// NIC Page 1 register assignments
#define PAR0  0x01    // Physical Address Register 0
#define PAR1  0x02    // Physical Address Register 1
#define PAR2  0x03    // Physical Address Register 2
#define PAR3  0x04    // Physical Address Register 3
#define PAR4  0x05    // Physical Address Register 4
#define PAR5  0x06    // Physical Address Register 5
#define CURR  0x07    // Current Page Register
#define MAR0  0x08    // Multicast Address Register 0
#define MAR1  0x09    // Multicast Address Register 1
#define MAR2  0x0A    // Multicast Address Register 2
#define MAR3  0x0B    // Multicast Address Register 3
#define MAR4  0x0C    // Multicast Address Register 4
#define MAR5  0x0D    // Multicast Address Register 5
#define MAR6  0x0E    // Multicast Address Register 6
#define MAR7  0x0F    // Multicast Address Register 7

// NIC Other registers
#define NIC_DATA  0x10     // Data Register for I/O port mode
#define NIC_RESET 0x18     // Reset Register
                           // 8-bit mode - wasting ram but saving I/O count
#define RCV_BUF_START 0x40 // Room for three full ethernet packets
#define XMT_BUF_START 0x54 // Leave room for two full packet transmit buffers