rs232_send.vhd

来自「rs232 vhdl程序 可以实行异步串行通信,这里只有send」· VHDL 代码 · 共 52 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity rs232_send is
       port (clk,load,reset:in std_logic;
             datain: in std_logic_vector(7 downto 0);
             dataout,over: out std_logic);
end rs232_send;

architecture rtl of rs232_send is
  begin
    process(clk,load,datain) is
         variable cnt:integer range 0 to 8;
         variable reg:std_logic_vector(7 downto 0);
         variable pi:std_logic;
         type state_type is (s0,s1,s2);
         variable state:state_type;
     begin 
         if reset='1' then
            dataout<='1';
         elsif rising_edge(clk) then
            case state is
               when s0=>
                      dataout<='1';  
                      over<='0';
                   if load='1' then 
                      dataout<='0';
                      state:=s1;
                      reg:=datain;
                      cnt:=0;
                      pi:=not(reg(0)xor reg(1) xor reg(2) xor reg(3) xor reg(4) xor reg(5) xor reg(6) xor reg(7));
                    end if;
               when s1=>
                   if (cnt<8) then
                      dataout<=reg(7);
                      reg:=reg(6 downto 0) & '0';
                      cnt:=cnt+1;
                      state:=s1;
                   elsif (cnt=8) then
                      state:=s2;
                      dataout<=pi;
                   end if;
                when s2=>
                      cnt:=0;
                      over<='1';
                      dataout<='1';
                      state:=s0;
          end case; 
       end if;
    end process;
end rtl;