pld01a.mfd

Liod平台CPLD源代码 pxa270

MACROCELL | 12 | 11 | MS_PWR_EN_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 2 | MSINS  | BCR2_REG<0>
INPUTMC | 1 | 2 | 12
INPUTP | 1 | 131
EQ | 1 | 
   MS_PWR_EN = !MSINS * BCR2_REG<0>;

MACROCELL | 2 | 12 | BCR2_REG<0>_MC
ATTRIBUTES | 2290090768 | 0
OUTPUTMC | 2 | 12 | 11 | 0 | 2
INPUTS | 2 | DATA<0>.PIN  | RESET_OUTn
INPUTP | 2 | 218 | 133
LCT | 1 | 2 | Internal_Name
EQ | 5 | 
   BCR2_REG<0> := DATA<0>.PIN;
    BCR2_REG<0>.CLK = !(ADDR25 * !WEn * !RD_WRn * !CS2n * !ADDR<5> * 
	!ADDR<4> * !ADDR<3> * ADDR<2> * !ADDR<7> * !ADDR<6> * 
	!ADDR<8>);
    BCR2_REG<0>.AR = !RESET_OUTn;

MACROCELL | 6 | 12 | PSKTSEL_MC
ATTRIBUTES | 2290352914 | 0
OUTPUTMC | 1 | 0 | 12
INPUTS | 2 | DATA<10>.PIN  | RESET_OUTn
INPUTP | 2 | 212 | 133
LCT | 1 | 2 | Internal_Name
EQ | 5 | 
   PSKTSEL := DATA<10>.PIN;
    PSKTSEL.CLK = !(ADDR25 * !WEn * !RD_WRn * !CS2n * !ADDR<5> * 
	!ADDR<4> * !ADDR<3> * !ADDR<2> * !ADDR<7> * !ADDR<6> * 
	!ADDR<8>);
    PSKTSEL.AR = !RESET_OUTn;

MACROCELL | 6 | 14 | SLEEPn_MC
ATTRIBUTES | 2290352914 | 0
OUTPUTMC | 1 | 0 | 13
INPUTS | 2 | DATA<11>.PIN  | RESET_OUTn
INPUTP | 2 | 211 | 133
LCT | 1 | 2 | Internal_Name
EQ | 5 | 
   SLEEPn := DATA<11>.PIN;
    SLEEPn.CLK = !(ADDR25 * !WEn * !RD_WRn * !CS2n * !ADDR<5> * 
	!ADDR<4> * !ADDR<3> * !ADDR<2> * !ADDR<7> * !ADDR<6> * 
	!ADDR<8>);
    SLEEPn.AR = !RESET_OUTn;

MACROCELL | 6 | 15 | SPKR_OFF_MC
ATTRIBUTES | 2290353026 | 0
OUTPUTMC | 1 | 0 | 3
INPUTS | 2 | DATA<14>.PIN  | RESET_OUTn
INPUTP | 2 | 217 | 133
LCT | 1 | 2 | Internal_Name
EQ | 5 | 
   SPKR_OFF := DATA<14>.PIN;
    SPKR_OFF.CLK = !(ADDR25 * !WEn * !RD_WRn * !CS2n * !ADDR<5> * 
	!ADDR<4> * !ADDR<3> * !ADDR<2> * !ADDR<7> * !ADDR<6> * 
	!ADDR<8>);
    SPKR_OFF.AP = !RESET_OUTn;

MACROCELL | 2 | 13 | SYS_CS0n_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 1 | CS5n
INPUTP | 1 | 178
EQ | 1 | 
   SYS_CS0n = CS5n;

MACROCELL | 2 | 15 | SYS_CS1n_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 1 | CS1n
INPUTP | 1 | 173
EQ | 1 | 
   SYS_CS1n = CS1n;

MACROCELL | 3 | 1 | TX_OUT0_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 1 | TX_IN0
INPUTP | 1 | 160
EQ | 1 | 
   TX_OUT0 = TX_IN0;

MACROCELL | 7 | 12 | TX_OUT1_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 1 | TX_IN1
INPUTP | 1 | 82
EQ | 1 | 
   TX_OUT1 = TX_IN1;

MACROCELL | 12 | 1 | USB_IDE_CSn_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 1 | CS4n
INPUTP | 1 | 177
EQ | 1 | 
   USB_IDE_CSn = CS4n;

MACROCELL | 7 | 4 | USB_IDE_RESn_MC
ATTRIBUTES | 1074004738 | 0
INPUTS | 1 | RESET_OUTn
INPUTP | 1 | 133
EQ | 1 | 
   USB_IDE_RESn = RESET_OUTn;

MACROCELL | 3 | 13 | BCR2_REG<15>_MC
ATTRIBUTES | 2290090768 | 0
OUTPUTMC | 1 | 0 | 5
INPUTS | 2 | DATA<15>.PIN  | RESET_OUTn
INPUTP | 2 | 214 | 133
LCT | 1 | 2 | Internal_Name
EQ | 5 | 
   BCR2_REG<15> := DATA<15>.PIN;
    BCR2_REG<15>.CLK = !(ADDR25 * !WEn * !RD_WRn * !CS2n * !ADDR<5> * 
	!ADDR<4> * !ADDR<3> * ADDR<2> * !ADDR<7> * !ADDR<6> * 
	!ADDR<8>);
    BCR2_REG<15>.AR = !RESET_OUTn;

MACROCELL | 0 | 12 | BCR2_REG<10>_MC
ATTRIBUTES | 3464758018 | 6
OUTPUTMC | 1 | 0 | 12
INPUTS | 7 | N_PZ_261  | SW3_INT  | ADDR<3>  | ADDR<2>  | EXB_PRESn  | BCR2_REG<10>  | PSKTSEL
INPUTMC | 4 | 3 | 3 | 3 | 5 | 0 | 12 | 6 | 12
INPUTP | 3 | 19 | 18 | 105
LCT | 3 | 4 | Internal_Name | 2 | Internal_Name | 5 | Internal_Name
EQ | 11 | 
   DATA<10> =  !N_PZ_261 * SW3_INT
	# ADDR<3> * !ADDR<2> * N_PZ_261 * EXB_PRESn
	# !ADDR<3> * ADDR<2> * N_PZ_261 * BCR2_REG<10>
	# !ADDR<3> * !ADDR<2> * N_PZ_261 * PSKTSEL;
    DATA<10>.OE = _n0051;
// Direct Input Register
BCR2_REG<10> := DATA<10>.PIN;
    BCR2_REG<10>.CLK = !(ADDR25 * !WEn * !RD_WRn * !CS2n * !ADDR<5> * 
	!ADDR<4> * !ADDR<3> * ADDR<2> * !ADDR<7> * !ADDR<6> * 
	!ADDR<8>);
    BCR2_REG<10>.AR = !RESET_OUTn;

MACROCELL | 0 | 13 | BCR2_REG<11>_MC
ATTRIBUTES | 3464758018 | 6
OUTPUTMC | 1 | 0 | 13
INPUTS | 7 | N_PZ_261  | SW4_1INT  | ADDR<3>  | ADDR<2>  | EX_IN0  | BCR2_REG<11>  | SLEEPn
INPUTMC | 4 | 3 | 3 | 6 | 9 | 0 | 13 | 6 | 14
INPUTP | 3 | 19 | 18 | 102
LCT | 3 | 4 | Internal_Name | 2 | Internal_Name | 5 | Internal_Name
EQ | 11 | 
   DATA<11> =  !N_PZ_261 * SW4_1INT
	# ADDR<3> * !ADDR<2> * N_PZ_261 * EX_IN0
	# !ADDR<3> * ADDR<2> * N_PZ_261 * BCR2_REG<11>
	# !ADDR<3> * !ADDR<2> * N_PZ_261 * SLEEPn;
    DATA<11>.OE = _n0051;
// Direct Input Register
BCR2_REG<11> := DATA<11>.PIN;
    BCR2_REG<11>.CLK = !(ADDR25 * !WEn * !RD_WRn * !CS2n * !ADDR<5> * 
	!ADDR<4> * !ADDR<3> * ADDR<2> * !ADDR<7> * !ADDR<6> * 
	!ADDR<8>);
    BCR2_REG<11>.AR = !RESET_OUTn;

MACROCELL | 0 | 11 | BCR2_REG<13>_MC
ATTRIBUTES | 3464758018 | 6
OUTPUTMC | 1 | 0 | 11
INPUTS | 6 | N_PZ_261  | SW4_3INT  | ADDR<3>  | ADDR<2>  | BCR2_REG<13>  | LED_GREENn
INPUTMC | 4 | 3 | 3 | 7 | 15 | 0 | 11 | 6 | 10
INPUTP | 2 | 19 | 18
LCT | 3 | 4 | Internal_Name | 2 | Internal_Name | 5 | Internal_Name
EQ | 10 | 
   DATA<13> =  !N_PZ_261 * SW4_3INT
	# !ADDR<3> * ADDR<2> * N_PZ_261 * BCR2_REG<13>
	# !ADDR<3> * !ADDR<2> * N_PZ_261 * LED_GREENn;
    DATA<13>.OE = _n0051;
// Direct Input Register
BCR2_REG<13> := DATA<13>.PIN;
    BCR2_REG<13>.CLK = !(ADDR25 * !WEn * !RD_WRn * !CS2n * !ADDR<5> * 
	!ADDR<4> * !ADDR<3> * ADDR<2> * !ADDR<7> * !ADDR<6> * 
	!ADDR<8>);
    BCR2_REG<13>.AR = !RESET_OUTn;

MACROCELL | 0 | 3 | BCR2_REG<14>_MC
ATTRIBUTES | 3464758018 | 6
OUTPUTMC | 1 | 0 | 3
INPUTS | 5 | ADDR<3>  | ADDR<2>  | N_PZ_261  | BCR2_REG<14>  | SPKR_OFF
INPUTMC | 3 | 3 | 3 | 0 | 3 | 6 | 15
INPUTP | 2 | 19 | 18
LCT | 3 | 4 | Internal_Name | 2 | Internal_Name | 5 | Internal_Name
EQ | 9 | 
   DATA<14> =  !ADDR<3> * ADDR<2> * N_PZ_261 * BCR2_REG<14>
	# !ADDR<3> * !ADDR<2> * N_PZ_261 * SPKR_OFF;
    DATA<14>.OE = _n0051;
// Direct Input Register
BCR2_REG<14> := DATA<14>.PIN;
    BCR2_REG<14>.CLK = !(ADDR25 * !WEn * !RD_WRn * !CS2n * !ADDR<5> * 
	!ADDR<4> * !ADDR<3> * ADDR<2> * !ADDR<7> * !ADDR<6> * 
	!ADDR<8>);
    BCR2_REG<14>.AR = !RESET_OUTn;

MACROCELL | 2 | 2 | BCR2_REG<6>_MC
ATTRIBUTES | 3431203602 | 6
OUTPUTMC | 1 | 2 | 2
INPUTS | 9 | RESET_OUTn  | N_PZ_261  | CF_IN_INT  | ADDR<3>  | ADDR<2>  | DIP_DATA  | MSINS  | BCR2_REG<6>  | AUDIO_PWR_EN
INPUTMC | 4 | 3 | 3 | 0 | 15 | 2 | 2 | 4 | 3
INPUTP | 5 | 133 | 19 | 18 | 108 | 131
LCT | 2 | 2 | Internal_Name | 5 | Internal_Name
EQ | 12 | 
   DATA<6> =  !N_PZ_261 * CF_IN_INT
	# ADDR<3> * ADDR<2> * N_PZ_261 * DIP_DATA
	# ADDR<3> * !ADDR<2> * N_PZ_261 * MSINS
	# !ADDR<3> * ADDR<2> * N_PZ_261 * BCR2_REG<6>
	# !ADDR<3> * !ADDR<2> * N_PZ_261 * AUDIO_PWR_EN;
    DATA<6>.OE = _n0051;
// Direct Input Register
BCR2_REG<6> := DATA<6>.PIN;
    BCR2_REG<6>.CLK = !(ADDR25 * !WEn * !RD_WRn * !CS2n * !ADDR<5> * 
	!ADDR<4> * !ADDR<3> * ADDR<2> * !ADDR<7> * !ADDR<6> * 
	!ADDR<8>);
    BCR2_REG<6>.AR = !RESET_OUTn;

PIN | ADDR25 | 64 | 16 | LVCMOS18 | 17 | 43 | 3 | 3 | 3 | 4 | 4 | 3 | 2 | 1 | 0 | 2 | 4 | 4 | 0 | 15 | 0 | 14 | 5 | 9 | 0 | 10 | 4 | 14 | 2 | 14 | 4 | 15 | 2 | 11 | 2 | 9 | 2 | 10 | 2 | 7 | 2 | 8 | 5 | 10 | 2 | 6 | 3 | 11 | 3 | 15 | 3 | 5 | 3 | 14 | 6 | 9 | 3 | 12 | 6 | 8 | 3 | 10 | 7 | 15 | 3 | 9 | 7 | 14 | 3 | 8 | 8 | 15 | 3 | 7 | 4 | 1 | 4 | 13 | 4 | 5 | 7 | 0 | 5 | 13 | 5 | 0 | 5 | 11 | 7 | 1 | 0 | 5
PIN | ADDR<2> | 64 | 16 | LVCMOS18 | 18 | 52 | 3 | 4 | 4 | 3 | 2 | 1 | 0 | 2 | 4 | 4 | 0 | 15 | 0 | 14 | 5 | 9 | 0 | 10 | 4 | 14 | 2 | 14 | 4 | 15 | 2 | 11 | 2 | 9 | 2 | 10 | 2 | 7 | 2 | 8 | 5 | 10 | 2 | 6 | 3 | 11 | 3 | 15 | 3 | 5 | 3 | 14 | 6 | 9 | 3 | 12 | 6 | 8 | 3 | 10 | 7 | 15 | 3 | 9 | 7 | 14 | 3 | 8 | 8 | 15 | 3 | 7 | 4 | 1 | 4 | 13 | 1 | 2 | 4 | 5 | 1 | 0 | 7 | 0 | 1 | 12 | 1 | 13 | 1 | 3 | 5 | 13 | 1 | 4 | 1 | 11 | 0 | 5 | 0 | 12 | 0 | 13 | 0 | 11 | 0 | 3 | 2 | 0 | 2 | 2
PIN | ADDR<3> | 64 | 16 | LVCMOS18 | 19 | 52 | 3 | 4 | 4 | 3 | 2 | 1 | 0 | 2 | 4 | 4 | 0 | 15 | 0 | 14 | 5 | 9 | 0 | 10 | 4 | 14 | 2 | 14 | 4 | 15 | 2 | 11 | 2 | 9 | 2 | 10 | 2 | 7 | 2 | 8 | 5 | 10 | 2 | 6 | 3 | 11 | 3 | 15 | 3 | 5 | 3 | 14 | 6 | 9 | 3 | 12 | 6 | 8 | 3 | 10 | 7 | 15 | 3 | 9 | 7 | 14 | 3 | 8 | 8 | 15 | 3 | 7 | 4 | 1 | 4 | 13 | 1 | 2 | 4 | 5 | 1 | 0 | 7 | 0 | 1 | 12 | 1 | 13 | 1 | 3 | 5 | 13 | 1 | 4 | 1 | 11 | 0 | 5 | 0 | 12 | 0 | 13 | 0 | 11 | 0 | 3 | 2 | 0 | 2 | 2
PIN | ADDR<4> | 64 | 16 | LVCMOS18 | 20 | 39 | 3 | 3 | 4 | 3 | 2 | 1 | 0 | 2 | 4 | 4 | 0 | 15 | 0 | 14 | 5 | 9 | 0 | 10 | 4 | 14 | 2 | 14 | 4 | 15 | 2 | 11 | 2 | 9 | 2 | 10 | 2 | 7 | 2 | 8 | 5 | 10 | 2 | 6 | 3 | 11 | 3 | 15 | 3 | 5 | 3 | 14 | 6 | 9 | 3 | 12 | 6 | 8 | 3 | 10 | 7 | 15 | 3 | 9 | 7 | 14 | 3 | 8 | 8 | 15 | 3 | 7 | 4 | 1 | 4 | 13 | 4 | 5 | 7 | 0 | 5 | 13 | 0 | 5
PIN | ADDR<5> | 64 | 16 | LVCMOS18 | 21 | 40 | 3 | 3 | 3 | 4 | 4 | 3 | 2 | 1 | 0 | 2 | 4 | 4 | 0 | 15 | 0 | 14 | 5 | 9 | 0 | 10 | 4 | 14 | 2 | 14 | 4 | 15 | 2 | 11 | 2 | 9 | 2 | 10 | 2 | 7 | 2 | 8 | 5 | 10 | 2 | 6 | 3 | 11 | 3 | 15 | 3 | 5 | 3 | 14 | 6 | 9 | 3 | 12 | 6 | 8 | 3 | 10 | 7 | 15 | 3 | 9 | 7 | 14 | 3 | 8 | 8 | 15 | 3 | 7 | 4 | 1 | 4 | 13 | 4 | 5 | 7 | 0 | 5 | 13 | 0 | 5
PIN | ADDR<6> | 64 | 16 | LVCMOS18 | 23 | 40 | 3 | 3 | 3 | 4 | 4 | 3 | 2 | 1 | 0 | 2 | 4 | 4 | 0 | 15 | 0 | 14 | 5 | 9 | 0 | 10 | 4 | 14 | 2 | 14 | 4 | 15 | 2 | 11 | 2 | 9 | 2 | 10 | 2 | 7 | 2 | 8 | 5 | 10 | 2 | 6 | 3 | 11 | 3 | 15 | 3 | 5 | 3 | 14 | 6 | 9 | 3 | 12 | 6 | 8 | 3 | 10 | 7 | 15 | 3 | 9 | 7 | 14 | 3 | 8 | 8 | 15 | 3 | 7 | 4 | 1 | 4 | 13 | 4 | 5 | 7 | 0 | 5 | 13 | 0 | 5
PIN | ADDR<7> | 64 | 16 | LVCMOS18 | 168 | 40 | 3 | 3 | 3 | 4 | 4 | 3 | 2 | 1 | 0 | 2 | 4 | 4 | 0 | 15 | 0 | 14 | 5 | 9 | 0 | 10 | 4 | 14 | 2 | 14 | 4 | 15 | 2 | 11 | 2 | 9 | 2 | 10 | 2 | 7 | 2 | 8 | 5 | 10 | 2 | 6 | 3 | 11 | 3 | 15 | 3 | 5 | 3 | 14 | 6 | 9 | 3 | 12 | 6 | 8 | 3 | 10 | 7 | 15 | 3 | 9 | 7 | 14 | 3 | 8 | 8 | 15 | 3 | 7 | 4 | 1 | 4 | 13 | 4 | 5 | 7 | 0 | 5 | 13 | 0 | 5
PIN | ADDR<8> | 64 | 16 | LVCMOS18 | 169 | 40 | 3 | 3 | 3 | 4 | 4 | 3 | 2 | 1 | 0 | 2 | 4 | 4 | 0 | 15 | 0 | 14 | 5 | 9 | 0 | 10 | 4 | 14 | 2 | 14 | 4 | 15 | 2 | 11 | 2 | 9 | 2 | 10 | 2 | 7 | 2 | 8 | 5 | 10 | 2 | 6 | 3 | 11 | 3 | 15 | 3 | 5 | 3 | 14 | 6 | 9 | 3 | 12 | 6 | 8 | 3 | 10 | 7 | 15 | 3 | 9 | 7 | 14 | 3 | 8 | 8 | 15 | 3 | 7 | 4 | 1 | 4 | 13 | 4 | 5 | 7 | 0 | 5 | 13 | 0 | 5
PIN | MBGNT | 64 | 16 | LVCMOS18 | 167 | 1 | 12 | 2
PIN | WEn | 64 | 16 | LVCMOS18 | 158 | 38 | 4 | 3 | 2 | 1 | 0 | 2 | 4 | 4 | 0 | 15 | 0 | 14 | 5 | 9 | 0 | 10 | 4 | 14 | 2 | 14 | 4 | 15 | 2 | 11 | 2 | 9 | 2 | 10 | 2 | 7 | 2 | 8 | 5 | 10 | 2 | 6 | 3 | 11 | 3 | 15 | 3 | 5 | 3 | 14 | 6 | 9 | 3 | 12 | 6 | 8 | 3 | 10 | 7 | 15 | 3 | 9 | 7 | 14 | 3 | 8 | 8 | 15 | 3 | 7 | 4 | 1 | 4 | 13 | 4 | 5 | 7 | 0 | 5 | 13 | 0 | 5
PIN | RD_WRn | 64 | 16 | LVCMOS18 | 161 | 41 | 3 | 3 | 3 | 4 | 4 | 3 | 2 | 1 | 0 | 2 | 4 | 4 | 0 | 15 | 0 | 14 | 5 | 9 | 0 | 10 | 4 | 14 | 2 | 14 | 4 | 15 | 2 | 11 | 2 | 9 | 2 | 10 | 2 | 7 | 2 | 8 | 5 | 10 | 2 | 6 | 3 | 11 | 3 | 15 | 3 | 5 | 3 | 14 | 6 | 9 | 3 | 12 | 6 | 8 | 3 | 10 | 7 | 15 | 3 | 9 | 7 | 14 | 3 | 8 | 8 | 15 | 3 | 7 | 4 | 1 | 4 | 13 | 4 | 5 | 7 | 0 | 5 | 13 | 5 | 0 | 0 | 5
PIN | CS2n | 64 | 16 | LVCMOS18 | 175 | 43 | 3 | 3 | 3 | 4 | 4 | 3 | 2 | 1 | 0 | 2 | 4 | 4 | 0 | 15 | 0 | 14 | 5 | 9 | 0 | 10 | 4 | 14 | 2 | 14 | 4 | 15 | 2 | 11 | 2 | 9 | 2 | 10 | 2 | 7 | 2 | 8 | 5 | 10 | 2 | 6 | 3 | 11 | 3 | 15 | 3 | 5 | 3 | 14 | 6 | 9 | 3 | 12 | 6 | 8 | 3 | 10 | 7 | 15 | 3 | 9 | 7 | 14 | 3 | 8 | 8 | 15 | 3 | 7 | 4 | 1 | 4 | 13 | 4 | 5 | 7 | 0 | 5 | 13 | 5 | 0 | 5 | 11 | 7 | 1 | 0 | 5
PIN | RESET_OUTn | 64 | 16 | LVCMOS33 | 133 | 40 | 2 | 0 | 4 | 3 | 2 | 1 | 4 | 4 | 0 | 14 | 0 | 10 | 2 | 14 | 2 | 11 | 2 | 10 | 2 | 8 | 2 | 6 | 3 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 3 | 9 | 3 | 8 | 3 | 7 | 4 | 13 | 6 | 11 | 4 | 5 | 5 | 15 | 7 | 0 | 6 | 4 | 5 | 12 | 5 | 14 | 5 | 13 | 6 | 13 | 3 | 6 | 3 | 0 | 6 | 5 | 7 | 2 | 6 | 10 | 2 | 12 | 6 | 12 | 6 | 14 | 6 | 15 | 7 | 4 | 3 | 13 | 2 | 2
PIN | OEn | 64 | 16 | LVCMOS18 | 166 | 3 | 3 | 3 | 3 | 4 | 5 | 0
PIN | CS5n | 64 | 16 | LVCMOS18 | 178 | 2 | 2 | 4 | 2 | 13
PIN | CF_BVD1 | 64 | 16 | LVCMOS33 | 120 | 1 | 1 | 0
PIN | CF_BVD2 | 64 | 16 | LVCMOS33 | 121 | 1 | 1 | 12
PIN | CF_CD1n | 64 | 16 | LVCMOS33 | 112 | 4 | 12 | 0 | 0 | 15 | 5 | 9 | 0 | 2
PIN | CF_CD2n | 64 | 16 | LVCMOS33 | 109 | 4 | 12 | 0 | 0 | 15 | 5 | 9 | 0 | 2
PIN | PCE2n | 64 | 16 | LVCMOS18 | 162 | 2 | 5 | 3 | 5 | 0
PIN | PCE1n | 64 | 16 | LVCMOS18 | 163 | 2 | 5 | 3 | 5 | 0
PIN | MMC_DETECT | 64 | 16 | LVCMOS33 | 95 | 3 | 1 | 13 | 12 | 4 | 12 | 5
PIN | SIM_DETECTn | 64 | 16 | LVCMOS33 | 134 | 3 | 2 | 9 | 2 | 7 | 2 | 1
PIN | SW1 | 64 | 16 | LVCMOS33 | 137 | 2 | 5 | 10 | 0 | 2
PIN | SW2 | 64 | 16 | LVCMOS33 | 138 | 2 | 3 | 11 | 1 | 0
PIN | SW3 | 64 | 16 | LVCMOS33 | 90 | 2 | 3 | 5 | 1 | 12
PIN | SW4_1 | 64 | 16 | LVCMOS33 | 89 | 2 | 6 | 9 | 1 | 13
PIN | SW4_2 | 64 | 16 | LVCMOS33 | 88 | 2 | 6 | 8 | 2 | 0
PIN | SW4_3 | 64 | 16 | LVCMOS33 | 87 | 2 | 7 | 15 | 2 | 1
PIN | USB1_WAKE | 64 | 16 | LVCMOS33 | 81 | 1 | 1 | 4
PIN | CS0n | 64 | 16 | LVCMOS18 | 171 | 3 | 5 | 0 | 5 | 1 | 1 | 14
PIN | CS1n | 64 | 16 | LVCMOS18 | 173 | 1 | 2 | 15
PIN | CS3n | 64 | 16 | LVCMOS18 | 176 | 2 | 5 | 0 | 7 | 11
PIN | CS4n | 64 | 16 | LVCMOS18 | 177 | 2 | 5 | 0 | 12 | 1
PIN | EX_IN1 | 64 | 16 | LVCMOS33 | 100 | 1 | 1 | 2
PIN | POLL_FLAG | 64 | 16 | LVCMOS33 | 132 | 1 | 1 | 3
PIN | SWAP_FLASH | 64 | 16 | LVCMOS33 | 86 | 4 | 1 | 11 | 5 | 0 | 5 | 1 | 1 | 14
PIN | DVAL1 | 64 | 16 | LVCMOS33 | 107 | 1 | 5 | 0
PIN | DIP_DATA | 64 | 16 | LVCMOS33 | 108 | 1 | 2 | 2
PIN | EXB_PRESn | 64 | 16 | LVCMOS33 | 105 | 1 | 0 | 12
PIN | EX_IN0 | 64 | 16 | LVCMOS33 | 102 | 1 | 0 | 13
PIN | MMC_WP | 64 | 16 | LVCMOS33 | 125 | 1 | 2 | 0
PIN | MSINS | 64 | 16 | LVCMOS33 | 131 | 2 | 12 | 11 | 2 | 2
PIN | TX_IN0 | 64 | 16 | LVCMOS18 | 160 | 1 | 3 | 1
PIN | TX_IN1 | 64 | 16 | LVCMOS33 | 82 | 1 | 7 | 12
PIN | ADDR_DIRn | 536871040 | 0 | LVCMOS33 | 115
PIN | ADDR_OEn | 536871040 | 0 | LVCMOS33 | 74
PIN | AUDIO_PWR_EN | 536871040 | 0 | LVCMOS33 | 50
PIN | BRDY_ENn | 536871040 | 0 | LVCMOS18 | 204
PIN | CF_OEn | 536871040 | 0 | LVCMOS33 | 59
PIN | CF_PWR_EN | 536871040 | 0 | LVCMOS33 | 113
PIN | CF_RESET | 536871040 | 0 | LVCMOS33 | 49
PIN | CPLD_INTn | 536871040 | 0 | LVCMOS33 | 52
PIN | DAC_PWR_EN | 536871040 | 0 | LVCMOS33 | 44
PIN | DATA_DIRn | 536871040 | 0 | LVCMOS33 | 54
PIN | DATA_OEn | 536871040 | 0 | LVCMOS33 | 75
PIN | EX_FLASH_CSn | 536871040 | 0 | LVCMOS33 | 55
PIN | EX_OUT0 | 536871040 | 0 | LVCMOS33 | 62
PIN | EX_OUT1 | 536871040 | 0 | LVCMOS33 | 65
PIN | EX_REG_CSn | 536871040 | 0 | LVCMOS33 | 69
PIN | FLASH_CSn | 536871040 | 0 | LVCMOS18 | 12
PIN | FLASH_RSTn | 536871040 | 0 | LVCMOS18 | 15
PIN | HDD_PWR_EN | 536871040 | 0 | LVCMOS33 | 64
PIN | IRDA_FSEL | 536871040 | 0 | LVCMOS33 | 67
PIN | IRDA_MD0 | 536871040 | 0 | LVCMOS33 | 35
PIN | IRDA_MD1 | 536871040 | 0 | LVCMOS33 | 34
PIN | LAN_AEN | 536871040 | 0 | LVCMOS33 | 76
PIN | LAN_RESET | 536871040 | 0 | LVCMOS33 | 70
PIN | LCD_PWR_ON | 536871040 | 0 | LVCMOS33 | 66
PIN | LED_GREENn | 536871040 | 0 | LVCMOS33 | 33
PIN | LED_REDn | 536871040 | 0 | LVCMOS33 | 32
PIN | MMC_PWR_EN | 536871040 | 0 | LVCMOS33 | 117
PIN | MS_PULL | 536871040 | 0 | LVCMOS33 | 118
PIN | MS_PWR_EN | 536871040 | 0 | LVCMOS33 | 119
PIN | PSKTSEL | 536871040 | 0 | LVCMOS33 | 31
PIN | RS232_ON | 536871040 | 0 | LVCMOS33 | 30
PIN | SLEEPn | 536871040 | 0 | LVCMOS33 | 29
PIN | SPKR_OFF | 536871040 | 0 | LVCMOS33 | 28
PIN | SYS_CS0n | 536871040 | 0 | LVCMOS18 | 199
PIN | SYS_CS1n | 536871040 | 0 | LVCMOS18 | 197
PIN | TX_OUT0 | 536871040 | 0 | LVCMOS18 | 16
PIN | TX_OUT1 | 536871040 | 0 | LVCMOS33 | 77
PIN | USB_IDE_CSn | 536871040 | 0 | LVCMOS33 | 114
PIN | USB_IDE_RESn | 536871040 | 0 | LVCMOS33 | 73
PIN | VBUS1_ON | 536871040 | 0 | LVCMOS33 | 48
PIN | VGA_I2C_ENn | 536871040 | 0 | LVCMOS33 | 68
PIN | DATA<12> | 536870976 | 16 | LVCMOS18 | 3 | 5 | 6 | 8 | 3 | 10 | 3 | 2 | 6 | 11 | 9 | 13
PIN | DATA<1> | 536870976 | 16 | LVCMOS18 | 1 | 5 | 4 | 4 | 4 | 15 | 2 | 11 | 3 | 2 | 4 | 5
PIN | DATA<2> | 536870976 | 16 | LVCMOS18 | 8 | 5 | 2 | 9 | 2 | 10 | 3 | 2 | 5 | 15 | 7 | 0
PIN | DATA<3> | 536870976 | 16 | LVCMOS18 | 10 | 5 | 2 | 7 | 2 | 8 | 3 | 2 | 4 | 13 | 6 | 4
PIN | DATA<7> | 536870976 | 16 | LVCMOS18 | 4 | 5 | 5 | 9 | 0 | 10 | 3 | 2 | 5 | 12 | 9 | 15
PIN | DATA<8> | 536870976 | 16 | LVCMOS18 | 5 | 5 | 5 | 10 | 2 | 6 | 3 | 2 | 5 | 14 | 5 | 13
PIN | DATA<9> | 536870976 | 16 | LVCMOS18 | 7 | 5 | 3 | 11 | 3 | 15 | 10 | 4 | 3 | 2 | 6 | 13
PIN | DATA<0> | 536870976 | 16 | LVCMOS18 | 218 | 5 | 4 | 14 | 2 | 14 | 3 | 2 | 2 | 12 | 0 | 2
PIN | DATA<15> | 536870976 | 16 | LVCMOS18 | 214 | 3 | 3 | 2 | 3 | 13 | 0 | 5
PIN | DATA<5> | 536870976 | 16 | LVCMOS18 | 207 | 5 | 8 | 15 | 3 | 7 | 3 | 2 | 3 | 6 | 2 | 1
PIN | DATA<10> | 536870976 | 16 | LVCMOS18 | 212 | 5 | 3 | 5 | 3 | 14 | 3 | 2 | 6 | 12 | 0 | 12
PIN | DATA<11> | 536870976 | 16 | LVCMOS18 | 211 | 5 | 6 | 9 | 3 | 12 | 3 | 2 | 6 | 14 | 0 | 13
PIN | DATA<13> | 536870976 | 16 | LVCMOS18 | 213 | 5 | 7 | 15 | 3 | 9 | 3 | 2 | 6 | 10 | 0 | 11
PIN | DATA<14> | 536870976 | 16 | LVCMOS18 | 217 | 3 | 3 | 2 | 6 | 15 | 0 | 3
PIN | DATA<4> | 536870976 | 16 | LVCMOS18 | 208 | 5 | 7 | 14 | 3 | 8 | 3 | 2 | 6 | 5 | 2 | 0
PIN | DATA<6> | 536870976 | 16 | LVCMOS18 | 206 | 5 | 4 | 3 | 0 | 15 | 0 | 14 | 3 | 2 | 2 | 2