pld01a.gyd

来自「Liod平台CPLD源代码 pxa270」· GYD 代码 · 共 159 行

Pin Freeze File:  version G.28

2C256144 XC2C256-7-TQ144
ADDR25 S:PIN13
ADDR<2> S:PIN14
ADDR<3> S:PIN15
ADDR<4> S:PIN16
ADDR<5> S:PIN17
ADDR<6> S:PIN18
ADDR<7> S:PIN112
ADDR<8> S:PIN113
CF_BVD1 S:PIN81
CF_BVD2 S:PIN82
CF_CD1n S:PIN74
CF_CD2n S:PIN71
CS0n S:PIN114
CS1n S:PIN115
CS2n S:PIN116
CS3n S:PIN117
CS4n S:PIN118
CS5n S:PIN119
DIP_DATA S:PIN70
DVAL1 S:PIN69
EXB_PRESn S:PIN68
EX_IN0 S:PIN66
EX_IN1 S:PIN64
MBGNT S:PIN111
MMC_DETECT S:PIN61
MMC_WP S:PIN83
MSINS S:PIN85
OEn S:PIN110
PCE1n S:PIN107
PCE2n S:PIN106
POLL_FLAG S:PIN86
RD_WRn S:PIN105
RESET_OUTn S:PIN87
SIM_DETECTn S:PIN88
SW1 S:PIN91
SW2 S:PIN92
SW3 S:PIN60
SW4_1 S:PIN59
SW4_2 S:PIN58
SW4_3 S:PIN57
SWAP_FLASH S:PIN56
TX_IN0 S:PIN104
TX_IN1 S:PIN54
USB1_WAKE S:PIN53
WEn S:PIN103
ADDR_DIRn S:PIN77
ADDR_OEn S:PIN49
AUDIO_PWR_EN S:PIN32
DATA<0> S:PIN143
DATA<15> S:PIN140
DATA<5> S:PIN135
DATA<10> S:PIN138
DATA<11> S:PIN137
DATA<13> S:PIN139
DATA<14> S:PIN142
DATA<4> S:PIN136
DATA<6> S:PIN134
BRDY_ENn S:PIN133
CF_OEn S:PIN38
CF_PWR_EN S:PIN75
CF_RESET S:PIN31
CPLD_INTn S:PIN33
DAC_PWR_EN S:PIN28
DATA<12> S:PIN3
DATA<1> S:PIN2
DATA<2> S:PIN7
DATA<3> S:PIN9
DATA<7> S:PIN4
DATA<8> S:PIN5
DATA<9> S:PIN6
DATA_DIRn S:PIN34
DATA_OEn S:PIN50
EX_FLASH_CSn S:PIN35
EX_OUT0 S:PIN39
EX_OUT1 S:PIN41
EX_REG_CSn S:PIN45
FLASH_CSn S:PIN10
FLASH_RSTn S:PIN11
HDD_PWR_EN S:PIN40
IRDA_FSEL S:PIN43
IRDA_MD0 S:PIN26
IRDA_MD1 S:PIN25
LAN_AEN S:PIN51
LAN_RESET S:PIN46
LCD_PWR_ON S:PIN42
LED_GREENn S:PIN24
LED_REDn S:PIN23
MMC_PWR_EN S:PIN78
MS_PULL S:PIN79
MS_PWR_EN S:PIN80
PSKTSEL S:PIN22
RS232_ON S:PIN21
SLEEPn S:PIN20
SPKR_OFF S:PIN19
SYS_CS0n S:PIN132
SYS_CS1n S:PIN131
TX_OUT0 S:PIN12
TX_OUT1 S:PIN52
USB_IDE_CSn S:PIN76
USB_IDE_RESn S:PIN48
VBUS1_ON S:PIN30
VGA_I2C_ENn S:PIN44


;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.

PARTITION FB1_3 BCR1_REG<0> BCR2_REG<14>
PARTITION FB1_6 BCR1_REG<15>
PARTITION FB1_11 CF_OUT_INT__n0000 BCR2_REG<13> BCR2_REG<10> BCR2_REG<11>
		 CF_IN_INT__n0000 CF_IN_INT
PARTITION FB2_1 DATA<1>
PARTITION FB2_3 DATA<12> DATA<7> DATA<8>
PARTITION FB2_12 DATA<9> DATA<2> DATA<3> FLASH_CSn
		

PARTITION FB3_1 BCR2_REG<4> BCR1_REG<5> BCR2_REG<6>
PARTITION FB3_5 BRDY_ENn
PARTITION FB3_7 SW1_INT__n0000 SIM_OUT_INT SIM_OUT_INT__n0000 SIM_IN_INT
		 SIM_IN_INT__n0000 MMC_OUT_INT__n0000 BCR2_REG<0> SYS_CS0n
		 MMC_IN_INT__n0000 SYS_CS1n
PARTITION FB4_1 FLASH_RSTn TX_OUT0 _n002215 N_PZ_261
		 _n0051 SW3_INT BCR2_REG<5> USB_OUT_INT__n0000
		 USB_IN_INT__n0000 SW4_3INT__n0000 SW4_2INT__n0000 SW2_INT
		 SW4_1INT__n0000 BCR2_REG<15> SW3_INT__n0000 SW2_INT__n0000
		
PARTITION FB5_2 CPLD_INTn
PARTITION FB5_4 AUDIO_PWR_EN CF_RESET VBUS1_ON
PARTITION FB5_14 DAC_PWR_EN MMC_IN_INT MMC_OUT_INT
PARTITION FB6_1 DATA_DIRn EX_FLASH_CSn
PARTITION FB6_4 CF_OEn
PARTITION FB6_10 CF_OUT_INT SW1_INT EX_OUT0 HDD_PWR_EN
		 EX_OUT1 LCD_PWR_ON IRDA_FSEL
PARTITION FB7_5 IRDA_MD0 IRDA_MD1
PARTITION FB7_9 SW4_2INT SW4_1INT LED_GREENn LED_REDn
		 PSKTSEL RS232_ON SLEEPn SPKR_OFF
		
PARTITION FB8_1 VGA_I2C_ENn EX_REG_CSn LAN_RESET
PARTITION FB8_5 USB_IDE_RESn ADDR_OEn
PARTITION FB8_11 DATA_OEn LAN_AEN TX_OUT1
PARTITION FB8_15 USB_IN_INT SW4_3INT
PARTITION FB9_16 USB_OUT_INT
PARTITION FB10_14 BCR2_REG<12>
PARTITION FB10_16 BCR2_REG<7>
PARTITION FB11_5 BCR2_REG<9>


PARTITION FB13_1 CF_PWR_EN USB_IDE_CSn ADDR_DIRn
PARTITION FB13_5 MMC_PWR_EN MS_PULL
PARTITION FB13_12 MS_PWR_EN